Daniel Dunbar
224340cabe
MC/X86: Push immediate operands as immediates not expressions when possible.
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llvm-svn: 96055
2010-02-13 00:17:21 +00:00
Chris Lattner
064e926362
Remove special cases for [LM]FENCE, MONITOR and MWAIT from
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encoder and decoder by using new MRM_ forms.
llvm-svn: 96048
2010-02-12 23:54:57 +00:00
Chris Lattner
1e827fd8ca
implement the rest of correct x86-64 encoder support for
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rip-relative addresses, and add a testcase.
llvm-svn: 96040
2010-02-12 23:24:09 +00:00
Dale Johannesen
626b79d6a6
Add the problem I just hacked around in 96015/96020.
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The solution there produces correct code, but is seriously
deficient in several ways.
llvm-svn: 96039
2010-02-12 23:16:24 +00:00
Chris Lattner
741580a5bd
give MCCodeEmitters access to the current MCContext.
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llvm-svn: 96038
2010-02-12 23:12:47 +00:00
Chris Lattner
4ad96055fb
implement infrastructure to support fixups for rip-rel
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addressing. This isn't complete because I need an MCContext
to generate new MCExprs.
llvm-svn: 96036
2010-02-12 23:00:36 +00:00
Johnny Chen
29a9103ee6
Add YIELD, WFE, WFI, and SEV instructions for disassembly only.
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Plus add two formats: MiscFrm and ThumbMiscFrm. Some of the for disassembly
only instructions are changed from Pseudo Format to MiscFrm Format.
llvm-svn: 96032
2010-02-12 22:53:19 +00:00
Chris Lattner
d18320361f
pull the rip-relative addressing mode case up early.
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llvm-svn: 96031
2010-02-12 22:47:55 +00:00
Chris Lattner
6c1c0141be
fixme resolved!
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llvm-svn: 96029
2010-02-12 22:39:06 +00:00
Chris Lattner
0055e75249
start producing reloc_pcrel_4byte/reloc_pcrel_1byte for calls.
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llvm-svn: 96028
2010-02-12 22:36:47 +00:00
Chris Lattner
12455ca03d
enhance the immediate field encoding to know whether the immediate
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is pc relative or not, mark call and branches as pcrel.
llvm-svn: 96026
2010-02-12 22:27:07 +00:00
Evan Cheng
439bda9d3f
Load / store multiple instructions cannot load / store sp. Sorry, can't come up with a reasonable test case.
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llvm-svn: 96023
2010-02-12 22:17:21 +00:00
Dale Johannesen
cb39340b81
This should have gone in with 26015, see comments there.
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llvm-svn: 96020
2010-02-12 22:00:40 +00:00
Johnny Chen
dc2051c802
Add halfword multiply accumulate long SMLALBB/BT/TB/TT for disassembly only.
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llvm-svn: 96019
2010-02-12 21:59:23 +00:00
Dale Johannesen
26062150fa
When save/restoring CR at prolog/epilog, in a large
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stack frame, the prolog/epilog code was using the same
register for the copy of CR and the address of the save slot. Oops.
This is fixed here for Darwin, sort of, by reserving R2 for this case.
A better way would be to do the store before the decrement of SP,
which is safe on Darwin due to the red zone.
SVR4 probably has the same problem, but I don't know how to fix it;
there is no red zone and R2 is already used for something else.
I'm going to leave it to someone interested in that target.
Better still would be to rewrite the CR-saving code completely;
spilling each CR subregister individually is horrible code.
llvm-svn: 96015
2010-02-12 21:35:34 +00:00
Chris Lattner
392be58cad
Add support for a union type in LLVM IR. Patch by Talin!
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llvm-svn: 96011
2010-02-12 20:49:41 +00:00
Johnny Chen
bdf1b9520c
Add SWP (Swap) and SWPB (Swap Byte) for disassembly only.
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llvm-svn: 96010
2010-02-12 20:48:24 +00:00
Johnny Chen
cf20cbec49
Add CPS, MRS, MRSsys, MSR, MSRsys for disassembly only.
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llvm-svn: 95999
2010-02-12 18:55:33 +00:00
Anton Korobeynikov
c3c357006e
Setup correct data layout to match gcc's expectations on mingw32.
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llvm-svn: 95981
2010-02-12 15:28:56 +00:00
Anton Korobeynikov
c9276dfe04
Cleanup stdcall / fastcall name mangling.
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This should fix alot of problems we saw so far, e.g. PRs 5851 & 2936
llvm-svn: 95980
2010-02-12 15:28:40 +00:00
Chris Lattner
f7477e599f
add a bunch of mod/rm encoding types for fixed mod/rm bytes.
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This will work better for the disassembler for modeling things
like lfence/monitor/vmcall etc.
llvm-svn: 95960
2010-02-12 02:06:33 +00:00
Chris Lattner
44ac89f517
revert r95949, it turns out that adding new prefixes is not a
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great solution for the disassembler, we'll go with "plan b".
llvm-svn: 95957
2010-02-12 01:55:31 +00:00
Johnny Chen
905a2d7727
Added coprocessor Instructions CDP, CDP2, MCR, MCR2, MRC, MRC2, MCRR, MCRR2,
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MRRC, MRRc2. For disassembly only.
llvm-svn: 95955
2010-02-12 01:44:23 +00:00
Daniel Dunbar
d7e9212e2d
X86: Fix definition for RCL/RCR.*m? operations -- they were getting represented
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with "tied memory operands", which is wrong.
llvm-svn: 95950
2010-02-12 01:22:03 +00:00
Chris Lattner
336f9abb45
add another bit of space for new kinds of instruction prefixes.
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llvm-svn: 95949
2010-02-12 01:15:16 +00:00
Nate Begeman
c780af6471
Add a missing pattern for movhps so that we get:
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movq (%ecx,%edx,2), %xmm2
movhps (%ecx,%eax,2), %xmm2
rather than:
movq (%eax, %edx, 2), %xmm2
movq (%eax, %ebx, 2), %xmm3
movlhps %xmm3, %xmm2
Testcase forthcoming.
llvm-svn: 95948
2010-02-12 01:10:45 +00:00
Chris Lattner
1572e760bc
fix the encodings of monitor and mwait, which were completely
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busted in both encoders. I'm not bothering to fix it in the
old one at this point.
llvm-svn: 95947
2010-02-12 01:06:22 +00:00
Chris Lattner
b1913c4df9
enhance llvm-mc -show-inst to print the enum of an instruction, like so:
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testb %al, %al ## <MCInst #2412 TEST8rr
## <MCOperand Reg:2>
## <MCOperand Reg:2>>
jne LBB1_7 ## <MCInst #938 JNE_1
## <MCOperand Expr:(LBB1_7)>>
llvm-svn: 95935
2010-02-11 22:57:32 +00:00
Chris Lattner
524138176d
add a new MCInstPrinter::getOpcodeName interface, when it is
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implemented, llvm-mc --show-inst now uses it to print the
instruction opcode as well as the number.
llvm-svn: 95929
2010-02-11 22:39:10 +00:00
Chris Lattner
b8af65ed0b
improve encoding information for branches. We now know they have
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8 or 32-bit immediates, which allows the new encoder to handle
them.
llvm-svn: 95927
2010-02-11 21:45:31 +00:00
Chris Lattner
ddeceae839
make getFixupKindInfo return a const reference, allowing
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the tables to be const. Teach MCCodeEmitter to handle
the target-indep kinds so that we don't crash on them.
llvm-svn: 95924
2010-02-11 21:27:18 +00:00
Chris Lattner
2a34015abc
switch to target-indep fixups for 1/2/4/8 byte data.
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llvm-svn: 95920
2010-02-11 21:17:54 +00:00
Johnny Chen
af88c0a84d
Added LDRT/LDRBT/STRT/STRBT for disassembly only.
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llvm-svn: 95916
2010-02-11 20:31:08 +00:00
Chris Lattner
1f298326b0
unbreak the build.
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llvm-svn: 95915
2010-02-11 19:52:11 +00:00
Chris Lattner
2b0a7a2592
refactor the conditional jump instructions in the .td file to
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use a multipattern that generates both the 1-byte and 4-byte
versions from the same defm
llvm-svn: 95901
2010-02-11 19:25:55 +00:00
Johnny Chen
3964059a16
Forgot to also check in this file for vcvt (floating-point <-> fixed-point, VFP).
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Sorry!
llvm-svn: 95892
2010-02-11 18:47:03 +00:00
Johnny Chen
2588efd071
Added VCVT (between floating-point and fixed-point, VFP) for disassembly.
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A8.6.297
llvm-svn: 95885
2010-02-11 18:17:16 +00:00
Johnny Chen
f40b8e03fb
Added BKPT/tBKPT (breakpoint) to the instruction table for disassembly purpose.
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llvm-svn: 95884
2010-02-11 18:12:29 +00:00
Johnny Chen
9c13dfb5dd
Add pseudo instruction TRAP for disassembly, which is encoded according to A5-21
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as the "Permanently UNDEFINED" instruction.
llvm-svn: 95873
2010-02-11 17:14:31 +00:00
Chris Lattner
fbf1f02fee
dont' call getX86RegNum on X86::RIP, it doesn't like that. This
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fixes the remaining x86-64 jit failures afaik.
llvm-svn: 95867
2010-02-11 08:45:56 +00:00
Chris Lattner
5a4ec879bf
fix a really nasty bug I introduced in r95693: r12 (and r12d,
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r12b, etc) also encodes to a R/M value of 4, which is just
as illegal as ESP/RSP for the non-sib version an address.
This fixes x86-64 jit miscompilations of a bunch of programs.
llvm-svn: 95866
2010-02-11 08:41:21 +00:00
Chris Lattner
6bb2463f85
Add and commonize encoder support for all immediates.
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Stub out some dummy fixups to make things work.
We can now emit fixups like this:
subl $20, %esp ## encoding: [0x83,0xec,A]
## fixup A - offset: 2, value: 20, kind: fixup_1byte_imm
Emitting $20 as a single-byte fixup to be later resolved
by the assembler is ridiculous of course (vs just emitting
the byte) but this is a failure of the matcher, which
should be producing an imm of 20, not an MCExpr of 20.
llvm-svn: 95860
2010-02-11 07:06:31 +00:00
Chris Lattner
167842f90b
generalize EmitDisplacementField to work with any size
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and rename it to EmitImmediate.
llvm-svn: 95859
2010-02-11 06:54:23 +00:00
Chris Lattner
3555993312
eliminate the dead IsPCRel argument.
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llvm-svn: 95858
2010-02-11 06:51:36 +00:00
Chris Lattner
5a40e6c95c
eliminate the dead "PCAdj" logic.
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llvm-svn: 95857
2010-02-11 06:49:52 +00:00
Mon P Wang
5b77f0dac1
The previous fix of widening divides that trap was too fragile as it depends on custom
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lowering and requires that certain types exist in ValueTypes.h. Modified widening to
check if an op can trap and if so, the widening algorithm will apply only the op on
the defined elements. It is safer to do this in widening because the optimizer can't
guarantee removing unused ops in some cases.
llvm-svn: 95823
2010-02-10 23:37:45 +00:00
Eli Friedman
4d4c6944e9
A few missed optimizations; the last one could have a significant impact on
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code with lots of bitfields.
llvm-svn: 95809
2010-02-10 21:26:04 +00:00
Daniel Dunbar
3e0c9790f2
MC/X86 AsmMatcher: Fix a use after free spotted by d0k, and de-XFAIL
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x86_32-encoding.s in on expectation of it passing.
llvm-svn: 95806
2010-02-10 21:19:28 +00:00
Johnny Chen
c7e14704d0
Added NOP, DBG, SVC to the instruction table for disassembly purpose.
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llvm-svn: 95784
2010-02-10 18:02:25 +00:00
Dan Gohman
4a618827de
Fix "the the" and similar typos.
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llvm-svn: 95781
2010-02-10 16:03:48 +00:00