Commit Graph

1309 Commits

Author SHA1 Message Date
Brad Smith 0f92096c0a Revert "Hook up OpenBSD 64-bit PowerPC support" 2020-06-18 20:05:39 -04:00
Brad Smith 3008609d45 Hook up OpenBSD 64-bit PowerPC support 2020-06-18 19:19:45 -04:00
Yaxun (Sam) Liu 8422bc9efc recommit "[HIP] Add default header and include path"
recommit 11d06b9511 with
fix for lit tests.
2020-06-06 14:21:22 -04:00
Nico Weber 2920348063 Revert "recommit "[HIP] Add default header and include path""
This reverts commit 1fa43e0b34.
Still breaks tests on several bots, see https://reviews.llvm.org/D81176
2020-06-05 21:50:04 -04:00
Yaxun (Sam) Liu 1fa43e0b34 recommit "[HIP] Add default header and include path"
recommit 11d06b9511 with
fix for lit tests.
2020-06-05 20:41:15 -04:00
Yaxun (Sam) Liu 8a8c6913a9 Revert "[HIP] Add default header and include path"
This reverts commit 11d06b9511.
2020-06-05 15:42:57 -04:00
Yaxun (Sam) Liu e987c37218 Fix lit tests hip-include-path.hip and hip-host-cpu-macros.cu 2020-06-05 13:21:35 -04:00
Ties Stuij a6fcf5ca03 [clang][BFloat] add NEON emitter for bfloat
Summary:
This patch adds the bfloat16_t struct typedefs (e.g. bfloat16x8x2_t) to
arm_neon.h

This patch is part of a series implementing the Bfloat16 extension of the
Armv8.6-a architecture, as detailed here:

https://community.arm.com/developer/ip-products/processors/b/processors-ip-blog/posts/arm-architecture-developments-armv8-6-a

The bfloat type, and its properties are specified in the Arm Architecture
Reference Manual:

https://developer.arm.com/docs/ddi0487/latest/arm-architecture-reference-manual-armv8-for-armv8-a-architecture-profile

The following people contributed to this patch:
- Luke Cheeseman
- Simon Tatham
- Ties Stuij

Reviewers: t.p.northover, fpetrogalli, sdesmalen, az, LukeGeeson

Reviewed By: fpetrogalli

Subscribers: SjoerdMeijer, LukeGeeson, pbarrio, mgorny, kristof.beyls, ilya-biryukov, MaskRay, jkorous, arphaman, usaxena95, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D79708
2020-06-05 14:11:51 +01:00
Vyacheslav Zakharin 3a1b07506c Define __SPIR__ macro for spir/spir64 targets.
Differential Revision: https://reviews.llvm.org/D80655
2020-06-03 12:36:21 -07:00
Craig Topper bb1d8bf270 [X86] Add CLWB to Tremont CPU. Remove CLDEMOTE, MOVDIRI, MOVDIR64B, and WAITPKG to match gcc. 2020-06-02 22:38:51 -07:00
Lei Huang 2368bf52cd [PowerPC] Add support for -mcpu=pwr10 in both clang and llvm
Summary:
This patch simply adds support for the new CPU in anticipation of
Power10. There isn't really any functionality added so there are no
associated test cases at this time.

Reviewers: stefanp, nemanjai, amyk, hfinkel, power-llvm-team, #powerpc

Reviewed By: stefanp, nemanjai, amyk, #powerpc

Subscribers: NeHuang, steven.zhang, hiraditya, llvm-commits, wuzish, shchenz, cfe-commits, kbarton, echristo

Tags: #clang, #powerpc, #llvm

Differential Revision: https://reviews.llvm.org/D80020
2020-05-27 13:14:25 -05:00
Lei Huang 559845f8fe Revert "[PowerPC] Add support for -mcpu=pwr10 in both clang and llvm"
This reverts commit 7eb666b155.
2020-05-27 09:40:21 -05:00
Lei Huang 7eb666b155 [PowerPC] Add support for -mcpu=pwr10 in both clang and llvm
Summary:
This patch simply adds support for the new CPU in anticipation of
Power10. There isn't really any functionality added so there are no
associated test cases at this time.

Reviewers: stefanp, nemanjai, amyk, hfinkel, power-llvm-team, #powerpc

Reviewed By: stefanp, nemanjai, amyk, #powerpc

Subscribers: NeHuang, steven.zhang, hiraditya, llvm-commits, wuzish, shchenz, cfe-commits, kbarton, echristo

Tags: #clang, #powerpc, #llvm

Differential Revision: https://reviews.llvm.org/D80020
2020-05-26 13:48:22 -05:00
Sylvain Audi 7a8edcb212 [Clang] Restore replace_path_prefix instead of startswith
In D49466, sys::path::replace_path_prefix was used instead startswith for -f[macro/debug/file]-prefix-map options.
However those were reverted later (commit rG3bb24bf25767ef5bbcef958b484e7a06d8689204) due to broken Windows tests.

This patch restores those replace_path_prefix calls.
It also modifies the prefix matching to be case-insensitive under Windows.

Differential Revision : https://reviews.llvm.org/D76869
2020-05-13 13:49:14 -04:00
Raul Tambre 0863e94ebd [AArch64] Add NVIDIA Carmel support
Summary:
NVIDIA's Carmel ARM64 cores are used in Tegra194 chips found in Jetson AGX Xavier, DRIVE AGX Xavier and DRIVE AGX Pegasus.

References:
* https://devblogs.nvidia.com/nvidia-jetson-agx-xavier-32-teraops-ai-robotics/#h.huq9xtg75a5e
* NVIDIA Xavier Series System-on-Chip Technical Reference Manual 1.3 (https://developer.nvidia.com/embedded/downloads#?search=Xavier%20Series%20SoC%20Technical%20Reference%20Manual)

Reviewers: sdesmalen, paquette

Reviewed By: sdesmalen

Subscribers: llvm-commits, ianshmean, kristof.beyls, hiraditya, jfb, danielkiss, cfe-commits, t.p.northover

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D77940
2020-05-04 13:52:30 +01:00
Ayke van Laethem ceba881aea
[AVR][NFC] Move preprocessor tests to Preprocessor directory
These tests were placed in the CodeGen directory while they really
should have been placed in the Preprocessor directory.

Differential Revision: https://reviews.llvm.org/D78163
2020-04-26 01:29:25 +02:00
Jon Roelofs 38b39c34ab [clang] Add missing FileCheck colons 2020-04-14 12:32:48 -06:00
Scott Egerton 61ff296375 [RISCV] Add Clang frontend support for Bitmanip extension
This adds the __riscv_bitmanip macro and the 'b' target feature to enable it.

Differential Revision: https://reviews.llvm.org/D71553
2020-04-09 18:04:22 +01:00
WangTianQing a3dc949000 [X86] Add TSXLDTRK instructions.
Summary: For more details about these instructions, please refer to the latest ISE document: https://software.intel.com/en-us/download/intel-architecture-instruction-set-extensions-programming-reference

Reviewers: craig.topper, RKSimon, LuoYuanke

Reviewed By: craig.topper

Subscribers: mgorny, hiraditya, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D77205
2020-04-09 13:17:29 +08:00
Daniel Kiss 37ced5a571 [clang][AARCH64] Add __ARM_FEATURE_{PAC, BTI}_DEFAULT defines
Summary:
As defined by Arm C Language Extensions (ACLE) these macro defines
should be set to specific values depending on -mbranch-protection.

Reviewers: chill

Reviewed By: chill

Subscribers: danielkiss, cfe-commits, kristof.beyls

Tags: #clang

Differential Revision: https://reviews.llvm.org/D77134
2020-04-02 12:54:21 +02:00
WangTianQing d08fadd662 [X86] Add SERIALIZE instruction.
Summary: For more details about this instruction, please refer to the latest ISE document: https://software.intel.com/en-us/download/intel-architecture-instruction-set-extensions-programming-reference

Reviewers: craig.topper, RKSimon, LuoYuanke

Reviewed By: craig.topper

Subscribers: mgorny, hiraditya, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D77193
2020-04-02 16:19:23 +08:00
Sid Manning 81194bfeea [Hexagon] MaxAtomicPromoteWidth and MaxAtomicInlineWidth are not getting set.
Noticed when building llvm's c++ library.

Differential Revision: https://reviews.llvm.org/D76546
2020-03-30 12:33:51 -05:00
Ties Stuij 71ae267d1f [PATCH] [ARM] ARMv8.6-a command-line + BFloat16 Asm Support
Summary:
This patch introduces command-line support for the Armv8.6-a architecture and assembly support for BFloat16. Details can be found
https://community.arm.com/developer/ip-products/processors/b/processors-ip-blog/posts/arm-architecture-developments-armv8-6-a

in addition to the GCC patch for the 8..6-a CLI:
https://gcc.gnu.org/legacy-ml/gcc-patches/2019-11/msg02647.html

In detail this patch

- march options for armv8.6-a
- BFloat16 assembly

This is part of a patch series, starting with command-line and Bfloat16
assembly support. The subsequent patches will upstream intrinsics
support for BFloat16, followed by Matrix Multiplication and the
remaining Virtualization features of the armv8.6-a architecture.

Based on work by:
- labrinea
- MarkMurrayARM
- Luke Cheeseman
- Javed Asbar
- Mikhail Maltsev
- Luke Geeson

Reviewers: SjoerdMeijer, craig.topper, rjmccall, jfb, LukeGeeson

Reviewed By: SjoerdMeijer

Subscribers: stuij, kristof.beyls, hiraditya, dexonsmith, danielkiss, cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D76062
2020-03-26 09:17:20 +00:00
Sid Manning 430c9a80c1 [Hexagon] Enable linux #defines
Enable standard linux defines when the triple is Linux and the
environment is musl.

Differential Revision: https://reviews.llvm.org/D76310
2020-03-19 14:33:49 -05:00
Mikhail Maltsev cdeeb548bb [ARM,CDE] Implement CDE feature test macros
Summary:
This patch implements feature test macros for the CDE extension
according to the upcoming ACLE specification.

The following 2 macros are being added:
- __ARM_FEATURE_CDE - defined as '1' when any coprocessor is
  configured as a CDE coprocessor
- __ARM_FEATURE_CDE_COPROC - defined as an 8-bit mask, each bit of the
  mask corresponds to a coprocessor and is set when the corresponding
  coprocessor is configured as CDE (and cleared otherwise).

The patch also exposes the value of __ARM_FEATURE_CDE_COPROC in the
target-independent method TargetInfo::getARMCDECorpocMask, the method
will be used in follow-up patches implementing semantic checks of CDE
intrinsics (we want to diagnose the cases when CDE intrinsics are used
with coprocessors that are not configured as CDE).

Reviewers: simon_tatham, dmgreen, ostannard, MarkMurrayARM

Reviewed By: simon_tatham

Subscribers: kristof.beyls, danielkiss, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D75843
2020-03-09 16:14:06 +00:00
KAWASHIMA Takahiro c8cd1a994d [AArch64] Add support for Fujitsu A64FX
A64FX is an Armv8.2-A CPU used in FUJITSU Supercomputer
PRIMEHPC FX1000, PRIMEHPC FX700, and supercomputer Fugaku.

https://www.fujitsu.com/global/products/computing/servers/supercomputer/specifications/

Differential Revision: https://reviews.llvm.org/D75594
2020-03-09 19:15:09 +09:00
Ruyman 118b057f12 [SYCL] Driver option to select SYCL version
Summary:
User can select the version of SYCL the compiler will
use via the flag -sycl-std, similar to -cl-std.

The flag defines the LangOpts.SYCLVersion option to the
version of SYCL. The default value is undefined.
If driver is building SYCL code, flag is set to the default SYCL
version (1.2.1)

The preprocessor uses this variable to define CL_SYCL_LANGUAGE_VERSION macro,
which should be defined according to SYCL 1.2.1 standard.

Only valid value at this point for the flag is 1.2.1.

Co-Authored-By: David Wood <Q0KPU0H1YOEPHRY1R2SN5B5RL@david.davidtw.co>
Signed-off-by: Ruyman Reyes <ruyman@codeplay.com>

Subscribers: ebevhan, Anastasia, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D72857
2020-03-07 18:28:54 +03:00
Nick Desaulniers 91cdbd521a clang: Switch C compilations to C17 by default.
Summary:
Matches GCC 8.1 (2018).

Updates documentation+release notes as well.

See also https://reviews.llvm.org/rL220244.

Reviewers: rsmith, aaron.ballman

Reviewed By: rsmith, aaron.ballman

Subscribers: aaron.ballman, dschuff, aheejin, simoncook, s.egerton, cfe-commits, hans, srhines

Tags: #clang

Differential Revision: https://reviews.llvm.org/D75383
2020-03-02 09:39:26 -08:00
Luke Geeson 7d594cf003 [ARM] Add Cortex-M55 Support for clang and llvm
This patch upstreams support for the ARM Armv8.1m cpu Cortex-M55.

In detail adding support for:

 - mcpu option in clang
 - Arm Target Features in clang
 - llvm Arm TargetParser definitions

details of the CPU can be found here:
https://developer.arm.com/ip-products/processors/cortex-m/cortex-m55

Reviewers: chill

Reviewed By: chill

Subscribers: dmgreen, kristof.beyls, hiraditya, cfe-commits,
llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D74966
2020-03-02 11:42:26 +00:00
Alexey Bader 740ed617f7 Revert "[SYCL] Driver option to select SYCL version"
This reverts commit bd97704eaa.

It broke tests on mac: http://45.33.8.238/mac/9011/step_7.txt
2020-02-27 16:23:54 +03:00
Ruyman bd97704eaa [SYCL] Driver option to select SYCL version
Summary:
User can select the version of SYCL the compiler will
use via the flag -sycl-std, similar to -cl-std.

The flag defines the LangOpts.SYCLVersion option to the
version of SYCL. The default value is undefined.
If driver is building SYCL code, flag is set to the default SYCL
version (1.2.1)

The preprocessor uses this variable to define CL_SYCL_LANGUAGE_VERSION macro,
which should be defined according to SYCL 1.2.1 standard.

Only valid value at this point for the flag is 1.2.1.

Co-Authored-By: David Wood <Q0KPU0H1YOEPHRY1R2SN5B5RL@david.davidtw.co>
Signed-off-by: Ruyman Reyes <ruyman@codeplay.com>

Subscribers: ebevhan, Anastasia, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D72857

Signed-off-by: Alexey Bader <alexey.bader@intel.com>
2020-02-27 15:08:42 +03:00
Nico Weber bcda1269c4 clang-cl: Add a `/showIncludes:user` flag.
This flag is like /showIncludes, but it only includes user headers and
omits system headers (similar to MD and MMD). The motivation is that
projects that already track system includes though other means can use
this flag to get consistent behavior on Windows and non-Windows, and it
saves tools that output /showIncludes output (e.g. ninja) some work.

implementation-wise, this makes `HeaderIncludesCallback` honor the
existing `IncludeSystemHeaders` bit, and changes the three clients of
`HeaderIncludesCallback` (`/showIncludes`, `-H`, `CC_PRINT_HEADERS=1`)
to pass `-sys-header-deps` to set that bit -- except for
`/showIncludes:user`, which doesn't pass it.

Differential Revision: https://reviews.llvm.org/D75093
2020-02-25 09:43:52 -05:00
Roland McGrath 271f964773 [Preprocessor][X86] Fix __code_model_*__ predefine macros
GCC defines __code_model_*__ (two trailing underscores), not
__code_model_*_ (one trailing underscore).

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D75003
2020-02-21 23:30:07 -08:00
Roland McGrath d2e949eed5 [AArch64] Predefine __AARCH64_CMODEL_*__ as GCC does
Make Clang on aarch64 targets predefine `__AARCH64_CMODEL_SMALL__`
or `__AARCH64_CMODEL_TINY__`, etc.  These are the names that GCC
uses for its predefines.

Reviewed By: tamur, MaskRay

Differential Revision: https://reviews.llvm.org/D75002
2020-02-21 23:27:36 -08:00
Fangrui Song 0123744d46 [Preprocessor][test] Fix __VERSION__ in init-aarch64.c 2020-02-21 22:38:20 -08:00
Fangrui Song 59a572eb74 [Preprocessor][test] Move AArch64 tests from init.c to init-aarch.c 2020-02-21 22:22:59 -08:00
Sid Manning d37cbda5f9 [Hexagon] Define __ELF__ by default.
Differential Revision: https://reviews.llvm.org/D74972
2020-02-21 16:10:31 -06:00
Richard Smith 24ad121582 Add -std=c++20 flag, replace C++2a with C++20 throughout the Clang
user interface and documentation, and update __cplusplus for C++20.

WG21 considers the C++20 standard to be finished (even though it still
has some more steps to pass through in the ISO process).

The old flag names are accepted for compatibility, as usual, and we
still have lots of references to C++2a in comments and identifiers;
those can be cleaned up separately.
2020-02-18 16:16:37 -08:00
Luke Geeson 4518aab289 [AArch64] Add Cortex-A34 Support for clang and llvm
This patch upstreams support for the AArch64 Armv8-A cpu Cortex-A34.

In detail adding support for:
 - mcpu option in clang
 - AArch64 Target Features in clang
 - llvm AArch64 TargetParser definitions

details of the cpu can be found here:
https://developer.arm.com/ip-products/processors/cortex-a/cortex-a34

Reviewers: SjoerdMeijer

Reviewed By: SjoerdMeijer

Subscribers: SjoerdMeijer, kristof.beyls, hiraditya, cfe-commits,
llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D74483

Change-Id: Ida101fc544ca183a0a0e61a1277c8957855fde0b
2020-02-18 14:56:16 +00:00
Aaron Puchert 705306526b Fix tests after previous commit
We don't want to test for this warning, so we just fix it.
2020-02-14 19:41:01 +01:00
Momchil Velikov da3f2b414a [ARM][MVE] Fix a corner case of checking for MVE-I with -mfpu=none
-march=armv8.1-m.main+mve.fp+nomve -mfpu=none should disable FP
registers and instructions moving to/from FP registers.

This patch fixes the case when "+mve" (added to the feature list by
"+mve.fp"), is followed by "-mve" (added by "+nomve").

Differential Revision: https://reviews.llvm.org/D72633
2020-02-11 12:03:41 +00:00
Momchil Velikov 3627c91ead [ARM][TargetParser] Improve handling of dependencies between target features
The patch at https://reviews.llvm.org/D64048 added "negative"
dependency handling in `ARM::appendArchExtFeatures`: feature "noX"
removes all features, which imply "X".

This patch adds the "positive" handling: feature "X" adds all the
feature strings implied by "X".

(This patch also comes from the suggestion here
https://reviews.llvm.org/D72633#inline-658582)

Differential Revision: https://reviews.llvm.org/D72762
2020-02-05 16:07:51 +00:00
Michael Liao ccac6b2bf8 [hip] Properly populate macros based on host processor.
Summary:
- The device compilation needs to have a consistent source code compared
  to the corresponding host compilation. If macros based on the
  host-specific target processor is not properly populated, the device
  compilation may fail due to the inconsistent source after the
  preprocessor. So far, only the host triple is used to build the
  macros. If a detailed host CPU target or certain features are
  specified, macros derived from them won't be populated properly, e.g.
  `__SSE3__` won't be added unless `+sse3` feature is present. On
  Windows compilation compatible with MSVC, that missing macros result
  in that intrinsics are not included and cause device compilation
  failure on the host-side source.

- This patch addresses this issue by introducing two `cc1` options,
  i.e., `-aux-target-cpu` and `-aux-target-feature`. If a specific host
  CPU target or certain features are specified, the compiler driver will
  append them during the construction of the offline compilation
  actions. Then, the toolchain in `cc1` phase will populate macros
  accordingly.

- An internal option `--gpu-use-aux-triple-only` is added to fall back
  the original behavior to help diagnosing potential issues from the new
  behavior.

Reviewers: tra, yaxunl

Subscribers: cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D73942
2020-02-04 15:36:14 -05:00
Duncan P. N. Exon Smith 1e487e4c16 clang: Only define OBJC_NEW_PROPERTIES when -x objective-c
Since 2009 (in r63846) we've been `#define`-ing OBJC_NEW_PROPERTIES all
the time on Darwin, but this macro only makes sense for `-x objective-c`
and `-x objective-c++`.  Restrict it to those cases (for which there is
already separate logic).

https://reviews.llvm.org/D72970
rdar://problem/10050342
2020-01-24 14:55:12 -08:00
Heejin Ahn 65eb11306e [WebAssembly] Update bleeding-edge CPU features
Summary:
This adds bulk memory and tail call to "bleeding-edge" CPU, since their
implementation in LLVM/clang seems mostly complete.

Reviewers: tlively

Subscribers: dschuff, sbc100, jgravelle-google, sunfish, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D73322
2020-01-24 14:27:35 -08:00
Heejin Ahn 764f4089e8 [WebAssembly] Add reference types target feature
Summary:
This adds the reference types target feature. This does not enable any
more functionality in LLVM/clang for now, but this is necessary to embed
the info in the target features section, which is used by Binaryen and
Emscripten. It turned out that after D69832 `-fwasm-exceptions` crashed
because we didn't have the reference types target feature.

Reviewers: tlively

Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D73320
2020-01-24 14:26:27 -08:00
Krzysztof Parzyszek c12a5917d2 [Hexagon] Add support for Hexagon/HVX v67 ISA 2020-01-20 16:16:49 -06:00
Krzysztof Parzyszek 7f5f6ff547 [Hexagon] Add preprocessor test for hexagonv66 2020-01-16 10:18:58 -06:00
Scott Egerton a90ea38698 [Lexer] Allow UCN for dollar symbol '\u0024' in identifiers when using -fdollars-in-identifiers flag.
Summary:
Previously, the -fdollars-in-identifiers flag allows the '$' symbol to be used
in an identifier but the universal character name equivalent '\u0024' is not
allowed.
This patch changes this, so that \u0024 is valid in identifiers.

Reviewers: rsmith, jordan_rose

Reviewed By: rsmith

Subscribers: dexonsmith, simoncook, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D71758
2020-01-15 11:28:57 +00:00
Scott Egerton cbe681bd83 Revert "[RISCV] Add Clang frontend support for Bitmanip extension"
This reverts commit 57cf6ee9c8.
2020-01-15 10:43:42 +00:00