Evan Cheng
2dd217b88f
Added custom lowering of fabs
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llvm-svn: 25831
2006-01-31 03:14:29 +00:00
Evan Cheng
45df7f84ff
Don't generate complex sequence for SETOLE, SETOLT, SETULT, and SETUGT. Flip
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the order of the compare operands and generate SETOGT, SETOGE, SETUGE, and
SETULE instead.
llvm-svn: 25824
2006-01-30 23:41:35 +00:00
Evan Cheng
08390f6a21
i64 -> f32, f32 -> i64 and some clean up.
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llvm-svn: 25818
2006-01-30 22:13:22 +00:00
Evan Cheng
5b97fcf0f5
Always use FP stack instructions to perform i64 to f64 as well as f64 to i64
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conversions. SSE does not have instructions to handle these tasks.
llvm-svn: 25817
2006-01-30 08:02:57 +00:00
Chris Lattner
f0b24d2dc0
Move MaskedValueIsZero from the DAGCombiner to the TargetLowering interface,making isMaskedValueZeroForTargetNode simpler, and useable from other partsof the compiler.
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llvm-svn: 25803
2006-01-30 04:09:27 +00:00
Chris Lattner
c6fa0282d2
adjust prototype
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llvm-svn: 25798
2006-01-30 03:49:07 +00:00
Chris Lattner
132177e103
The FP stack doesn't support UNDEF, ask the legalizer to legalize it
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instead of lying and saying we have it.
llvm-svn: 25775
2006-01-29 06:44:22 +00:00
Chris Lattner
61c9a8e942
Targets all now request ConstantFP to be legalized into TargetConstantFP.
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'fpimm' in .td files is now TargetConstantFP.
llvm-svn: 25771
2006-01-29 06:26:08 +00:00
Chris Lattner
ccd2a20c4b
silence a warning
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llvm-svn: 25745
2006-01-28 10:34:47 +00:00
Evan Cheng
a814f0b31c
Bye bye Pattern ISel, hello DAG ISel.
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llvm-svn: 25700
2006-01-27 21:26:54 +00:00
Nate Begeman
8c47c3a3b1
Remove TLI.LowerReturnTo, and just let targets custom lower ISD::RET for
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the same functionality. This addresses another piece of bug 680. Next,
on to fixing Alpha VAARG, which I broke last time.
llvm-svn: 25696
2006-01-27 21:09:22 +00:00
Evan Cheng
cde9e30bc6
x86 CPU detection and proper subtarget support
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llvm-svn: 25679
2006-01-27 08:10:46 +00:00
Evan Cheng
944d1e91ea
When trying to fold X86::SETCC into a Select, make a copy if it has more than
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one use. This allows more CMOV instructions.
llvm-svn: 25634
2006-01-26 02:13:10 +00:00
Nate Begeman
e74795cd70
First part of bug 680:
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Remove TLI.LowerVA* and replace it with SDNodes that are lowered the same
way as everything else.
llvm-svn: 25606
2006-01-25 18:21:52 +00:00
Evan Cheng
83eeefbbd1
X86 prefer scheduling for reduced register pressure.
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llvm-svn: 25602
2006-01-25 09:15:17 +00:00
Evan Cheng
aff0800fd1
Fix a selectcc lowering bug. Make a copy of X86ISD::CMP when folding it.
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llvm-svn: 25596
2006-01-25 09:05:09 +00:00
Chris Lattner
27d30a5f42
use ESP directly, not a copy of ESP into some other register for fastcc calls
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llvm-svn: 25584
2006-01-24 06:14:44 +00:00
Chris Lattner
6f33eaeb81
Emit the copies out of call return registers *after* the ISD::CALLSEQ_END
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node, fixing fastcc and the case where a function has a frame pointer due
to dynamic allocas.
llvm-svn: 25580
2006-01-24 05:17:12 +00:00
Chris Lattner
335b46dd20
LowerReturn now doesn't have to handle f32 returns.
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llvm-svn: 25484
2006-01-20 18:41:25 +00:00
Evan Cheng
3d2cc7e2e9
Avoid generating a redundant setcc.
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llvm-svn: 25457
2006-01-19 08:52:46 +00:00
Evan Cheng
267ba5965e
A obvious typo
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llvm-svn: 25435
2006-01-19 01:46:14 +00:00
Evan Cheng
621674a19d
SRA shift amount must be in i8
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llvm-svn: 25416
2006-01-18 09:26:46 +00:00
Evan Cheng
4b3774e0a2
If a call return type is i1, insert a truncate from X86::AL to i1.
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llvm-svn: 25415
2006-01-18 08:08:38 +00:00
Evan Cheng
feaed4d107
Fix lowering of calls which return f32 values.
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llvm-svn: 25413
2006-01-17 21:58:21 +00:00
Evan Cheng
0d5b69f734
SSE does not support i64 SINT_TO_FP (FP stack doesn't either, but we custom
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expand it), so ask legalizer to expand i32 UINT_TO_FP.
llvm-svn: 25386
2006-01-17 02:32:49 +00:00
Evan Cheng
561881f30a
Added a FIXME comment about why FST is currently flagged to fpGETRESULT.
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llvm-svn: 25381
2006-01-17 00:37:42 +00:00
Evan Cheng
bec9d720b0
Bug fixes: fpGETRESULT should produces a flag result and X86ISD::FST should
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read a flag.
llvm-svn: 25378
2006-01-17 00:19:47 +00:00
Evan Cheng
911c68d7a8
Fix FP_TO_INT**_IN_MEM lowering.
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llvm-svn: 25368
2006-01-16 21:21:29 +00:00
Chris Lattner
78c358d1ad
Use the default lowering of ISD::DYNAMIC_STACKALLOC, delete now dead code.
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llvm-svn: 25333
2006-01-15 09:00:21 +00:00
Nate Begeman
2fba8a3aaa
bswap implementation
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llvm-svn: 25312
2006-01-14 03:14:10 +00:00
Evan Cheng
dba84bbc1e
LHS = X86ISD::CMOVcc LHS, RHS means LHS = RHS if cc. So the operands must be
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flipped around.
llvm-svn: 25290
2006-01-13 19:51:46 +00:00
Chris Lattner
1a8d918ef1
Enable X86 support for savestack/restorestack
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llvm-svn: 25278
2006-01-13 18:00:54 +00:00
Chris Lattner
8e2f52e645
expand unsupported stacksave/stackrestore nodes
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llvm-svn: 25272
2006-01-13 02:42:53 +00:00
Evan Cheng
d7faa4bae1
More typo's. I need new eye glasses...
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llvm-svn: 25261
2006-01-13 01:17:24 +00:00
Evan Cheng
731423f36a
Oops. Typo.
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llvm-svn: 25260
2006-01-13 01:06:49 +00:00
Evan Cheng
fb22e86c4d
Fix a SETCC / BRCOND folding bug.
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llvm-svn: 25259
2006-01-13 01:03:02 +00:00
Evan Cheng
6305e50ee1
Fix sint_to_fp (fild*) support.
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llvm-svn: 25257
2006-01-12 22:54:21 +00:00
Evan Cheng
84dc9b55f0
X86ISD::SETCC (e.g. SETEr) produces a flag (so multiple SETCC can be
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linked together).
llvm-svn: 25247
2006-01-12 08:27:59 +00:00
Evan Cheng
b94db9e9a4
* Materialize GlobalAddress and ExternalSym with MOV32ri rather than
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LEA32r.
* Do not lower GlobalAddress to TargetGlobalAddress. Let isel does it.
llvm-svn: 25246
2006-01-12 07:56:47 +00:00
Evan Cheng
6d2ab04463
Added ROTL and ROTR.
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llvm-svn: 25232
2006-01-11 23:20:05 +00:00
Evan Cheng
ae986f1f1e
Support for MEMCPY and MEMSET.
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llvm-svn: 25226
2006-01-11 22:15:48 +00:00
Nate Begeman
1b8121b227
Add bswap, rotl, and rotr nodes
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Add dag combiner code to recognize rotl, rotr
Add ppc code to match rotl
Targets should add rotl/rotr patterns if they have them
llvm-svn: 25222
2006-01-11 21:21:00 +00:00
Evan Cheng
bc7a0f44bd
* Add special entry code main() (to set x87 to 64-bit precision).
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* Allow a register node as SelectAddr() base.
* ExternalSymbol -> TargetExternalSymbol as direct function callee.
* Use X86::ESP register rather than CopyFromReg(X86::ESP) as stack ptr for
call parmater passing.
llvm-svn: 25207
2006-01-11 06:09:51 +00:00
Evan Cheng
339edad775
SSE cmov support.
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llvm-svn: 25190
2006-01-11 00:33:36 +00:00
Evan Cheng
73a1ad975e
FP_TO_INT*_IN_MEM and x87 FP Select support.
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llvm-svn: 25188
2006-01-10 20:26:56 +00:00
Evan Cheng
12181af0c7
More typos
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llvm-svn: 25162
2006-01-09 22:29:54 +00:00
Evan Cheng
77fa9195cd
typo
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llvm-svn: 25160
2006-01-09 20:49:21 +00:00
Evan Cheng
9c249c37f8
Support for ADD_PARTS, SUB_PARTS, SHL_PARTS, SHR_PARTS, and SRA_PARTS.
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llvm-svn: 25158
2006-01-09 18:33:28 +00:00
Evan Cheng
172fce7050
* Fast call support.
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* FP cmp, setcc, etc.
llvm-svn: 25117
2006-01-06 00:43:03 +00:00
Jim Laskey
deeafa0f00
Had expand logic backward.
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llvm-svn: 25105
2006-01-05 01:47:43 +00:00