From ff9efe240c4711572d2892f9058fd94a8bd5336e Mon Sep 17 00:00:00 2001
From: Pavel Kosov <kpdev42@gmail.com>
Date: Wed, 17 Aug 2022 09:10:21 +0300
Subject: [PATCH] [LLDB][JIT] Set processor for ARM architecture

Patch sets ARM cpu, before compiling JIT code. This enables FastISel for armv6 and higher CPUs and allows using hardware FPU

~~~

OS Laboratory. Huawei RRI. Saint-Petersburg

Reviewed By: DavidSpickett

Differential Revision: https://reviews.llvm.org/D131783
---
 lldb/source/Utility/ArchSpec.cpp          | 4 +++-
 lldb/test/API/lang/c/fpeval/TestFPEval.py | 1 -
 2 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/lldb/source/Utility/ArchSpec.cpp b/lldb/source/Utility/ArchSpec.cpp
index b61d180bca1e..348a62dd0df4 100644
--- a/lldb/source/Utility/ArchSpec.cpp
+++ b/lldb/source/Utility/ArchSpec.cpp
@@ -583,7 +583,6 @@ void ArchSpec::SetFlags(const std::string &elf_abi) {
 
 std::string ArchSpec::GetClangTargetCPU() const {
   std::string cpu;
-
   if (IsMIPS()) {
     switch (m_core) {
     case ArchSpec::eCore_mips32:
@@ -630,6 +629,9 @@ std::string ArchSpec::GetClangTargetCPU() const {
       break;
     }
   }
+
+  if (GetTriple().isARM())
+    cpu = GetTriple().getARMCPUForArch("").str();
   return cpu;
 }
 
diff --git a/lldb/test/API/lang/c/fpeval/TestFPEval.py b/lldb/test/API/lang/c/fpeval/TestFPEval.py
index 6a3dc955ebf6..694d1ed7aa99 100644
--- a/lldb/test/API/lang/c/fpeval/TestFPEval.py
+++ b/lldb/test/API/lang/c/fpeval/TestFPEval.py
@@ -19,7 +19,6 @@ class FPEvalTestCase(TestBase):
         # Find the line number to break inside main().
         self.line = line_number('main.c', '// Set break point at this line.')
 
-    @skipIf(archs=no_match(['amd64', 'x86_64', 'arm64'])) # lldb jitter incorrectly evals function with FP args on 32 bit arm
     def test(self):
         """Test floating point expressions while jitter is disabled."""
         self.build()