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[AIX] Enabling vector type arguments and return for AIX 

This patch enables vector type arguments on AIX.  All non-aggregate Altivec vector types are 16bytes in size and are 16byte aligned.

Reviewed By: Xiangling_L

Differential Revision: https://reviews.llvm.org/D92117
This commit is contained in:
Zarko Todorovski 2020-11-27 08:31:56 -05:00
parent e4c74fd9dd
commit ff8e8c1b14
3 changed files with 49 additions and 14 deletions
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9
clang/lib/CodeGen/TargetInfo.cpp
View File

@ -4514,7 +4514,7 @@ ABIArgInfo AIXABIInfo::classifyReturnType(QualType RetTy) const {
return ABIArgInfo::getDirect();
if (RetTy->isVectorType())
llvm::report_fatal_error("vector type is not supported on AIX yet");
return ABIArgInfo::getDirect();
if (RetTy->isVoidType())
return ABIArgInfo::getIgnore();
@ -4533,7 +4533,7 @@ ABIArgInfo AIXABIInfo::classifyArgumentType(QualType Ty) const {
return ABIArgInfo::getDirect();
if (Ty->isVectorType())
llvm::report_fatal_error("vector type is not supported on AIX yet");
return ABIArgInfo::getDirect();
if (isAggregateTypeForABI(Ty)) {
// Records with non-trivial destructors/copy-constructors should not be
@ -4558,7 +4558,7 @@ CharUnits AIXABIInfo::getParamTypeAlignment(QualType Ty) const {
Ty = CTy->getElementType();
if (Ty->isVectorType())
llvm::report_fatal_error("vector type is not supported on AIX yet");
return CharUnits::fromQuantity(16);
// If the structure contains a vector type, the alignment is 16.
if (isRecordWithSIMDVectorType(getContext(), Ty))
@ -4573,7 +4573,8 @@ Address AIXABIInfo::EmitVAArg(CodeGenFunction &CGF, Address VAListAddr,
llvm::report_fatal_error("complex type is not supported on AIX yet");
if (Ty->isVectorType())
llvm::report_fatal_error("vector type is not supported on AIX yet");
llvm::report_fatal_error(
"vector types are not yet supported for variadic functions on AIX");
auto TypeInfo = getContext().getTypeInfoInChars(Ty);
TypeInfo.Align = getParamTypeAlignment(Ty);

44
clang/test/CodeGen/aix-altivec.c Normal file
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@ -0,0 +1,44 @@
// REQUIRES: powerpc-registered-target
// RUN: %clang_cc1 -triple powerpc64-unknown-aix -target-feature +altivec -target-cpu pwr8 -emit-llvm %s -o - | FileCheck %s
// RUN: %clang_cc1 -triple powerpc-unknown-aix -target-feature +altivec -target-cpu pwr8 -emit-llvm %s -o - | FileCheck %s
vector float foo1(vector float x) { return x; }
// CHECK: define <4 x float> @foo1(<4 x float> %x) [[ATTR:#[0-9]+]] {
// CHECK: entry:
// CHECK: %x.addr = alloca <4 x float>, align 16
// CHECK: store <4 x float> %x, <4 x float>* %x.addr, align 16
// CHECK: %0 = load <4 x float>, <4 x float>* %x.addr, align 16
// CHECK: ret <4 x float> %0
// CHECK: }
vector double foo2(vector double x) { return x; }
// CHECK: define <2 x double> @foo2(<2 x double> %x) [[ATTR]] {
// CHECK: entry:
// CHECK: %x.addr = alloca <2 x double>, align 16
// CHECK: store <2 x double> %x, <2 x double>* %x.addr, align 16
// CHECK: %0 = load <2 x double>, <2 x double>* %x.addr, align 16
// CHECK: ret <2 x double> %0
// CHECK: }
vector int foo3(vector int x) { return x; }
// CHECK: define <4 x i32> @foo3(<4 x i32> %x) [[ATTR]] {
// CHECK: entry:
// CHECK: %x.addr = alloca <4 x i32>, align 16
// CHECK: store <4 x i32> %x, <4 x i32>* %x.addr, align 16
// CHECK: %0 = load <4 x i32>, <4 x i32>* %x.addr, align 16
// CHECK: ret <4 x i32> %0
// CHECK: }
vector short int foo4(vector short int x) { return x; }
// CHECK: define <8 x i16> @foo4(<8 x i16> %x) [[ATTR]] {
// CHECK: entry:
// CHECK: %x.addr = alloca <8 x i16>, align 16
// CHECK: store <8 x i16> %x, <8 x i16>* %x.addr, align 16
// CHECK: %0 = load <8 x i16>, <8 x i16>* %x.addr, align 16
// CHECK: ret <8 x i16> %0
// CHECK: }
vector char foo5(vector char x) { return x; }
// CHECK: define <16 x i8> @foo5(<16 x i8> %x) [[ATTR]] {
// CHECK: entry:
// CHECK: %x.addr = alloca <16 x i8>, align 16
// CHECK: store <16 x i8> %x, <16 x i8>* %x.addr, align 16
// CHECK: %0 = load <16 x i8>, <16 x i8>* %x.addr, align 16
// CHECK: ret <16 x i8> %0
// CHECK: }

10
clang/test/CodeGen/aix-vector.c
View File

@ -1,10 +0,0 @@
// REQUIRES: powerpc-registered-target
// RUN: not %clang_cc1 -triple powerpc-unknown-aix -target-feature +altivec \
// RUN: -emit-llvm -o - %s 2>&1 | FileCheck %s
// RUN: not %clang_cc1 -triple powerpc64-unknown-aix -target-feature +altivec \
// RUN: -emit-llvm -o - %s 2>&1 | FileCheck %s
// CHECK: fatal error: error in backend: vector type is not supported on AIX yet
vector signed int retVector(vector signed int x) {
return x;
}