forked from OSchip/llvm-project
[X86] Roll some loops. NFCI.
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47ee404075
commit
ff889df356
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@ -191,12 +191,10 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
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setTruncStoreAction(MVT::f64, MVT::f32, Expand);
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// SETOEQ and SETUNE require checking two conditions.
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setCondCodeAction(ISD::SETOEQ, MVT::f32, Expand);
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setCondCodeAction(ISD::SETOEQ, MVT::f64, Expand);
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setCondCodeAction(ISD::SETOEQ, MVT::f80, Expand);
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setCondCodeAction(ISD::SETUNE, MVT::f32, Expand);
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setCondCodeAction(ISD::SETUNE, MVT::f64, Expand);
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setCondCodeAction(ISD::SETUNE, MVT::f80, Expand);
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for (auto VT : {MVT::f32, MVT::f64, MVT::f80}) {
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setCondCodeAction(ISD::SETOEQ, VT, Expand);
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setCondCodeAction(ISD::SETUNE, VT, Expand);
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}
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// Integer absolute.
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if (Subtarget.hasCMov()) {
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@ -361,47 +359,28 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
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setOperationPromotedToType(ISD::CTLZ , MVT::i8 , MVT::i32);
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setOperationPromotedToType(ISD::CTLZ_ZERO_UNDEF, MVT::i8 , MVT::i32);
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} else {
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setOperationAction(ISD::CTLZ , MVT::i8 , Custom);
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setOperationAction(ISD::CTLZ , MVT::i16 , Custom);
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setOperationAction(ISD::CTLZ , MVT::i32 , Custom);
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setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i8 , Custom);
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setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i16 , Custom);
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setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i32 , Custom);
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if (Subtarget.is64Bit()) {
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setOperationAction(ISD::CTLZ , MVT::i64 , Custom);
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setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i64, Custom);
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for (auto VT : {MVT::i8, MVT::i16, MVT::i32, MVT::i64}) {
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if (VT == MVT::i64 && !Subtarget.is64Bit())
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continue;
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setOperationAction(ISD::CTLZ , VT, Custom);
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setOperationAction(ISD::CTLZ_ZERO_UNDEF, VT, Custom);
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}
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}
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// Special handling for half-precision floating point conversions.
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// If we don't have F16C support, then lower half float conversions
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// into library calls.
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if (!Subtarget.useSoftFloat() && Subtarget.hasF16C()) {
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setOperationAction(ISD::FP16_TO_FP, MVT::f32, Custom);
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setOperationAction(ISD::STRICT_FP16_TO_FP, MVT::f32, Custom);
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setOperationAction(ISD::FP_TO_FP16, MVT::f32, Custom);
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setOperationAction(ISD::STRICT_FP_TO_FP16, MVT::f32, Custom);
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} else {
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setOperationAction(ISD::FP16_TO_FP, MVT::f32, Expand);
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setOperationAction(ISD::STRICT_FP16_TO_FP, MVT::f32, Expand);
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setOperationAction(ISD::FP_TO_FP16, MVT::f32, Expand);
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setOperationAction(ISD::STRICT_FP_TO_FP16, MVT::f32, Expand);
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for (auto Op : {ISD::FP16_TO_FP, ISD::STRICT_FP16_TO_FP, ISD::FP_TO_FP16,
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ISD::STRICT_FP_TO_FP16}) {
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// Special handling for half-precision floating point conversions.
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// If we don't have F16C support, then lower half float conversions
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// into library calls.
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setOperationAction(
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Op, MVT::f32,
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(!Subtarget.useSoftFloat() && Subtarget.hasF16C()) ? Custom : Expand);
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// There's never any support for operations beyond MVT::f32.
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setOperationAction(Op, MVT::f64, Expand);
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setOperationAction(Op, MVT::f80, Expand);
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setOperationAction(Op, MVT::f128, Expand);
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}
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// There's never any support for operations beyond MVT::f32.
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setOperationAction(ISD::FP16_TO_FP, MVT::f64, Expand);
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setOperationAction(ISD::FP16_TO_FP, MVT::f80, Expand);
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setOperationAction(ISD::FP16_TO_FP, MVT::f128, Expand);
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setOperationAction(ISD::STRICT_FP16_TO_FP, MVT::f64, Expand);
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setOperationAction(ISD::STRICT_FP16_TO_FP, MVT::f80, Expand);
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setOperationAction(ISD::STRICT_FP16_TO_FP, MVT::f128, Expand);
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setOperationAction(ISD::FP_TO_FP16, MVT::f64, Expand);
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setOperationAction(ISD::FP_TO_FP16, MVT::f80, Expand);
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setOperationAction(ISD::FP_TO_FP16, MVT::f128, Expand);
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setOperationAction(ISD::STRICT_FP_TO_FP16, MVT::f64, Expand);
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setOperationAction(ISD::STRICT_FP_TO_FP16, MVT::f80, Expand);
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setOperationAction(ISD::STRICT_FP_TO_FP16, MVT::f128, Expand);
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setLoadExtAction(ISD::EXTLOAD, MVT::f32, MVT::f16, Expand);
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setLoadExtAction(ISD::EXTLOAD, MVT::f64, MVT::f16, Expand);
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setLoadExtAction(ISD::EXTLOAD, MVT::f80, MVT::f16, Expand);
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