forked from OSchip/llvm-project
[Hexagon] Recognize hexagonv62 as a valid target CPU
llvm-svn: 297778
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@ -2326,6 +2326,8 @@ def mv55 : Flag<["-"], "mv55">, Group<m_hexagon_Features_Group>,
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Alias<mcpu_EQ>, AliasArgs<["hexagonv55"]>;
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def mv60 : Flag<["-"], "mv60">, Group<m_hexagon_Features_Group>,
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Alias<mcpu_EQ>, AliasArgs<["hexagonv60"]>;
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def mv62 : Flag<["-"], "mv62">, Group<m_hexagon_Features_Group>,
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Alias<mcpu_EQ>, AliasArgs<["hexagonv62"]>;
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def mhexagon_hvx : Flag<["-"], "mhvx">, Group<m_hexagon_Features_Group>,
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Flags<[CC1Option]>, HelpText<"Enable Hexagon Vector eXtensions">;
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def mno_hexagon_hvx : Flag<["-"], "mno-hvx">, Group<m_hexagon_Features_Group>,
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@ -6461,6 +6461,7 @@ public:
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.Case("hexagonv5", "5")
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.Case("hexagonv55", "55")
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.Case("hexagonv60", "60")
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.Case("hexagonv62", "62")
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.Default(nullptr);
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}
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@ -6505,6 +6506,9 @@ void HexagonTargetInfo::getTargetDefines(const LangOptions &Opts,
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Builder.defineMacro("__HEXAGON_ARCH__", "60");
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Builder.defineMacro("__QDSP6_V60__");
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Builder.defineMacro("__QDSP6_ARCH__", "60");
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} else if (CPU == "hexagonv62") {
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Builder.defineMacro("__HEXAGON_V62__");
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Builder.defineMacro("__HEXAGON_ARCH__", "62");
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}
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if (hasFeature("hvx")) {
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@ -89,6 +89,14 @@
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// CHECK023: "-cc1" {{.*}} "-target-cpu" "hexagonv60"
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// CHECK023: hexagon-link{{.*}}/Inputs/hexagon_tree/Tools/bin/../target/hexagon/lib/v60/crt0
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// RUN: %clang -### -target hexagon-unknown-elf \
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// RUN: -ccc-install-dir %S/Inputs/hexagon_tree/Tools/bin \
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// RUN: -mcpu=hexagonv62 \
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// RUN: %s 2>&1 \
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// RUN: | FileCheck -check-prefix=CHECK024 %s
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// CHECK024: "-cc1" {{.*}} "-target-cpu" "hexagonv62"
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// CHECK024: hexagon-link{{.*}}/Inputs/hexagon_tree/Tools/bin/../target/hexagon/lib/v62/crt0
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// -----------------------------------------------------------------------------
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// Test Linker related args
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// -----------------------------------------------------------------------------
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