forked from OSchip/llvm-project
ARM: TLS calling convention doesn't preserve r9 or r12 on Darwin.
llvm-svn: 300726
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@ -273,9 +273,9 @@ def CSR_iOS_SwiftError : CalleeSavedRegs<(sub CSR_iOS, R8)>;
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def CSR_iOS_ThisReturn : CalleeSavedRegs<(add LR, R7, R6, R5, R4,
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(sub CSR_AAPCS_ThisReturn, R9))>;
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def CSR_iOS_TLSCall : CalleeSavedRegs<(add LR, SP,
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(sequence "R%u", 12, 1),
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(sequence "D%u", 31, 0))>;
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def CSR_iOS_TLSCall
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: CalleeSavedRegs<(add LR, SP, (sub(sequence "R%u", 12, 1), R9, R12),
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(sequence "D%u", 31, 0))>;
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// C++ TLS access function saves all registers except SP. Try to match
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// the order of CSRs in CSR_iOS.
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@ -0,0 +1,24 @@
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; RUN: llc -mtriple=thumbv7k-apple-watchos2.0 -arm-atomic-cfg-tidy=0 -o - %s | FileCheck %s
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@tls_var = thread_local global i32 0
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; r9 and r12 can be live across the asm, but those get clobbered by the TLS
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; access (in a different BB to order it).
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define i32 @test_regs_preserved(i32* %ptr1, i32* %ptr2, i1 %tst1) {
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; CHECK-LABEL: test_regs_preserved:
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; CHECK: str {{.*}}, [sp
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; CHECK: mov {{.*}}, r12
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entry:
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call void asm sideeffect "", "~{r0},~{r1},~{r2},~{r3},~{r4},~{r5},~{r6},~{r7},~{r8},~{r10},~{r11},~{r13},~{lr}"()
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br i1 %tst1, label %get_tls, label %done
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get_tls:
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%val = load i32, i32* @tls_var
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br label %done
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done:
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%res = phi i32 [%val, %get_tls], [0, %entry]
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store i32 42, i32* %ptr1
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store i32 42, i32* %ptr2
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ret i32 %res
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}
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