ARM: TLS calling convention doesn't preserve r9 or r12 on Darwin.

llvm-svn: 300726
This commit is contained in:
Tim Northover 2017-04-19 18:07:54 +00:00
parent ded7d59f0e
commit ff168c68dc
2 changed files with 27 additions and 3 deletions

View File

@ -273,9 +273,9 @@ def CSR_iOS_SwiftError : CalleeSavedRegs<(sub CSR_iOS, R8)>;
def CSR_iOS_ThisReturn : CalleeSavedRegs<(add LR, R7, R6, R5, R4,
(sub CSR_AAPCS_ThisReturn, R9))>;
def CSR_iOS_TLSCall : CalleeSavedRegs<(add LR, SP,
(sequence "R%u", 12, 1),
(sequence "D%u", 31, 0))>;
def CSR_iOS_TLSCall
: CalleeSavedRegs<(add LR, SP, (sub(sequence "R%u", 12, 1), R9, R12),
(sequence "D%u", 31, 0))>;
// C++ TLS access function saves all registers except SP. Try to match
// the order of CSRs in CSR_iOS.

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@ -0,0 +1,24 @@
; RUN: llc -mtriple=thumbv7k-apple-watchos2.0 -arm-atomic-cfg-tidy=0 -o - %s | FileCheck %s
@tls_var = thread_local global i32 0
; r9 and r12 can be live across the asm, but those get clobbered by the TLS
; access (in a different BB to order it).
define i32 @test_regs_preserved(i32* %ptr1, i32* %ptr2, i1 %tst1) {
; CHECK-LABEL: test_regs_preserved:
; CHECK: str {{.*}}, [sp
; CHECK: mov {{.*}}, r12
entry:
call void asm sideeffect "", "~{r0},~{r1},~{r2},~{r3},~{r4},~{r5},~{r6},~{r7},~{r8},~{r10},~{r11},~{r13},~{lr}"()
br i1 %tst1, label %get_tls, label %done
get_tls:
%val = load i32, i32* @tls_var
br label %done
done:
%res = phi i32 [%val, %get_tls], [0, %entry]
store i32 42, i32* %ptr1
store i32 42, i32* %ptr2
ret i32 %res
}