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simplify some code based on the fact that picstyles != none are only valid 

in pic or dynamic-no-pic mode. Also, x86-64 never used picstylegot.

llvm-svn: 75101
This commit is contained in:
Chris Lattner 2009-07-09 04:39:06 +00:00
parent 62f568c037
commit fef11d6e77
4 changed files with 16 additions and 23 deletions
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31
llvm/lib/Target/X86/X86FastISel.cpp
View File

@ -470,8 +470,7 @@ bool X86FastISel::X86SelectAddress(Value *V, X86AddressMode &AM, bool isCall) {
Opc = X86::MOV32rm;
RC = X86::GR32RegisterClass;
if (Subtarget->isPICStyleGOT() &&
TM.getRelocationModel() == Reloc::PIC_)
if (Subtarget->isPICStyleGOT())
StubAM.GVOpFlags = X86II::MO_GOT;
} else {
@ -1294,9 +1293,7 @@ bool X86FastISel::X86SelectCall(Instruction *I) {
// ELF / PIC requires GOT in the EBX register before function calls via PLT
// GOT pointer.
if (!Subtarget->is64Bit() &&
TM.getRelocationModel() == Reloc::PIC_ &&
Subtarget->isPICStyleGOT()) {
if (Subtarget->isPICStyleGOT()) {
TargetRegisterClass *RC = X86::GR32RegisterClass;
unsigned Base = getInstrInfo()->getGlobalBaseReg(&MF);
bool Emitted = TII.copyRegToReg(*MBB, MBB->end(), X86::EBX, Base, RC, RC);
@ -1313,9 +1310,7 @@ bool X86FastISel::X86SelectCall(Instruction *I) {
: BuildMI(MBB, DL, TII.get(CallOpc)).addGlobalAddress(GV);
// Add an implicit use GOT pointer in EBX.
if (!Subtarget->is64Bit() &&
TM.getRelocationModel() == Reloc::PIC_ &&
Subtarget->isPICStyleGOT())
if (Subtarget->isPICStyleGOT())
MIB.addReg(X86::EBX);
// Add implicit physical register uses to the call.
@ -1509,16 +1504,16 @@ unsigned X86FastISel::TargetMaterializeConstant(Constant *C) {
// x86-32 PIC requires a PIC base register for constant pools.
unsigned PICBase = 0;
unsigned char OpFlag = 0;
if (TM.getRelocationModel() == Reloc::PIC_) {
if (Subtarget->isPICStyleStub()) {
OpFlag = X86II::MO_PIC_BASE_OFFSET;
PICBase = getInstrInfo()->getGlobalBaseReg(&MF);
} else if (Subtarget->isPICStyleGOT()) {
OpFlag = X86II::MO_GOTOFF;
PICBase = getInstrInfo()->getGlobalBaseReg(&MF);
} else if (Subtarget->isPICStyleRIPRel() &&
TM.getCodeModel() == CodeModel::Small)
PICBase = X86::RIP;
if (Subtarget->isPICStyleStub() &&
TM.getRelocationModel() == Reloc::PIC_) { // Not dynamic-no-pic
OpFlag = X86II::MO_PIC_BASE_OFFSET;
PICBase = getInstrInfo()->getGlobalBaseReg(&MF);
} else if (Subtarget->isPICStyleGOT()) {
OpFlag = X86II::MO_GOTOFF;
PICBase = getInstrInfo()->getGlobalBaseReg(&MF);
} else if (Subtarget->isPICStyleRIPRel() &&
TM.getCodeModel() == CodeModel::Small) {
PICBase = X86::RIP;
}
// Create the load from the constant pool.

2
llvm/lib/Target/X86/X86ISelLowering.cpp
View File

@ -1811,7 +1811,7 @@ SDValue X86TargetLowering::LowerCALL(SDValue Op, SelectionDAG &DAG) {
!G->getGlobal()->hasProtectedVisibility())
Callee = LowerGlobalAddress(Callee, DAG);
else if (isa<ExternalSymbolSDNode>(Callee))
Callee = LowerExternalSymbol(Callee,DAG);
Callee = LowerExternalSymbol(Callee, DAG);
}
}

3
llvm/lib/Target/X86/X86InstrInfo.cpp
View File

@ -3245,8 +3245,7 @@ unsigned X86InstrInfo::getGlobalBaseReg(MachineFunction *MF) const {
// If we're using vanilla 'GOT' PIC style, we should use relative addressing
// not to pc, but to _GLOBAL_OFFSET_TABLE_ external.
if (TM.getRelocationModel() == Reloc::PIC_ &&
TM.getSubtarget<X86Subtarget>().isPICStyleGOT()) {
if (TM.getSubtarget<X86Subtarget>().isPICStyleGOT()) {
GlobalBaseReg = RegInfo.createVirtualRegister(X86::GR32RegisterClass);
// Generate addl $__GLOBAL_OFFSET_TABLE_ + [.-piclabel], %some_register
BuildMI(FirstMBB, MBBI, DL, TII->get(X86::ADD32ri), GlobalBaseReg)

3
llvm/lib/Target/X86/X86Subtarget.cpp
View File

@ -77,8 +77,7 @@ bool X86Subtarget::GVRequiresExtraLoad(const GlobalValue* GV,
/// a register, but not an extra load.
bool X86Subtarget::GVRequiresRegister(const GlobalValue *GV,
const TargetMachine& TM,
bool isDirectCall) const
{
bool isDirectCall) const {
if (GVRequiresExtraLoad(GV, TM, isDirectCall))
return true;
// Code below here need only consider cases where GVRequiresExtraLoad