* Inquire about the number of operands from the instruction directly

* Only check for a register if we are sure the instruction has one allocated

llvm-svn: 14509
This commit is contained in:
Misha Brukman 2004-06-30 21:54:12 +00:00
parent 04f07b4589
commit fee5a22f8a
2 changed files with 8 additions and 4 deletions

View File

@ -498,7 +498,8 @@ void Printer::printMachineInstruction(const MachineInstr *MI) {
const TargetInstrDescriptor &Desc = TII.get(Opcode);
unsigned int i;
unsigned int ArgCount = Desc.TSFlags & PPC32II::ArgCountMask;
unsigned int ArgCount = MI->getNumOperands();
//Desc.TSFlags & PPC32II::ArgCountMask;
unsigned int ArgType[] = {
(Desc.TSFlags >> PPC32II::Arg0TypeShift) & PPC32II::ArgTypeMask,
(Desc.TSFlags >> PPC32II::Arg1TypeShift) & PPC32II::ArgTypeMask,
@ -554,7 +555,8 @@ void Printer::printMachineInstruction(const MachineInstr *MI) {
O << ", ";
printOp(MI->getOperand(1));
O << "(";
if (MI->getOperand(2).getReg() == PPC32::R0)
if (MI->getOperand(2).hasAllocatedReg() &&
MI->getOperand(2).getReg() == PPC32::R0)
O << "0";
else
printOp(MI->getOperand(2));

View File

@ -498,7 +498,8 @@ void Printer::printMachineInstruction(const MachineInstr *MI) {
const TargetInstrDescriptor &Desc = TII.get(Opcode);
unsigned int i;
unsigned int ArgCount = Desc.TSFlags & PPC32II::ArgCountMask;
unsigned int ArgCount = MI->getNumOperands();
//Desc.TSFlags & PPC32II::ArgCountMask;
unsigned int ArgType[] = {
(Desc.TSFlags >> PPC32II::Arg0TypeShift) & PPC32II::ArgTypeMask,
(Desc.TSFlags >> PPC32II::Arg1TypeShift) & PPC32II::ArgTypeMask,
@ -554,7 +555,8 @@ void Printer::printMachineInstruction(const MachineInstr *MI) {
O << ", ";
printOp(MI->getOperand(1));
O << "(";
if (MI->getOperand(2).getReg() == PPC32::R0)
if (MI->getOperand(2).hasAllocatedReg() &&
MI->getOperand(2).getReg() == PPC32::R0)
O << "0";
else
printOp(MI->getOperand(2));