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correct selection requirements for thumb2 vs. arm versions of the barrier intrinsics 

llvm-svn: 91313
This commit is contained in:
Jim Grosbach 2009-12-14 19:24:11 +00:00
parent 1dba6ea72f
commit fed3d088ce
2 changed files with 6 additions and 4 deletions
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4
llvm/lib/Target/ARM/ARMInstrInfo.td
View File

@ -1579,7 +1579,7 @@ def Int_MemBarrierV7 : AInoP<(outs), (ins),
Pseudo, NoItinerary,
"dmb", "",
[(ARMMemBarrier)]>,
Requires<[HasV7]> {
Requires<[IsARM, HasV7]> {
let Inst{31-4} = 0xf57ff05;
// FIXME: add support for options other than a full system DMB
let Inst{3-0} = 0b1111;
@ -1589,7 +1589,7 @@ def Int_SyncBarrierV7 : AInoP<(outs), (ins),
Pseudo, NoItinerary,
"dsb", "",
[(ARMSyncBarrier)]>,
Requires<[HasV7]> {
Requires<[IsARM, HasV7]> {
let Inst{31-4} = 0xf57ff04;
// FIXME: add support for options other than a full system DSB
let Inst{3-0} = 0b1111;

6
llvm/lib/Target/ARM/ARMInstrThumb2.td
View File

@ -1073,14 +1073,16 @@ let hasSideEffects = 1 in {
def t2Int_MemBarrierV7 : AInoP<(outs), (ins),
Pseudo, NoItinerary,
"dmb", "",
[(ARMMemBarrier)]> {
[(ARMMemBarrier)]>,
Requires<[IsThumb2]> {
// FIXME: add support for options other than a full system DMB
}
def t2Int_SyncBarrierV7 : AInoP<(outs), (ins),
Pseudo, NoItinerary,
"dsb", "",
[(ARMSyncBarrier)]> {
[(ARMSyncBarrier)]>,
Requires<[IsThumb2]> {
// FIXME: add support for options other than a full system DSB
}
}