From fe6c9cbb2440be652b9f7697bf945323e28a9fe4 Mon Sep 17 00:00:00 2001 From: Puyan Lotfi Date: Wed, 10 Jan 2018 00:56:48 +0000 Subject: [PATCH] [MIR] Repurposing '$' sigil used by external symbols. Replacing with '&'. Planning to add support for named vregs. This puts is in a conundrum since physregs are named as well. To rectify this we need to use a sigil other than '%' for physregs in MIR. We've settled on using '$' for physregs but first we must repurpose it from external symbols using it, which is what this commit is all about. We think '&' will have familiar semantics for C/C++ users. llvm-svn: 322146 --- llvm/lib/CodeGen/MIRParser/MILexer.cpp | 2 +- llvm/lib/CodeGen/MIRPrinter.cpp | 2 +- llvm/lib/CodeGen/MachineOperand.cpp | 2 +- .../AArch64/GlobalISel/arm64-irtranslator.ll | 10 +- .../AArch64/GlobalISel/legalize-pow.mir | 4 +- .../AArch64/GlobalISel/legalize-rem.mir | 4 +- llvm/test/CodeGen/AArch64/ldst-opt.mir | 4 +- llvm/test/CodeGen/AArch64/spill-undef.mir | 4 +- llvm/test/CodeGen/AMDGPU/hazard-inlineasm.mir | 2 +- llvm/test/CodeGen/AMDGPU/hazard.mir | 2 +- .../ARM/GlobalISel/arm-legalize-divmod.mir | 48 ++--- .../ARM/GlobalISel/arm-legalize-fp.mir | 176 +++++++++--------- llvm/test/CodeGen/ARM/Windows/vla-cpsr.ll | 2 +- llvm/test/CodeGen/MIR/AArch64/spill-fold.mir | 10 +- ...egalizer-multiple-mem-operands-atomics.mir | 4 +- ...er-multiple-mem-operands-nontemporal-1.mir | 4 +- ...er-multiple-mem-operands-nontemporal-2.mir | 4 +- llvm/test/CodeGen/MIR/ARM/cfi-same-value.mir | 2 +- ...lobal-value-or-symbol-after-call-entry.mir | 2 +- .../test/CodeGen/MIR/Mips/memory-operands.mir | 8 +- .../NVPTX/expected-floating-point-literal.mir | 2 +- .../floating-point-immediate-operands.mir | 8 +- .../floating-point-invalid-type-error.mir | 2 +- .../X86/def-register-already-tied-error.mir | 2 +- .../MIR/X86/early-clobber-register-flag.mir | 4 +- .../X86/expected-integer-after-tied-def.mir | 2 +- .../X86/expected-tied-def-after-lparen.mir | 2 +- .../MIR/X86/external-symbol-operands.mir | 24 +-- .../MIR/X86/frame-info-stack-references.mir | 2 +- .../CodeGen/MIR/X86/inline-asm-registers.mir | 8 +- llvm/test/CodeGen/MIR/X86/inline-asm.mir | 4 +- .../MIR/X86/invalid-tied-def-index-error.mir | 2 +- llvm/test/CodeGen/MIR/X86/memory-operands.mir | 2 +- .../MIR/X86/tied-def-operand-invalid.mir | 2 +- .../mirparser/target-flags-pic-mxgot-tls.mir | 18 +- llvm/test/CodeGen/PowerPC/aantidep-def-ec.mir | 4 +- .../SystemZ/RAbasic-invalid-LR-update.mir | 2 +- llvm/test/CodeGen/SystemZ/fp-cmp-07.mir | 2 +- .../CodeGen/X86/stack-protector-weight.ll | 2 +- llvm/unittests/CodeGen/MachineOperandTest.cpp | 6 +- 40 files changed, 198 insertions(+), 198 deletions(-) diff --git a/llvm/lib/CodeGen/MIRParser/MILexer.cpp b/llvm/lib/CodeGen/MIRParser/MILexer.cpp index 397fdbfe5ee4..a5d66b5c9799 100644 --- a/llvm/lib/CodeGen/MIRParser/MILexer.cpp +++ b/llvm/lib/CodeGen/MIRParser/MILexer.cpp @@ -442,7 +442,7 @@ static Cursor maybeLexGlobalValue(Cursor C, MIToken &Token, static Cursor maybeLexExternalSymbol(Cursor C, MIToken &Token, ErrorCallbackType ErrorCallback) { - if (C.peek() != '$') + if (C.peek() != '&') return None; return lexName(C, Token, MIToken::ExternalSymbol, /*PrefixLength=*/1, ErrorCallback); diff --git a/llvm/lib/CodeGen/MIRPrinter.cpp b/llvm/lib/CodeGen/MIRPrinter.cpp index cd3ec2ef353d..90515a6a9a20 100644 --- a/llvm/lib/CodeGen/MIRPrinter.cpp +++ b/llvm/lib/CodeGen/MIRPrinter.cpp @@ -863,7 +863,7 @@ void MIPrinter::print(const LLVMContext &Context, const TargetInstrInfo &TII, OS, /*PrintType=*/false, MST); break; case PseudoSourceValue::ExternalSymbolCallEntry: - OS << "call-entry $"; + OS << "call-entry &"; printLLVMNameWithoutPrefix( OS, cast(PVal)->getSymbol()); break; diff --git a/llvm/lib/CodeGen/MachineOperand.cpp b/llvm/lib/CodeGen/MachineOperand.cpp index ec81c6391171..b4bfa3fecf02 100644 --- a/llvm/lib/CodeGen/MachineOperand.cpp +++ b/llvm/lib/CodeGen/MachineOperand.cpp @@ -752,7 +752,7 @@ void MachineOperand::print(raw_ostream &OS, ModuleSlotTracker &MST, break; case MachineOperand::MO_ExternalSymbol: { StringRef Name = getSymbolName(); - OS << '$'; + OS << '&'; if (Name.empty()) { OS << "\"\""; } else { diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll b/llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll index e78683279754..f710cd7551da 100644 --- a/llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll +++ b/llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll @@ -1156,7 +1156,7 @@ define void @test_memcpy(i8* %dst, i8* %src, i64 %size) { ; CHECK: %x0 = COPY [[DST]] ; CHECK: %x1 = COPY [[SRC]] ; CHECK: %x2 = COPY [[SIZE]] -; CHECK: BL $memcpy, csr_aarch64_aapcs, implicit-def %lr, implicit %sp, implicit %x0, implicit %x1, implicit %x2 +; CHECK: BL &memcpy, csr_aarch64_aapcs, implicit-def %lr, implicit %sp, implicit %x0, implicit %x1, implicit %x2 call void @llvm.memcpy.p0i8.p0i8.i64(i8* %dst, i8* %src, i64 %size, i32 1, i1 0) ret void } @@ -1170,7 +1170,7 @@ define void @test_memmove(i8* %dst, i8* %src, i64 %size) { ; CHECK: %x0 = COPY [[DST]] ; CHECK: %x1 = COPY [[SRC]] ; CHECK: %x2 = COPY [[SIZE]] -; CHECK: BL $memmove, csr_aarch64_aapcs, implicit-def %lr, implicit %sp, implicit %x0, implicit %x1, implicit %x2 +; CHECK: BL &memmove, csr_aarch64_aapcs, implicit-def %lr, implicit %sp, implicit %x0, implicit %x1, implicit %x2 call void @llvm.memmove.p0i8.p0i8.i64(i8* %dst, i8* %src, i64 %size, i32 1, i1 0) ret void } @@ -1186,7 +1186,7 @@ define void @test_memset(i8* %dst, i8 %val, i64 %size) { ; CHECK: [[SRC_TMP:%[0-9]+]]:_(s32) = G_ANYEXT [[SRC]] ; CHECK: %w1 = COPY [[SRC_TMP]] ; CHECK: %x2 = COPY [[SIZE]] -; CHECK: BL $memset, csr_aarch64_aapcs, implicit-def %lr, implicit %sp, implicit %x0, implicit %w1, implicit %x2 +; CHECK: BL &memset, csr_aarch64_aapcs, implicit-def %lr, implicit %sp, implicit %x0, implicit %w1, implicit %x2 call void @llvm.memset.p0i8.i64(i8* %dst, i8 %val, i64 %size, i32 1, i1 0) ret void } @@ -1370,8 +1370,8 @@ define double @test_fneg_f64(double %x) { define void @test_trivial_inlineasm() { ; CHECK-LABEL: name: test_trivial_inlineasm -; CHECK: INLINEASM $wibble, 1 -; CHECK: INLINEASM $wibble, 0 +; CHECK: INLINEASM &wibble, 1 +; CHECK: INLINEASM &wibble, 0 call void asm sideeffect "wibble", ""() call void asm "wibble", ""() ret void diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-pow.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-pow.mir index be3485919973..8b08331a69c0 100644 --- a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-pow.mir +++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-pow.mir @@ -25,14 +25,14 @@ body: | ; CHECK: %d0 = COPY %0 ; CHECK: %d1 = COPY %1 - ; CHECK: BL $pow, csr_aarch64_aapcs, implicit-def %lr, implicit %sp, implicit %d0, implicit %d1, implicit-def %d0 + ; CHECK: BL &pow, csr_aarch64_aapcs, implicit-def %lr, implicit %sp, implicit %d0, implicit %d1, implicit-def %d0 ; CHECK: %4:_(s64) = COPY %d0 %4:_(s64) = G_FPOW %0, %1 %x0 = COPY %4 ; CHECK: %s0 = COPY %2 ; CHECK: %s1 = COPY %3 - ; CHECK: BL $powf, csr_aarch64_aapcs, implicit-def %lr, implicit %sp, implicit %s0, implicit %s1, implicit-def %s0 + ; CHECK: BL &powf, csr_aarch64_aapcs, implicit-def %lr, implicit %sp, implicit %s0, implicit %s1, implicit-def %s0 ; CHECK: %5:_(s32) = COPY %s0 %5:_(s32) = G_FPOW %2, %3 %w0 = COPY %5 diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-rem.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-rem.mir index 7303a9c26fc9..00d0f883b54e 100644 --- a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-rem.mir +++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-rem.mir @@ -135,7 +135,7 @@ body: | ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def %sp, implicit %sp ; CHECK: %d0 = COPY [[COPY]](s64) ; CHECK: %d1 = COPY [[COPY1]](s64) - ; CHECK: BL $fmod, csr_aarch64_aapcs, implicit-def %lr, implicit %sp, implicit %d0, implicit %d1, implicit-def %d0 + ; CHECK: BL &fmod, csr_aarch64_aapcs, implicit-def %lr, implicit %sp, implicit %d0, implicit %d1, implicit-def %d0 ; CHECK: [[COPY2:%[0-9]+]]:_(s64) = COPY %d0 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def %sp, implicit %sp ; CHECK: %x0 = COPY [[COPY2]](s64) @@ -144,7 +144,7 @@ body: | ; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def %sp, implicit %sp ; CHECK: %s0 = COPY [[TRUNC]](s32) ; CHECK: %s1 = COPY [[TRUNC1]](s32) - ; CHECK: BL $fmodf, csr_aarch64_aapcs, implicit-def %lr, implicit %sp, implicit %s0, implicit %s1, implicit-def %s0 + ; CHECK: BL &fmodf, csr_aarch64_aapcs, implicit-def %lr, implicit %sp, implicit %s0, implicit %s1, implicit-def %s0 ; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY %s0 ; CHECK: ADJCALLSTACKUP 0, 0, implicit-def %sp, implicit %sp ; CHECK: %w0 = COPY [[COPY3]](s32) diff --git a/llvm/test/CodeGen/AArch64/ldst-opt.mir b/llvm/test/CodeGen/AArch64/ldst-opt.mir index 9cb9528cc62e..57ac50f6ee52 100644 --- a/llvm/test/CodeGen/AArch64/ldst-opt.mir +++ b/llvm/test/CodeGen/AArch64/ldst-opt.mir @@ -172,7 +172,7 @@ body: | STRXui %x0, %sp, 0 :: (store 8) STRXui killed %x0, %sp, 2 :: (store 8) %x0 = LDRXui %sp, 0 :: (load 8) - BL $bar, csr_aarch64_aapcs, implicit-def %lr, implicit %sp, implicit %x0, implicit-def %sp + BL &bar, csr_aarch64_aapcs, implicit-def %lr, implicit %sp, implicit %x0, implicit-def %sp RET %lr ... # CHECK-LABEL: name: promote-load-from-store-trivial-kills @@ -180,4 +180,4 @@ body: | # CHECK: STRXui %x0, %sp, 2 # CHECK-NOT: LDRXui # CHECK-NOT: ORR -# CHECK: BL $bar, csr_aarch64_aapcs, implicit-def %lr, implicit %sp, implicit %x0, implicit-def %sp +# CHECK: BL &bar, csr_aarch64_aapcs, implicit-def %lr, implicit %sp, implicit %x0, implicit-def %sp diff --git a/llvm/test/CodeGen/AArch64/spill-undef.mir b/llvm/test/CodeGen/AArch64/spill-undef.mir index c4f589b5cc49..ddd02d1a86de 100644 --- a/llvm/test/CodeGen/AArch64/spill-undef.mir +++ b/llvm/test/CodeGen/AArch64/spill-undef.mir @@ -54,10 +54,10 @@ body: | bb.1: %4 = ADRP target-flags(aarch64-page) @g %8 = LDRWui %4, target-flags(aarch64-pageoff, aarch64-nc) @g :: (volatile dereferenceable load 4 from @g) - INLINEASM $nop, 1, 12, implicit-def dead early-clobber %x0, 12, implicit-def dead early-clobber %x1, 12, implicit-def dead early-clobber %x2, 12, implicit-def dead early-clobber %x3, 12, implicit-def dead early-clobber %x4, 12, implicit-def dead early-clobber %x5, 12, implicit-def dead early-clobber %x6, 12, implicit-def dead early-clobber %x7, 12, implicit-def dead early-clobber %x8, 12, implicit-def dead early-clobber %x9, 12, implicit-def dead early-clobber %x10, 12, implicit-def dead early-clobber %x11, 12, implicit-def dead early-clobber %x12, 12, implicit-def dead early-clobber %x13, 12, implicit-def dead early-clobber %x14, 12, implicit-def dead early-clobber %x15, 12, implicit-def dead early-clobber %x16, 12, implicit-def dead early-clobber %x17, 12, implicit-def dead early-clobber %x18, 12, implicit-def dead early-clobber %x19, 12, implicit-def dead early-clobber %x20, 12, implicit-def dead early-clobber %x21, 12, implicit-def dead early-clobber %x22, 12, implicit-def dead early-clobber %x23, 12, implicit-def dead early-clobber %x24, 12, implicit-def dead early-clobber %x25, 12, implicit-def dead early-clobber %x26, 12, implicit-def dead early-clobber %x27, 12, implicit-def dead early-clobber %x28, 12, implicit-def dead early-clobber %fp, 12, implicit-def dead early-clobber %lr + INLINEASM &nop, 1, 12, implicit-def dead early-clobber %x0, 12, implicit-def dead early-clobber %x1, 12, implicit-def dead early-clobber %x2, 12, implicit-def dead early-clobber %x3, 12, implicit-def dead early-clobber %x4, 12, implicit-def dead early-clobber %x5, 12, implicit-def dead early-clobber %x6, 12, implicit-def dead early-clobber %x7, 12, implicit-def dead early-clobber %x8, 12, implicit-def dead early-clobber %x9, 12, implicit-def dead early-clobber %x10, 12, implicit-def dead early-clobber %x11, 12, implicit-def dead early-clobber %x12, 12, implicit-def dead early-clobber %x13, 12, implicit-def dead early-clobber %x14, 12, implicit-def dead early-clobber %x15, 12, implicit-def dead early-clobber %x16, 12, implicit-def dead early-clobber %x17, 12, implicit-def dead early-clobber %x18, 12, implicit-def dead early-clobber %x19, 12, implicit-def dead early-clobber %x20, 12, implicit-def dead early-clobber %x21, 12, implicit-def dead early-clobber %x22, 12, implicit-def dead early-clobber %x23, 12, implicit-def dead early-clobber %x24, 12, implicit-def dead early-clobber %x25, 12, implicit-def dead early-clobber %x26, 12, implicit-def dead early-clobber %x27, 12, implicit-def dead early-clobber %x28, 12, implicit-def dead early-clobber %fp, 12, implicit-def dead early-clobber %lr bb.2: - INLINEASM $nop, 1, 12, implicit-def dead early-clobber %x0, 12, implicit-def dead early-clobber %x1, 12, implicit-def dead early-clobber %x2, 12, implicit-def dead early-clobber %x3, 12, implicit-def dead early-clobber %x4, 12, implicit-def dead early-clobber %x5, 12, implicit-def dead early-clobber %x6, 12, implicit-def dead early-clobber %x7, 12, implicit-def dead early-clobber %x8, 12, implicit-def dead early-clobber %x9, 12, implicit-def dead early-clobber %x10, 12, implicit-def dead early-clobber %x11, 12, implicit-def dead early-clobber %x12, 12, implicit-def dead early-clobber %x13, 12, implicit-def dead early-clobber %x14, 12, implicit-def dead early-clobber %x15, 12, implicit-def dead early-clobber %x16, 12, implicit-def dead early-clobber %x17, 12, implicit-def dead early-clobber %x18, 12, implicit-def dead early-clobber %x19, 12, implicit-def dead early-clobber %x20, 12, implicit-def dead early-clobber %x21, 12, implicit-def dead early-clobber %x22, 12, implicit-def dead early-clobber %x23, 12, implicit-def dead early-clobber %x24, 12, implicit-def dead early-clobber %x25, 12, implicit-def dead early-clobber %x26, 12, implicit-def dead early-clobber %x27, 12, implicit-def dead early-clobber %x28, 12, implicit-def dead early-clobber %fp, 12, implicit-def dead early-clobber %lr + INLINEASM &nop, 1, 12, implicit-def dead early-clobber %x0, 12, implicit-def dead early-clobber %x1, 12, implicit-def dead early-clobber %x2, 12, implicit-def dead early-clobber %x3, 12, implicit-def dead early-clobber %x4, 12, implicit-def dead early-clobber %x5, 12, implicit-def dead early-clobber %x6, 12, implicit-def dead early-clobber %x7, 12, implicit-def dead early-clobber %x8, 12, implicit-def dead early-clobber %x9, 12, implicit-def dead early-clobber %x10, 12, implicit-def dead early-clobber %x11, 12, implicit-def dead early-clobber %x12, 12, implicit-def dead early-clobber %x13, 12, implicit-def dead early-clobber %x14, 12, implicit-def dead early-clobber %x15, 12, implicit-def dead early-clobber %x16, 12, implicit-def dead early-clobber %x17, 12, implicit-def dead early-clobber %x18, 12, implicit-def dead early-clobber %x19, 12, implicit-def dead early-clobber %x20, 12, implicit-def dead early-clobber %x21, 12, implicit-def dead early-clobber %x22, 12, implicit-def dead early-clobber %x23, 12, implicit-def dead early-clobber %x24, 12, implicit-def dead early-clobber %x25, 12, implicit-def dead early-clobber %x26, 12, implicit-def dead early-clobber %x27, 12, implicit-def dead early-clobber %x28, 12, implicit-def dead early-clobber %fp, 12, implicit-def dead early-clobber %lr %6 = ADRP target-flags(aarch64-page) @g %w0 = MOVi32imm 42 STRWui %8, %6, target-flags(aarch64-pageoff, aarch64-nc) @g :: (volatile store 4 into @g) diff --git a/llvm/test/CodeGen/AMDGPU/hazard-inlineasm.mir b/llvm/test/CodeGen/AMDGPU/hazard-inlineasm.mir index 6c03227d3715..6f09bb8f55f9 100644 --- a/llvm/test/CodeGen/AMDGPU/hazard-inlineasm.mir +++ b/llvm/test/CodeGen/AMDGPU/hazard-inlineasm.mir @@ -17,7 +17,7 @@ name: hazard-inlineasm body: | bb.0: FLAT_STORE_DWORDX4 %vgpr49_vgpr50, %vgpr26_vgpr27_vgpr28_vgpr29, 0, 0, 0, implicit %exec, implicit %flat_scr - INLINEASM $"v_mad_u64_u32 $0, $1, $2, $3, $4", 0, 2621450, def %vgpr26_vgpr27, 2818058, def dead %sgpr14_sgpr15, 589833, %sgpr12, 327689, killed %vgpr51, 2621449, %vgpr46_vgpr47 + INLINEASM &"v_mad_u64_u32 $0, $1, $2, $3, $4", 0, 2621450, def %vgpr26_vgpr27, 2818058, def dead %sgpr14_sgpr15, 589833, %sgpr12, 327689, killed %vgpr51, 2621449, %vgpr46_vgpr47 S_ENDPGM ... diff --git a/llvm/test/CodeGen/AMDGPU/hazard.mir b/llvm/test/CodeGen/AMDGPU/hazard.mir index 80afcbf197aa..d0caacdb9451 100644 --- a/llvm/test/CodeGen/AMDGPU/hazard.mir +++ b/llvm/test/CodeGen/AMDGPU/hazard.mir @@ -54,7 +54,7 @@ body: | liveins: %sgpr7, %vgpr4 %m0 = S_MOV_B32 killed %sgpr7 - INLINEASM $"; no-op", 1, 327690, def %vgpr5 + INLINEASM &"; no-op", 1, 327690, def %vgpr5 %vgpr0 = V_INTERP_P1_F32 killed %vgpr4, 0, 0, implicit %m0, implicit %exec SI_RETURN_TO_EPILOG killed %vgpr5, killed %vgpr0 ... diff --git a/llvm/test/CodeGen/ARM/GlobalISel/arm-legalize-divmod.mir b/llvm/test/CodeGen/ARM/GlobalISel/arm-legalize-divmod.mir index 35afaaadd941..941b7aa55d68 100644 --- a/llvm/test/CodeGen/ARM/GlobalISel/arm-legalize-divmod.mir +++ b/llvm/test/CodeGen/ARM/GlobalISel/arm-legalize-divmod.mir @@ -46,9 +46,9 @@ body: | ; SOFT: ADJCALLSTACKDOWN ; SOFT-DAG: %r0 = COPY [[X]] ; SOFT-DAG: %r1 = COPY [[Y]] - ; SOFT-AEABI: BL $__aeabi_idiv, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 + ; SOFT-AEABI: BL &__aeabi_idiv, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 ; SOFT-AEABI: [[R:%[0-9]+]]:_(s32) = COPY %r0 - ; SOFT-DEFAULT: BL $__divsi3, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 + ; SOFT-DEFAULT: BL &__divsi3, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 ; SOFT-DEFAULT: [[R:%[0-9]+]]:_(s32) = COPY %r0 ; SOFT: ADJCALLSTACKUP ; SOFT-NOT: G_SDIV @@ -82,9 +82,9 @@ body: | ; SOFT: ADJCALLSTACKDOWN ; SOFT-DAG: %r0 = COPY [[X]] ; SOFT-DAG: %r1 = COPY [[Y]] - ; SOFT-AEABI: BL $__aeabi_uidiv, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 + ; SOFT-AEABI: BL &__aeabi_uidiv, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 ; SOFT-AEABI: [[R:%[0-9]+]]:_(s32) = COPY %r0 - ; SOFT-DEFAULT: BL $__udivsi3, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 + ; SOFT-DEFAULT: BL &__udivsi3, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 ; SOFT-DEFAULT: [[R:%[0-9]+]]:_(s32) = COPY %r0 ; SOFT: ADJCALLSTACKUP ; SOFT-NOT: G_UDIV @@ -133,9 +133,9 @@ body: | ; SOFT: ADJCALLSTACKDOWN ; SOFT-DAG: %r0 = COPY [[X32]] ; SOFT-DAG: %r1 = COPY [[Y32]] - ; SOFT-AEABI: BL $__aeabi_idiv, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 + ; SOFT-AEABI: BL &__aeabi_idiv, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 ; SOFT-AEABI: [[R32:%[0-9]+]]:_(s32) = COPY %r0 - ; SOFT-DEFAULT: BL $__divsi3, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 + ; SOFT-DEFAULT: BL &__divsi3, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 ; SOFT-DEFAULT: [[R32:%[0-9]+]]:_(s32) = COPY %r0 ; SOFT: ADJCALLSTACKUP ; SOFT-NOT: G_SDIV @@ -185,9 +185,9 @@ body: | ; SOFT: ADJCALLSTACKDOWN ; SOFT-DAG: %r0 = COPY [[X32]] ; SOFT-DAG: %r1 = COPY [[Y32]] - ; SOFT-AEABI: BL $__aeabi_uidiv, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 + ; SOFT-AEABI: BL &__aeabi_uidiv, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 ; SOFT-AEABI: [[R32:%[0-9]+]]:_(s32) = COPY %r0 - ; SOFT-DEFAULT: BL $__udivsi3, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 + ; SOFT-DEFAULT: BL &__udivsi3, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 ; SOFT-DEFAULT: [[R32:%[0-9]+]]:_(s32) = COPY %r0 ; SOFT: ADJCALLSTACKUP ; SOFT-NOT: G_UDIV @@ -239,9 +239,9 @@ body: | ; SOFT: ADJCALLSTACKDOWN ; SOFT-DAG: %r0 = COPY [[X32]] ; SOFT-DAG: %r1 = COPY [[Y32]] - ; SOFT-AEABI: BL $__aeabi_idiv, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 + ; SOFT-AEABI: BL &__aeabi_idiv, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 ; SOFT-AEABI: [[R32:%[0-9]+]]:_(s32) = COPY %r0 - ; SOFT-DEFAULT: BL $__divsi3, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 + ; SOFT-DEFAULT: BL &__divsi3, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 ; SOFT-DEFAULT: [[R32:%[0-9]+]]:_(s32) = COPY %r0 ; SOFT: ADJCALLSTACKUP ; SOFT-NOT: G_SDIV @@ -291,9 +291,9 @@ body: | ; SOFT: ADJCALLSTACKDOWN ; SOFT-DAG: %r0 = COPY [[X32]] ; SOFT-DAG: %r1 = COPY [[Y32]] - ; SOFT-AEABI: BL $__aeabi_uidiv, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 + ; SOFT-AEABI: BL &__aeabi_uidiv, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 ; SOFT-AEABI: [[R32:%[0-9]+]]:_(s32) = COPY %r0 - ; SOFT-DEFAULT: BL $__udivsi3, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 + ; SOFT-DEFAULT: BL &__udivsi3, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 ; SOFT-DEFAULT: [[R32:%[0-9]+]]:_(s32) = COPY %r0 ; SOFT: ADJCALLSTACKUP ; SOFT-NOT: G_UDIV @@ -332,9 +332,9 @@ body: | ; SOFT: ADJCALLSTACKDOWN ; SOFT-DAG: %r0 = COPY [[X]] ; SOFT-DAG: %r1 = COPY [[Y]] - ; SOFT-AEABI: BL $__aeabi_idivmod, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0, implicit-def %r1 + ; SOFT-AEABI: BL &__aeabi_idivmod, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0, implicit-def %r1 ; SOFT-AEABI: [[R:%[0-9]+]]:_(s32) = COPY %r1 - ; SOFT-DEFAULT: BL $__modsi3, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 + ; SOFT-DEFAULT: BL &__modsi3, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 ; SOFT-DEFAULT: [[R:%[0-9]+]]:_(s32) = COPY %r0 ; SOFT: ADJCALLSTACKUP ; SOFT-NOT: G_SREM @@ -370,9 +370,9 @@ body: | ; SOFT: ADJCALLSTACKDOWN ; SOFT-DAG: %r0 = COPY [[X]] ; SOFT-DAG: %r1 = COPY [[Y]] - ; SOFT-AEABI: BL $__aeabi_uidivmod, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0, implicit-def %r1 + ; SOFT-AEABI: BL &__aeabi_uidivmod, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0, implicit-def %r1 ; SOFT-AEABI: [[R:%[0-9]+]]:_(s32) = COPY %r1 - ; SOFT-DEFAULT: BL $__umodsi3, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 + ; SOFT-DEFAULT: BL &__umodsi3, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 ; SOFT-DEFAULT: [[R:%[0-9]+]]:_(s32) = COPY %r0 ; SOFT: ADJCALLSTACKUP ; SOFT-NOT: G_UREM @@ -423,9 +423,9 @@ body: | ; SOFT: ADJCALLSTACKDOWN ; SOFT-DAG: %r0 = COPY [[X32]] ; SOFT-DAG: %r1 = COPY [[Y32]] - ; SOFT-AEABI: BL $__aeabi_idivmod, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 + ; SOFT-AEABI: BL &__aeabi_idivmod, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 ; SOFT-AEABI: [[R32:%[0-9]+]]:_(s32) = COPY %r1 - ; SOFT-DEFAULT: BL $__modsi3, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 + ; SOFT-DEFAULT: BL &__modsi3, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 ; SOFT-DEFAULT: [[R32:%[0-9]+]]:_(s32) = COPY %r0 ; SOFT: ADJCALLSTACKUP ; SOFT-NOT: G_SREM @@ -477,9 +477,9 @@ body: | ; SOFT: ADJCALLSTACKDOWN ; SOFT-DAG: %r0 = COPY [[X32]] ; SOFT-DAG: %r1 = COPY [[Y32]] - ; SOFT-AEABI: BL $__aeabi_uidivmod, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 + ; SOFT-AEABI: BL &__aeabi_uidivmod, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 ; SOFT-AEABI: [[R32:%[0-9]+]]:_(s32) = COPY %r1 - ; SOFT-DEFAULT: BL $__umodsi3, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 + ; SOFT-DEFAULT: BL &__umodsi3, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 ; SOFT-DEFAULT: [[R32:%[0-9]+]]:_(s32) = COPY %r0 ; SOFT: ADJCALLSTACKUP ; SOFT-NOT: G_UREM @@ -533,9 +533,9 @@ body: | ; SOFT: ADJCALLSTACKDOWN ; SOFT-DAG: %r0 = COPY [[X32]] ; SOFT-DAG: %r1 = COPY [[Y32]] - ; SOFT-AEABI: BL $__aeabi_idivmod, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 + ; SOFT-AEABI: BL &__aeabi_idivmod, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 ; SOFT-AEABI: [[R32:%[0-9]+]]:_(s32) = COPY %r1 - ; SOFT-DEFAULT: BL $__modsi3, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 + ; SOFT-DEFAULT: BL &__modsi3, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 ; SOFT-DEFAULT: [[R32:%[0-9]+]]:_(s32) = COPY %r0 ; SOFT: ADJCALLSTACKUP ; SOFT-NOT: G_SREM @@ -587,9 +587,9 @@ body: | ; SOFT: ADJCALLSTACKDOWN ; SOFT-DAG: %r0 = COPY [[X32]] ; SOFT-DAG: %r1 = COPY [[Y32]] - ; SOFT-AEABI: BL $__aeabi_uidivmod, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 + ; SOFT-AEABI: BL &__aeabi_uidivmod, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 ; SOFT-AEABI: [[R32:%[0-9]+]]:_(s32) = COPY %r1 - ; SOFT-DEFAULT: BL $__umodsi3, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 + ; SOFT-DEFAULT: BL &__umodsi3, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 ; SOFT-DEFAULT: [[R32:%[0-9]+]]:_(s32) = COPY %r0 ; SOFT: ADJCALLSTACKUP ; SOFT-NOT: G_UREM diff --git a/llvm/test/CodeGen/ARM/GlobalISel/arm-legalize-fp.mir b/llvm/test/CodeGen/ARM/GlobalISel/arm-legalize-fp.mir index 4f48581fdf34..65e7ccd4ab56 100644 --- a/llvm/test/CodeGen/ARM/GlobalISel/arm-legalize-fp.mir +++ b/llvm/test/CodeGen/ARM/GlobalISel/arm-legalize-fp.mir @@ -84,8 +84,8 @@ body: | ; SOFT-DAG: %r1 = COPY [[Y]] ; HARD-DAG: %s0 = COPY [[X]] ; HARD-DAG: %s1 = COPY [[Y]] - ; SOFT: BL $fmodf, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 - ; HARD: BL $fmodf, {{.*}}, implicit %s0, implicit %s1, implicit-def %s0 + ; SOFT: BL &fmodf, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 + ; HARD: BL &fmodf, {{.*}}, implicit %s0, implicit %s1, implicit-def %s0 ; SOFT: [[R:%[0-9]+]]:_(s32) = COPY %r0 ; HARD: [[R:%[0-9]+]]:_(s32) = COPY %s0 ; CHECK: ADJCALLSTACKUP @@ -143,8 +143,8 @@ body: | ; SOFT-DAG: %r{{[2-3]}} = COPY [[Y1]] ; HARD-DAG: %d0 = COPY [[X]] ; HARD-DAG: %d1 = COPY [[Y]] - ; SOFT: BL $fmod, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0, implicit-def %r1 - ; HARD: BL $fmod, {{.*}}, implicit %d0, implicit %d1, implicit-def %d0 + ; SOFT: BL &fmod, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0, implicit-def %r1 + ; HARD: BL &fmod, {{.*}}, implicit %d0, implicit %d1, implicit-def %d0 ; CHECK: ADJCALLSTACKUP ; CHECK-NOT: G_FREM %6(s64) = G_FREM %4, %5 @@ -179,8 +179,8 @@ body: | ; SOFT-DAG: %r1 = COPY [[Y]] ; HARD-DAG: %s0 = COPY [[X]] ; HARD-DAG: %s1 = COPY [[Y]] - ; SOFT: BL $powf, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 - ; HARD: BL $powf, {{.*}}, implicit %s0, implicit %s1, implicit-def %s0 + ; SOFT: BL &powf, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 + ; HARD: BL &powf, {{.*}}, implicit %s0, implicit %s1, implicit-def %s0 ; SOFT: [[R:%[0-9]+]]:_(s32) = COPY %r0 ; HARD: [[R:%[0-9]+]]:_(s32) = COPY %s0 ; CHECK: ADJCALLSTACKUP @@ -238,8 +238,8 @@ body: | ; SOFT-DAG: %r{{[2-3]}} = COPY [[Y1]] ; HARD-DAG: %d0 = COPY [[X]] ; HARD-DAG: %d1 = COPY [[Y]] - ; SOFT: BL $pow, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0, implicit-def %r1 - ; HARD: BL $pow, {{.*}}, implicit %d0, implicit %d1, implicit-def %d0 + ; SOFT: BL &pow, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0, implicit-def %r1 + ; HARD: BL &pow, {{.*}}, implicit %d0, implicit %d1, implicit-def %d0 ; CHECK: ADJCALLSTACKUP ; CHECK-NOT: G_FPOW %6(s64) = G_FPOW %4, %5 @@ -273,8 +273,8 @@ body: | ; SOFT: ADJCALLSTACKDOWN ; SOFT-DAG: %r0 = COPY [[X]] ; SOFT-DAG: %r1 = COPY [[Y]] - ; SOFT-AEABI: BL $__aeabi_fadd, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 - ; SOFT-DEFAULT: BL $__addsf3, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 + ; SOFT-AEABI: BL &__aeabi_fadd, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 + ; SOFT-DEFAULT: BL &__addsf3, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 ; SOFT: [[R:%[0-9]+]]:_(s32) = COPY %r0 ; SOFT: ADJCALLSTACKUP ; SOFT-NOT: G_FADD @@ -324,8 +324,8 @@ body: | ; SOFT-DAG: %r{{[0-1]}} = COPY [[X1]] ; SOFT-DAG: %r{{[2-3]}} = COPY [[Y0]] ; SOFT-DAG: %r{{[2-3]}} = COPY [[Y1]] - ; SOFT-AEABI: BL $__aeabi_dadd, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0, implicit-def %r1 - ; SOFT-DEFAULT: BL $__adddf3, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0, implicit-def %r1 + ; SOFT-AEABI: BL &__aeabi_dadd, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0, implicit-def %r1 + ; SOFT-DEFAULT: BL &__adddf3, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0, implicit-def %r1 ; SOFT: ADJCALLSTACKUP ; SOFT-NOT: G_FADD %6(s64) = G_FADD %4, %5 @@ -360,8 +360,8 @@ body: | ; SOFT: ADJCALLSTACKDOWN ; SOFT-DAG: %r0 = COPY [[X]] ; SOFT-DAG: %r1 = COPY [[Y]] - ; SOFT-AEABI: BL $__aeabi_fsub, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 - ; SOFT-DEFAULT: BL $__subsf3, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 + ; SOFT-AEABI: BL &__aeabi_fsub, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 + ; SOFT-DEFAULT: BL &__subsf3, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 ; SOFT: [[R:%[0-9]+]]:_(s32) = COPY %r0 ; SOFT: ADJCALLSTACKUP ; SOFT-NOT: G_FSUB @@ -411,8 +411,8 @@ body: | ; SOFT-DAG: %r{{[0-1]}} = COPY [[X1]] ; SOFT-DAG: %r{{[2-3]}} = COPY [[Y0]] ; SOFT-DAG: %r{{[2-3]}} = COPY [[Y1]] - ; SOFT-AEABI: BL $__aeabi_dsub, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0, implicit-def %r1 - ; SOFT-DEFAULT: BL $__subdf3, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0, implicit-def %r1 + ; SOFT-AEABI: BL &__aeabi_dsub, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0, implicit-def %r1 + ; SOFT-DEFAULT: BL &__subdf3, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0, implicit-def %r1 ; SOFT: ADJCALLSTACKUP ; SOFT-NOT: G_FSUB %6(s64) = G_FSUB %4, %5 @@ -447,8 +447,8 @@ body: | ; SOFT: ADJCALLSTACKDOWN ; SOFT-DAG: %r0 = COPY [[X]] ; SOFT-DAG: %r1 = COPY [[Y]] - ; SOFT-AEABI: BL $__aeabi_fmul, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 - ; SOFT-DEFAULT: BL $__mulsf3, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 + ; SOFT-AEABI: BL &__aeabi_fmul, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 + ; SOFT-DEFAULT: BL &__mulsf3, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 ; SOFT: [[R:%[0-9]+]]:_(s32) = COPY %r0 ; SOFT: ADJCALLSTACKUP ; SOFT-NOT: G_FMUL @@ -498,8 +498,8 @@ body: | ; SOFT-DAG: %r{{[0-1]}} = COPY [[X1]] ; SOFT-DAG: %r{{[2-3]}} = COPY [[Y0]] ; SOFT-DAG: %r{{[2-3]}} = COPY [[Y1]] - ; SOFT-AEABI: BL $__aeabi_dmul, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0, implicit-def %r1 - ; SOFT-DEFAULT: BL $__muldf3, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0, implicit-def %r1 + ; SOFT-AEABI: BL &__aeabi_dmul, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0, implicit-def %r1 + ; SOFT-DEFAULT: BL &__muldf3, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0, implicit-def %r1 ; SOFT: ADJCALLSTACKUP ; SOFT-NOT: G_FMUL %6(s64) = G_FMUL %4, %5 @@ -534,8 +534,8 @@ body: | ; SOFT: ADJCALLSTACKDOWN ; SOFT-DAG: %r0 = COPY [[X]] ; SOFT-DAG: %r1 = COPY [[Y]] - ; SOFT-AEABI: BL $__aeabi_fdiv, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 - ; SOFT-DEFAULT: BL $__divsf3, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 + ; SOFT-AEABI: BL &__aeabi_fdiv, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 + ; SOFT-DEFAULT: BL &__divsf3, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 ; SOFT: [[R:%[0-9]+]]:_(s32) = COPY %r0 ; SOFT: ADJCALLSTACKUP ; SOFT-NOT: G_FDIV @@ -585,8 +585,8 @@ body: | ; SOFT-DAG: %r{{[0-1]}} = COPY [[X1]] ; SOFT-DAG: %r{{[2-3]}} = COPY [[Y0]] ; SOFT-DAG: %r{{[2-3]}} = COPY [[Y1]] - ; SOFT-AEABI: BL $__aeabi_ddiv, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0, implicit-def %r1 - ; SOFT-DEFAULT: BL $__divdf3, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0, implicit-def %r1 + ; SOFT-AEABI: BL &__aeabi_ddiv, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0, implicit-def %r1 + ; SOFT-DEFAULT: BL &__divdf3, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0, implicit-def %r1 ; SOFT: ADJCALLSTACKUP ; SOFT-NOT: G_FDIV %6(s64) = G_FDIV %4, %5 @@ -698,8 +698,8 @@ body: | ; SOFT: ADJCALLSTACKDOWN ; SOFT-DAG: %r0 = COPY [[X]] ; SOFT-DAG: %r1 = COPY [[Y]] - ; SOFT-AEABI: BL $__aeabi_fcmpeq, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 - ; SOFT-DEFAULT: BL $__eqsf2, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 + ; SOFT-AEABI: BL &__aeabi_fcmpeq, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 + ; SOFT-DEFAULT: BL &__eqsf2, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 ; SOFT: [[RET:%[0-9]+]]:_(s32) = COPY %r0 ; SOFT: ADJCALLSTACKUP ; For aeabi, we just need to truncate the result. The combiner changes the @@ -744,8 +744,8 @@ body: | ; SOFT: ADJCALLSTACKDOWN ; SOFT-DAG: %r0 = COPY [[X]] ; SOFT-DAG: %r1 = COPY [[Y]] - ; SOFT-AEABI: BL $__aeabi_fcmpgt, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 - ; SOFT-DEFAULT: BL $__gtsf2, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 + ; SOFT-AEABI: BL &__aeabi_fcmpgt, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 + ; SOFT-DEFAULT: BL &__gtsf2, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 ; SOFT: [[RET:%[0-9]+]]:_(s32) = COPY %r0 ; SOFT: ADJCALLSTACKUP ; For aeabi, we just need to truncate the result. The combiner changes the @@ -790,8 +790,8 @@ body: | ; SOFT: ADJCALLSTACKDOWN ; SOFT-DAG: %r0 = COPY [[X]] ; SOFT-DAG: %r1 = COPY [[Y]] - ; SOFT-AEABI: BL $__aeabi_fcmpge, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 - ; SOFT-DEFAULT: BL $__gesf2, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 + ; SOFT-AEABI: BL &__aeabi_fcmpge, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 + ; SOFT-DEFAULT: BL &__gesf2, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 ; SOFT: [[RET:%[0-9]+]]:_(s32) = COPY %r0 ; SOFT: ADJCALLSTACKUP ; For aeabi, we just need to truncate the result. The combiner changes the @@ -836,8 +836,8 @@ body: | ; SOFT: ADJCALLSTACKDOWN ; SOFT-DAG: %r0 = COPY [[X]] ; SOFT-DAG: %r1 = COPY [[Y]] - ; SOFT-AEABI: BL $__aeabi_fcmplt, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 - ; SOFT-DEFAULT: BL $__ltsf2, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 + ; SOFT-AEABI: BL &__aeabi_fcmplt, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 + ; SOFT-DEFAULT: BL &__ltsf2, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 ; SOFT: [[RET:%[0-9]+]]:_(s32) = COPY %r0 ; SOFT: ADJCALLSTACKUP ; For aeabi, we just need to truncate the result. The combiner changes the @@ -882,8 +882,8 @@ body: | ; SOFT: ADJCALLSTACKDOWN ; SOFT-DAG: %r0 = COPY [[X]] ; SOFT-DAG: %r1 = COPY [[Y]] - ; SOFT-AEABI: BL $__aeabi_fcmple, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 - ; SOFT-DEFAULT: BL $__lesf2, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 + ; SOFT-AEABI: BL &__aeabi_fcmple, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 + ; SOFT-DEFAULT: BL &__lesf2, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 ; SOFT: [[RET:%[0-9]+]]:_(s32) = COPY %r0 ; SOFT: ADJCALLSTACKUP ; For aeabi, we just need to truncate the result. The combiner changes the @@ -927,8 +927,8 @@ body: | ; SOFT: ADJCALLSTACKDOWN ; SOFT-DAG: %r0 = COPY [[X]] ; SOFT-DAG: %r1 = COPY [[Y]] - ; SOFT-AEABI: BL $__aeabi_fcmpun, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 - ; SOFT-DEFAULT: BL $__unordsf2, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 + ; SOFT-AEABI: BL &__aeabi_fcmpun, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 + ; SOFT-DEFAULT: BL &__unordsf2, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 ; SOFT: [[RET:%[0-9]+]]:_(s32) = COPY %r0 ; SOFT: ADJCALLSTACKUP ; SOFT: [[ZERO:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 @@ -967,8 +967,8 @@ body: | ; SOFT: ADJCALLSTACKDOWN ; SOFT-DAG: %r0 = COPY [[X]] ; SOFT-DAG: %r1 = COPY [[Y]] - ; SOFT-AEABI: BL $__aeabi_fcmple, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 - ; SOFT-DEFAULT: BL $__lesf2, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 + ; SOFT-AEABI: BL &__aeabi_fcmple, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 + ; SOFT-DEFAULT: BL &__lesf2, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 ; SOFT: [[RET:%[0-9]+]]:_(s32) = COPY %r0 ; SOFT: ADJCALLSTACKUP ; SOFT: [[ZERO:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 @@ -1008,8 +1008,8 @@ body: | ; SOFT: ADJCALLSTACKDOWN ; SOFT-DAG: %r0 = COPY [[X]] ; SOFT-DAG: %r1 = COPY [[Y]] - ; SOFT-AEABI: BL $__aeabi_fcmplt, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 - ; SOFT-DEFAULT: BL $__ltsf2, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 + ; SOFT-AEABI: BL &__aeabi_fcmplt, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 + ; SOFT-DEFAULT: BL &__ltsf2, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 ; SOFT: [[RET:%[0-9]+]]:_(s32) = COPY %r0 ; SOFT: ADJCALLSTACKUP ; SOFT: [[ZERO:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 @@ -1049,8 +1049,8 @@ body: | ; SOFT: ADJCALLSTACKDOWN ; SOFT-DAG: %r0 = COPY [[X]] ; SOFT-DAG: %r1 = COPY [[Y]] - ; SOFT-AEABI: BL $__aeabi_fcmpge, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 - ; SOFT-DEFAULT: BL $__gesf2, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 + ; SOFT-AEABI: BL &__aeabi_fcmpge, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 + ; SOFT-DEFAULT: BL &__gesf2, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 ; SOFT: [[RET:%[0-9]+]]:_(s32) = COPY %r0 ; SOFT: ADJCALLSTACKUP ; SOFT: [[ZERO:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 @@ -1090,8 +1090,8 @@ body: | ; SOFT: ADJCALLSTACKDOWN ; SOFT-DAG: %r0 = COPY [[X]] ; SOFT-DAG: %r1 = COPY [[Y]] - ; SOFT-AEABI: BL $__aeabi_fcmpgt, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 - ; SOFT-DEFAULT: BL $__gtsf2, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 + ; SOFT-AEABI: BL &__aeabi_fcmpgt, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 + ; SOFT-DEFAULT: BL &__gtsf2, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 ; SOFT: [[RET:%[0-9]+]]:_(s32) = COPY %r0 ; SOFT: ADJCALLSTACKUP ; SOFT: [[ZERO:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 @@ -1131,8 +1131,8 @@ body: | ; SOFT: ADJCALLSTACKDOWN ; SOFT-DAG: %r0 = COPY [[X]] ; SOFT-DAG: %r1 = COPY [[Y]] - ; SOFT-AEABI: BL $__aeabi_fcmpeq, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 - ; SOFT-DEFAULT: BL $__nesf2, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 + ; SOFT-AEABI: BL &__aeabi_fcmpeq, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 + ; SOFT-DEFAULT: BL &__nesf2, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 ; SOFT: [[RET:%[0-9]+]]:_(s32) = COPY %r0 ; SOFT: ADJCALLSTACKUP ; SOFT: [[ZERO:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 @@ -1173,8 +1173,8 @@ body: | ; SOFT: ADJCALLSTACKDOWN ; SOFT-DAG: %r0 = COPY [[X]] ; SOFT-DAG: %r1 = COPY [[Y]] - ; SOFT-AEABI: BL $__aeabi_fcmpun, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 - ; SOFT-DEFAULT: BL $__unordsf2, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 + ; SOFT-AEABI: BL &__aeabi_fcmpun, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 + ; SOFT-DEFAULT: BL &__unordsf2, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 ; SOFT: [[RET:%[0-9]+]]:_(s32) = COPY %r0 ; SOFT: ADJCALLSTACKUP ; For aeabi, we just need to truncate the result. The combiner changes the @@ -1219,8 +1219,8 @@ body: | ; SOFT: ADJCALLSTACKDOWN ; SOFT-DAG: %r0 = COPY [[X]] ; SOFT-DAG: %r1 = COPY [[Y]] - ; SOFT-AEABI: BL $__aeabi_fcmpgt, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 - ; SOFT-DEFAULT: BL $__gtsf2, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 + ; SOFT-AEABI: BL &__aeabi_fcmpgt, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 + ; SOFT-DEFAULT: BL &__gtsf2, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 ; SOFT: [[RET1:%[0-9]+]]:_(s32) = COPY %r0 ; SOFT: ADJCALLSTACKUP ; SOFT-DEFAULT: [[ZERO:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 @@ -1229,8 +1229,8 @@ body: | ; SOFT: ADJCALLSTACKDOWN ; SOFT-DAG: %r0 = COPY [[X]] ; SOFT-DAG: %r1 = COPY [[Y]] - ; SOFT-AEABI: BL $__aeabi_fcmplt, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 - ; SOFT-DEFAULT: BL $__ltsf2, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 + ; SOFT-AEABI: BL &__aeabi_fcmplt, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 + ; SOFT-DEFAULT: BL &__ltsf2, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 ; SOFT: [[RET2:%[0-9]+]]:_(s32) = COPY %r0 ; SOFT: ADJCALLSTACKUP ; SOFT-DEFAULT: [[ZERO:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 @@ -1279,8 +1279,8 @@ body: | ; SOFT: ADJCALLSTACKDOWN ; SOFT-DAG: %r0 = COPY [[X]] ; SOFT-DAG: %r1 = COPY [[Y]] - ; SOFT-AEABI: BL $__aeabi_fcmpeq, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 - ; SOFT-DEFAULT: BL $__eqsf2, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 + ; SOFT-AEABI: BL &__aeabi_fcmpeq, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 + ; SOFT-DEFAULT: BL &__eqsf2, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 ; SOFT: [[RET1:%[0-9]+]]:_(s32) = COPY %r0 ; SOFT: ADJCALLSTACKUP ; SOFT-DEFAULT: [[ZERO:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 @@ -1289,8 +1289,8 @@ body: | ; SOFT: ADJCALLSTACKDOWN ; SOFT-DAG: %r0 = COPY [[X]] ; SOFT-DAG: %r1 = COPY [[Y]] - ; SOFT-AEABI: BL $__aeabi_fcmpun, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 - ; SOFT-DEFAULT: BL $__unordsf2, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 + ; SOFT-AEABI: BL &__aeabi_fcmpun, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 + ; SOFT-DEFAULT: BL &__unordsf2, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0 ; SOFT: [[RET2:%[0-9]+]]:_(s32) = COPY %r0 ; SOFT: ADJCALLSTACKUP ; SOFT-DEFAULT: [[ZERO:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 @@ -1452,8 +1452,8 @@ body: | ; SOFT-DAG: %r1 = COPY [[X1]] ; SOFT-DAG: %r2 = COPY [[Y0]] ; SOFT-DAG: %r3 = COPY [[Y1]] - ; SOFT-AEABI: BL $__aeabi_dcmpeq, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0 - ; SOFT-DEFAULT: BL $__eqdf2, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0 + ; SOFT-AEABI: BL &__aeabi_dcmpeq, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0 + ; SOFT-DEFAULT: BL &__eqdf2, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0 ; SOFT: [[RET:%[0-9]+]]:_(s32) = COPY %r0 ; SOFT: ADJCALLSTACKUP ; For aeabi, we just need to truncate the result. The combiner changes the @@ -1512,8 +1512,8 @@ body: | ; SOFT-DAG: %r1 = COPY [[X1]] ; SOFT-DAG: %r2 = COPY [[Y0]] ; SOFT-DAG: %r3 = COPY [[Y1]] - ; SOFT-AEABI: BL $__aeabi_dcmpgt, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0 - ; SOFT-DEFAULT: BL $__gtdf2, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0 + ; SOFT-AEABI: BL &__aeabi_dcmpgt, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0 + ; SOFT-DEFAULT: BL &__gtdf2, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0 ; SOFT: [[RET:%[0-9]+]]:_(s32) = COPY %r0 ; SOFT: ADJCALLSTACKUP ; For aeabi, we just need to truncate the result. The combiner changes the @@ -1572,8 +1572,8 @@ body: | ; SOFT-DAG: %r1 = COPY [[X1]] ; SOFT-DAG: %r2 = COPY [[Y0]] ; SOFT-DAG: %r3 = COPY [[Y1]] - ; SOFT-AEABI: BL $__aeabi_dcmpge, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0 - ; SOFT-DEFAULT: BL $__gedf2, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0 + ; SOFT-AEABI: BL &__aeabi_dcmpge, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0 + ; SOFT-DEFAULT: BL &__gedf2, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0 ; SOFT: [[RET:%[0-9]+]]:_(s32) = COPY %r0 ; SOFT: ADJCALLSTACKUP ; For aeabi, we just need to truncate the result. The combiner changes the @@ -1632,8 +1632,8 @@ body: | ; SOFT-DAG: %r1 = COPY [[X1]] ; SOFT-DAG: %r2 = COPY [[Y0]] ; SOFT-DAG: %r3 = COPY [[Y1]] - ; SOFT-AEABI: BL $__aeabi_dcmplt, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0 - ; SOFT-DEFAULT: BL $__ltdf2, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0 + ; SOFT-AEABI: BL &__aeabi_dcmplt, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0 + ; SOFT-DEFAULT: BL &__ltdf2, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0 ; SOFT: [[RET:%[0-9]+]]:_(s32) = COPY %r0 ; SOFT: ADJCALLSTACKUP ; For aeabi, we just need to truncate the result. The combiner changes the @@ -1692,8 +1692,8 @@ body: | ; SOFT-DAG: %r1 = COPY [[X1]] ; SOFT-DAG: %r2 = COPY [[Y0]] ; SOFT-DAG: %r3 = COPY [[Y1]] - ; SOFT-AEABI: BL $__aeabi_dcmple, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0 - ; SOFT-DEFAULT: BL $__ledf2, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0 + ; SOFT-AEABI: BL &__aeabi_dcmple, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0 + ; SOFT-DEFAULT: BL &__ledf2, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0 ; SOFT: [[RET:%[0-9]+]]:_(s32) = COPY %r0 ; SOFT: ADJCALLSTACKUP ; For aeabi, we just need to truncate the result. The combiner changes the @@ -1751,8 +1751,8 @@ body: | ; SOFT-DAG: %r1 = COPY [[X1]] ; SOFT-DAG: %r2 = COPY [[Y0]] ; SOFT-DAG: %r3 = COPY [[Y1]] - ; SOFT-AEABI: BL $__aeabi_dcmpun, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0 - ; SOFT-DEFAULT: BL $__unorddf2, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0 + ; SOFT-AEABI: BL &__aeabi_dcmpun, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0 + ; SOFT-DEFAULT: BL &__unorddf2, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0 ; SOFT: [[RET:%[0-9]+]]:_(s32) = COPY %r0 ; SOFT: ADJCALLSTACKUP ; SOFT: [[ZERO:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 @@ -1805,8 +1805,8 @@ body: | ; SOFT-DAG: %r1 = COPY [[X1]] ; SOFT-DAG: %r2 = COPY [[Y0]] ; SOFT-DAG: %r3 = COPY [[Y1]] - ; SOFT-AEABI: BL $__aeabi_dcmple, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0 - ; SOFT-DEFAULT: BL $__ledf2, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0 + ; SOFT-AEABI: BL &__aeabi_dcmple, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0 + ; SOFT-DEFAULT: BL &__ledf2, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0 ; SOFT: [[RET:%[0-9]+]]:_(s32) = COPY %r0 ; SOFT: ADJCALLSTACKUP ; SOFT: [[ZERO:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 @@ -1860,8 +1860,8 @@ body: | ; SOFT-DAG: %r1 = COPY [[X1]] ; SOFT-DAG: %r2 = COPY [[Y0]] ; SOFT-DAG: %r3 = COPY [[Y1]] - ; SOFT-AEABI: BL $__aeabi_dcmplt, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0 - ; SOFT-DEFAULT: BL $__ltdf2, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0 + ; SOFT-AEABI: BL &__aeabi_dcmplt, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0 + ; SOFT-DEFAULT: BL &__ltdf2, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0 ; SOFT: [[RET:%[0-9]+]]:_(s32) = COPY %r0 ; SOFT: ADJCALLSTACKUP ; SOFT: [[ZERO:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 @@ -1915,8 +1915,8 @@ body: | ; SOFT-DAG: %r1 = COPY [[X1]] ; SOFT-DAG: %r2 = COPY [[Y0]] ; SOFT-DAG: %r3 = COPY [[Y1]] - ; SOFT-AEABI: BL $__aeabi_dcmpge, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0 - ; SOFT-DEFAULT: BL $__gedf2, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0 + ; SOFT-AEABI: BL &__aeabi_dcmpge, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0 + ; SOFT-DEFAULT: BL &__gedf2, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0 ; SOFT: [[RET:%[0-9]+]]:_(s32) = COPY %r0 ; SOFT: ADJCALLSTACKUP ; SOFT: [[ZERO:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 @@ -1970,8 +1970,8 @@ body: | ; SOFT-DAG: %r1 = COPY [[X1]] ; SOFT-DAG: %r2 = COPY [[Y0]] ; SOFT-DAG: %r3 = COPY [[Y1]] - ; SOFT-AEABI: BL $__aeabi_dcmpgt, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0 - ; SOFT-DEFAULT: BL $__gtdf2, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0 + ; SOFT-AEABI: BL &__aeabi_dcmpgt, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0 + ; SOFT-DEFAULT: BL &__gtdf2, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0 ; SOFT: [[RET:%[0-9]+]]:_(s32) = COPY %r0 ; SOFT: ADJCALLSTACKUP ; SOFT: [[ZERO:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 @@ -2025,8 +2025,8 @@ body: | ; SOFT-DAG: %r1 = COPY [[X1]] ; SOFT-DAG: %r2 = COPY [[Y0]] ; SOFT-DAG: %r3 = COPY [[Y1]] - ; SOFT-AEABI: BL $__aeabi_dcmpeq, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0 - ; SOFT-DEFAULT: BL $__nedf2, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0 + ; SOFT-AEABI: BL &__aeabi_dcmpeq, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0 + ; SOFT-DEFAULT: BL &__nedf2, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0 ; SOFT: [[RET:%[0-9]+]]:_(s32) = COPY %r0 ; SOFT: ADJCALLSTACKUP ; SOFT: [[ZERO:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 @@ -2081,8 +2081,8 @@ body: | ; SOFT-DAG: %r1 = COPY [[X1]] ; SOFT-DAG: %r2 = COPY [[Y0]] ; SOFT-DAG: %r3 = COPY [[Y1]] - ; SOFT-AEABI: BL $__aeabi_dcmpun, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0 - ; SOFT-DEFAULT: BL $__unorddf2, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0 + ; SOFT-AEABI: BL &__aeabi_dcmpun, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0 + ; SOFT-DEFAULT: BL &__unorddf2, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0 ; SOFT: [[RET:%[0-9]+]]:_(s32) = COPY %r0 ; SOFT: ADJCALLSTACKUP ; For aeabi, we just need to truncate the result. The combiner changes the @@ -2141,8 +2141,8 @@ body: | ; SOFT-DAG: %r1 = COPY [[X1]] ; SOFT-DAG: %r2 = COPY [[Y0]] ; SOFT-DAG: %r3 = COPY [[Y1]] - ; SOFT-AEABI: BL $__aeabi_dcmpgt, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0 - ; SOFT-DEFAULT: BL $__gtdf2, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0 + ; SOFT-AEABI: BL &__aeabi_dcmpgt, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0 + ; SOFT-DEFAULT: BL &__gtdf2, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0 ; SOFT: [[RET1:%[0-9]+]]:_(s32) = COPY %r0 ; SOFT: ADJCALLSTACKUP ; SOFT-DEFAULT: [[ZERO:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 @@ -2153,8 +2153,8 @@ body: | ; SOFT-DAG: %r1 = COPY [[X1]] ; SOFT-DAG: %r2 = COPY [[Y0]] ; SOFT-DAG: %r3 = COPY [[Y1]] - ; SOFT-AEABI: BL $__aeabi_dcmplt, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0 - ; SOFT-DEFAULT: BL $__ltdf2, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0 + ; SOFT-AEABI: BL &__aeabi_dcmplt, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0 + ; SOFT-DEFAULT: BL &__ltdf2, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0 ; SOFT: [[RET2:%[0-9]+]]:_(s32) = COPY %r0 ; SOFT: ADJCALLSTACKUP ; SOFT-DEFAULT: [[ZERO:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 @@ -2217,8 +2217,8 @@ body: | ; SOFT-DAG: %r1 = COPY [[X1]] ; SOFT-DAG: %r2 = COPY [[Y0]] ; SOFT-DAG: %r3 = COPY [[Y1]] - ; SOFT-AEABI: BL $__aeabi_dcmpeq, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0 - ; SOFT-DEFAULT: BL $__eqdf2, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0 + ; SOFT-AEABI: BL &__aeabi_dcmpeq, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0 + ; SOFT-DEFAULT: BL &__eqdf2, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0 ; SOFT: [[RET1:%[0-9]+]]:_(s32) = COPY %r0 ; SOFT: ADJCALLSTACKUP ; SOFT-DEFAULT: [[ZERO:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 @@ -2229,8 +2229,8 @@ body: | ; SOFT-DAG: %r1 = COPY [[X1]] ; SOFT-DAG: %r2 = COPY [[Y0]] ; SOFT-DAG: %r3 = COPY [[Y1]] - ; SOFT-AEABI: BL $__aeabi_dcmpun, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0 - ; SOFT-DEFAULT: BL $__unorddf2, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0 + ; SOFT-AEABI: BL &__aeabi_dcmpun, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0 + ; SOFT-DEFAULT: BL &__unorddf2, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0 ; SOFT: [[RET2:%[0-9]+]]:_(s32) = COPY %r0 ; SOFT: ADJCALLSTACKUP ; SOFT-DEFAULT: [[ZERO:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 diff --git a/llvm/test/CodeGen/ARM/Windows/vla-cpsr.ll b/llvm/test/CodeGen/ARM/Windows/vla-cpsr.ll index 13d0882b2952..0ec20c8b5490 100644 --- a/llvm/test/CodeGen/ARM/Windows/vla-cpsr.ll +++ b/llvm/test/CodeGen/ARM/Windows/vla-cpsr.ll @@ -9,5 +9,5 @@ entry: ret void } -; CHECK: tBL 14, %noreg, $__chkstk, implicit-def %lr, implicit %sp, implicit killed %r4, implicit-def %r4, implicit-def dead %r12, implicit-def dead %cpsr +; CHECK: tBL 14, %noreg, &__chkstk, implicit-def %lr, implicit %sp, implicit killed %r4, implicit-def %r4, implicit-def dead %r12, implicit-def dead %cpsr diff --git a/llvm/test/CodeGen/MIR/AArch64/spill-fold.mir b/llvm/test/CodeGen/MIR/AArch64/spill-fold.mir index 8e80828b1cef..b9406e54068e 100644 --- a/llvm/test/CodeGen/MIR/AArch64/spill-fold.mir +++ b/llvm/test/CodeGen/MIR/AArch64/spill-fold.mir @@ -16,7 +16,7 @@ body: | bb.0: ; CHECK: STRXui %xzr, %stack.0, 0 :: (store 8 into %stack.0) undef %0.sub_32 = COPY %wzr - INLINEASM $nop, 1, 12, implicit-def dead %x0, 12, implicit-def dead %x1, 12, implicit-def dead %x2, 12, implicit-def dead %x3, 12, implicit-def dead %x4, 12, implicit-def dead %x5, 12, implicit-def dead %x6, 12, implicit-def dead %x7, 12, implicit-def dead %x8, 12, implicit-def dead %x9, 12, implicit-def dead %x10, 12, implicit-def dead %x11, 12, implicit-def dead %x12, 12, implicit-def dead %x13, 12, implicit-def dead %x14, 12, implicit-def dead %x15, 12, implicit-def dead %x16, 12, implicit-def dead %x17, 12, implicit-def dead %x18, 12, implicit-def dead %x19, 12, implicit-def dead %x20, 12, implicit-def dead %x21, 12, implicit-def dead %x22, 12, implicit-def dead %x23, 12, implicit-def dead %x24, 12, implicit-def dead %x25, 12, implicit-def dead %x26, 12, implicit-def dead %x27, 12, implicit-def dead %x28, 12, implicit-def dead %fp, 12, implicit-def dead %lr, 12, implicit-def %sp + INLINEASM &nop, 1, 12, implicit-def dead %x0, 12, implicit-def dead %x1, 12, implicit-def dead %x2, 12, implicit-def dead %x3, 12, implicit-def dead %x4, 12, implicit-def dead %x5, 12, implicit-def dead %x6, 12, implicit-def dead %x7, 12, implicit-def dead %x8, 12, implicit-def dead %x9, 12, implicit-def dead %x10, 12, implicit-def dead %x11, 12, implicit-def dead %x12, 12, implicit-def dead %x13, 12, implicit-def dead %x14, 12, implicit-def dead %x15, 12, implicit-def dead %x16, 12, implicit-def dead %x17, 12, implicit-def dead %x18, 12, implicit-def dead %x19, 12, implicit-def dead %x20, 12, implicit-def dead %x21, 12, implicit-def dead %x22, 12, implicit-def dead %x23, 12, implicit-def dead %x24, 12, implicit-def dead %x25, 12, implicit-def dead %x26, 12, implicit-def dead %x27, 12, implicit-def dead %x28, 12, implicit-def dead %fp, 12, implicit-def dead %lr, 12, implicit-def %sp %x0 = COPY %0 RET_ReallyLR implicit %x0 ... @@ -30,7 +30,7 @@ body: | bb.0: ; CHECK: STRXui %xzr, %stack.0, 0 :: (store 8 into %stack.0) undef %0.sub_32 = COPY %wzr - INLINEASM $nop, 1, 12, implicit-def dead %x0, 12, implicit-def dead %x1, 12, implicit-def dead %x2, 12, implicit-def dead %x3, 12, implicit-def dead %x4, 12, implicit-def dead %x5, 12, implicit-def dead %x6, 12, implicit-def dead %x7, 12, implicit-def dead %x8, 12, implicit-def dead %x9, 12, implicit-def dead %x10, 12, implicit-def dead %x11, 12, implicit-def dead %x12, 12, implicit-def dead %x13, 12, implicit-def dead %x14, 12, implicit-def dead %x15, 12, implicit-def dead %x16, 12, implicit-def dead %x17, 12, implicit-def dead %x18, 12, implicit-def dead %x19, 12, implicit-def dead %x20, 12, implicit-def dead %x21, 12, implicit-def dead %x22, 12, implicit-def dead %x23, 12, implicit-def dead %x24, 12, implicit-def dead %x25, 12, implicit-def dead %x26, 12, implicit-def dead %x27, 12, implicit-def dead %x28, 12, implicit-def dead %fp, 12, implicit-def dead %lr, 12, implicit-def %sp + INLINEASM &nop, 1, 12, implicit-def dead %x0, 12, implicit-def dead %x1, 12, implicit-def dead %x2, 12, implicit-def dead %x3, 12, implicit-def dead %x4, 12, implicit-def dead %x5, 12, implicit-def dead %x6, 12, implicit-def dead %x7, 12, implicit-def dead %x8, 12, implicit-def dead %x9, 12, implicit-def dead %x10, 12, implicit-def dead %x11, 12, implicit-def dead %x12, 12, implicit-def dead %x13, 12, implicit-def dead %x14, 12, implicit-def dead %x15, 12, implicit-def dead %x16, 12, implicit-def dead %x17, 12, implicit-def dead %x18, 12, implicit-def dead %x19, 12, implicit-def dead %x20, 12, implicit-def dead %x21, 12, implicit-def dead %x22, 12, implicit-def dead %x23, 12, implicit-def dead %x24, 12, implicit-def dead %x25, 12, implicit-def dead %x26, 12, implicit-def dead %x27, 12, implicit-def dead %x28, 12, implicit-def dead %fp, 12, implicit-def dead %lr, 12, implicit-def %sp %x0 = ADDXri %0, 1, 0 RET_ReallyLR implicit %x0 ... @@ -44,7 +44,7 @@ body: | bb.0: ; CHECK: STRXui %xzr, %stack.0, 0 :: (store 8 into %stack.0) undef %0.ssub = COPY %wzr - INLINEASM $nop, 1, 12, implicit-def dead %d0, 12, implicit-def dead %d1, 12, implicit-def dead %d2, 12, implicit-def dead %d3, 12, implicit-def dead %d4, 12, implicit-def dead %d5, 12, implicit-def dead %d6, 12, implicit-def dead %d7, 12, implicit-def dead %d8, 12, implicit-def dead %d9, 12, implicit-def dead %d10, 12, implicit-def dead %d11, 12, implicit-def dead %d12, 12, implicit-def dead %d13, 12, implicit-def dead %d14, 12, implicit-def dead %d15, 12, implicit-def dead %d16, 12, implicit-def dead %d17, 12, implicit-def dead %d18, 12, implicit-def dead %d19, 12, implicit-def dead %d20, 12, implicit-def dead %d21, 12, implicit-def dead %d22, 12, implicit-def dead %d23, 12, implicit-def dead %d24, 12, implicit-def dead %d25, 12, implicit-def dead %d26, 12, implicit-def dead %d27, 12, implicit-def dead %d28, 12, implicit-def dead %d29, 12, implicit-def dead %d30, 12, implicit-def %d31 + INLINEASM &nop, 1, 12, implicit-def dead %d0, 12, implicit-def dead %d1, 12, implicit-def dead %d2, 12, implicit-def dead %d3, 12, implicit-def dead %d4, 12, implicit-def dead %d5, 12, implicit-def dead %d6, 12, implicit-def dead %d7, 12, implicit-def dead %d8, 12, implicit-def dead %d9, 12, implicit-def dead %d10, 12, implicit-def dead %d11, 12, implicit-def dead %d12, 12, implicit-def dead %d13, 12, implicit-def dead %d14, 12, implicit-def dead %d15, 12, implicit-def dead %d16, 12, implicit-def dead %d17, 12, implicit-def dead %d18, 12, implicit-def dead %d19, 12, implicit-def dead %d20, 12, implicit-def dead %d21, 12, implicit-def dead %d22, 12, implicit-def dead %d23, 12, implicit-def dead %d24, 12, implicit-def dead %d25, 12, implicit-def dead %d26, 12, implicit-def dead %d27, 12, implicit-def dead %d28, 12, implicit-def dead %d29, 12, implicit-def dead %d30, 12, implicit-def %d31 %x0 = COPY %0 RET_ReallyLR implicit %x0 ... @@ -58,7 +58,7 @@ registers: body: | bb.0: %0 = COPY %wzr - INLINEASM $nop, 1, 12, implicit-def dead %x0, 12, implicit-def dead %x1, 12, implicit-def dead %x2, 12, implicit-def dead %x3, 12, implicit-def dead %x4, 12, implicit-def dead %x5, 12, implicit-def dead %x6, 12, implicit-def dead %x7, 12, implicit-def dead %x8, 12, implicit-def dead %x9, 12, implicit-def dead %x10, 12, implicit-def dead %x11, 12, implicit-def dead %x12, 12, implicit-def dead %x13, 12, implicit-def dead %x14, 12, implicit-def dead %x15, 12, implicit-def dead %x16, 12, implicit-def dead %x17, 12, implicit-def dead %x18, 12, implicit-def dead %x19, 12, implicit-def dead %x20, 12, implicit-def dead %x21, 12, implicit-def dead %x22, 12, implicit-def dead %x23, 12, implicit-def dead %x24, 12, implicit-def dead %x25, 12, implicit-def dead %x26, 12, implicit-def dead %x27, 12, implicit-def dead %x28, 12, implicit-def dead %fp, 12, implicit-def dead %lr, 12, implicit-def %sp + INLINEASM &nop, 1, 12, implicit-def dead %x0, 12, implicit-def dead %x1, 12, implicit-def dead %x2, 12, implicit-def dead %x3, 12, implicit-def dead %x4, 12, implicit-def dead %x5, 12, implicit-def dead %x6, 12, implicit-def dead %x7, 12, implicit-def dead %x8, 12, implicit-def dead %x9, 12, implicit-def dead %x10, 12, implicit-def dead %x11, 12, implicit-def dead %x12, 12, implicit-def dead %x13, 12, implicit-def dead %x14, 12, implicit-def dead %x15, 12, implicit-def dead %x16, 12, implicit-def dead %x17, 12, implicit-def dead %x18, 12, implicit-def dead %x19, 12, implicit-def dead %x20, 12, implicit-def dead %x21, 12, implicit-def dead %x22, 12, implicit-def dead %x23, 12, implicit-def dead %x24, 12, implicit-def dead %x25, 12, implicit-def dead %x26, 12, implicit-def dead %x27, 12, implicit-def dead %x28, 12, implicit-def dead %fp, 12, implicit-def dead %lr, 12, implicit-def %sp ; CHECK: undef %1.sub_32:gpr64 = LDRWui %stack.0, 0 :: (load 4 from %stack.0) undef %1.sub_32 = COPY %0 %x0 = COPY %1 @@ -74,7 +74,7 @@ registers: body: | bb.0: %0 = COPY %wzr - INLINEASM $nop, 1, 12, implicit-def dead %x0, 12, implicit-def dead %x1, 12, implicit-def dead %x2, 12, implicit-def dead %x3, 12, implicit-def dead %x4, 12, implicit-def dead %x5, 12, implicit-def dead %x6, 12, implicit-def dead %x7, 12, implicit-def dead %x8, 12, implicit-def dead %x9, 12, implicit-def dead %x10, 12, implicit-def dead %x11, 12, implicit-def dead %x12, 12, implicit-def dead %x13, 12, implicit-def dead %x14, 12, implicit-def dead %x15, 12, implicit-def dead %x16, 12, implicit-def dead %x17, 12, implicit-def dead %x18, 12, implicit-def dead %x19, 12, implicit-def dead %x20, 12, implicit-def dead %x21, 12, implicit-def dead %x22, 12, implicit-def dead %x23, 12, implicit-def dead %x24, 12, implicit-def dead %x25, 12, implicit-def dead %x26, 12, implicit-def dead %x27, 12, implicit-def dead %x28, 12, implicit-def dead %fp, 12, implicit-def dead %lr, 12, implicit-def %sp + INLINEASM &nop, 1, 12, implicit-def dead %x0, 12, implicit-def dead %x1, 12, implicit-def dead %x2, 12, implicit-def dead %x3, 12, implicit-def dead %x4, 12, implicit-def dead %x5, 12, implicit-def dead %x6, 12, implicit-def dead %x7, 12, implicit-def dead %x8, 12, implicit-def dead %x9, 12, implicit-def dead %x10, 12, implicit-def dead %x11, 12, implicit-def dead %x12, 12, implicit-def dead %x13, 12, implicit-def dead %x14, 12, implicit-def dead %x15, 12, implicit-def dead %x16, 12, implicit-def dead %x17, 12, implicit-def dead %x18, 12, implicit-def dead %x19, 12, implicit-def dead %x20, 12, implicit-def dead %x21, 12, implicit-def dead %x22, 12, implicit-def dead %x23, 12, implicit-def dead %x24, 12, implicit-def dead %x25, 12, implicit-def dead %x26, 12, implicit-def dead %x27, 12, implicit-def dead %x28, 12, implicit-def dead %fp, 12, implicit-def dead %lr, 12, implicit-def %sp ; CHECK: undef %1.ssub:fpr64 = LDRSui %stack.0, 0 :: (load 4 from %stack.0) undef %1.ssub = COPY %0 %d0 = COPY %1 diff --git a/llvm/test/CodeGen/MIR/AMDGPU/memory-legalizer-multiple-mem-operands-atomics.mir b/llvm/test/CodeGen/MIR/AMDGPU/memory-legalizer-multiple-mem-operands-atomics.mir index c5598bf3b1e0..2f3095c777a3 100644 --- a/llvm/test/CodeGen/MIR/AMDGPU/memory-legalizer-multiple-mem-operands-atomics.mir +++ b/llvm/test/CodeGen/MIR/AMDGPU/memory-legalizer-multiple-mem-operands-atomics.mir @@ -115,9 +115,9 @@ body: | liveins: %sgpr0_sgpr1, %sgpr3 %sgpr2 = S_LOAD_DWORD_IMM %sgpr0_sgpr1, 44, 0 :: (non-temporal dereferenceable invariant load 4 from `i32 addrspace(2)* undef`) - %sgpr8 = S_MOV_B32 $SCRATCH_RSRC_DWORD0, implicit-def %sgpr8_sgpr9_sgpr10_sgpr11 + %sgpr8 = S_MOV_B32 &SCRATCH_RSRC_DWORD0, implicit-def %sgpr8_sgpr9_sgpr10_sgpr11 %sgpr4_sgpr5 = S_LOAD_DWORDX2_IMM %sgpr0_sgpr1, 36, 0 :: (non-temporal dereferenceable invariant load 8 from `i64 addrspace(2)* undef`) - %sgpr9 = S_MOV_B32 $SCRATCH_RSRC_DWORD1, implicit-def %sgpr8_sgpr9_sgpr10_sgpr11 + %sgpr9 = S_MOV_B32 &SCRATCH_RSRC_DWORD1, implicit-def %sgpr8_sgpr9_sgpr10_sgpr11 %sgpr10 = S_MOV_B32 4294967295, implicit-def %sgpr8_sgpr9_sgpr10_sgpr11 %sgpr11 = S_MOV_B32 15204352, implicit-def %sgpr8_sgpr9_sgpr10_sgpr11 %vgpr0 = V_MOV_B32_e32 1, implicit %exec diff --git a/llvm/test/CodeGen/MIR/AMDGPU/memory-legalizer-multiple-mem-operands-nontemporal-1.mir b/llvm/test/CodeGen/MIR/AMDGPU/memory-legalizer-multiple-mem-operands-nontemporal-1.mir index ed701563f66f..263bbeb05966 100644 --- a/llvm/test/CodeGen/MIR/AMDGPU/memory-legalizer-multiple-mem-operands-nontemporal-1.mir +++ b/llvm/test/CodeGen/MIR/AMDGPU/memory-legalizer-multiple-mem-operands-nontemporal-1.mir @@ -113,9 +113,9 @@ body: | liveins: %sgpr0_sgpr1, %sgpr3 %sgpr2 = S_LOAD_DWORD_IMM %sgpr0_sgpr1, 44, 0 :: (non-temporal dereferenceable invariant load 4 from `i32 addrspace(2)* undef`) - %sgpr8 = S_MOV_B32 $SCRATCH_RSRC_DWORD0, implicit-def %sgpr8_sgpr9_sgpr10_sgpr11 + %sgpr8 = S_MOV_B32 &SCRATCH_RSRC_DWORD0, implicit-def %sgpr8_sgpr9_sgpr10_sgpr11 %sgpr4_sgpr5 = S_LOAD_DWORDX2_IMM %sgpr0_sgpr1, 36, 0 :: (non-temporal dereferenceable invariant load 8 from `i64 addrspace(2)* undef`) - %sgpr9 = S_MOV_B32 $SCRATCH_RSRC_DWORD1, implicit-def %sgpr8_sgpr9_sgpr10_sgpr11 + %sgpr9 = S_MOV_B32 &SCRATCH_RSRC_DWORD1, implicit-def %sgpr8_sgpr9_sgpr10_sgpr11 %sgpr10 = S_MOV_B32 4294967295, implicit-def %sgpr8_sgpr9_sgpr10_sgpr11 %sgpr11 = S_MOV_B32 15204352, implicit-def %sgpr8_sgpr9_sgpr10_sgpr11 %vgpr0 = V_MOV_B32_e32 1, implicit %exec diff --git a/llvm/test/CodeGen/MIR/AMDGPU/memory-legalizer-multiple-mem-operands-nontemporal-2.mir b/llvm/test/CodeGen/MIR/AMDGPU/memory-legalizer-multiple-mem-operands-nontemporal-2.mir index 26e6df90d1ad..7e0c9e44e374 100644 --- a/llvm/test/CodeGen/MIR/AMDGPU/memory-legalizer-multiple-mem-operands-nontemporal-2.mir +++ b/llvm/test/CodeGen/MIR/AMDGPU/memory-legalizer-multiple-mem-operands-nontemporal-2.mir @@ -113,9 +113,9 @@ body: | liveins: %sgpr0_sgpr1, %sgpr3 %sgpr2 = S_LOAD_DWORD_IMM %sgpr0_sgpr1, 44, 0 :: (non-temporal dereferenceable invariant load 4 from `i32 addrspace(2)* undef`) - %sgpr8 = S_MOV_B32 $SCRATCH_RSRC_DWORD0, implicit-def %sgpr8_sgpr9_sgpr10_sgpr11 + %sgpr8 = S_MOV_B32 &SCRATCH_RSRC_DWORD0, implicit-def %sgpr8_sgpr9_sgpr10_sgpr11 %sgpr4_sgpr5 = S_LOAD_DWORDX2_IMM %sgpr0_sgpr1, 36, 0 :: (non-temporal dereferenceable invariant load 8 from `i64 addrspace(2)* undef`) - %sgpr9 = S_MOV_B32 $SCRATCH_RSRC_DWORD1, implicit-def %sgpr8_sgpr9_sgpr10_sgpr11 + %sgpr9 = S_MOV_B32 &SCRATCH_RSRC_DWORD1, implicit-def %sgpr8_sgpr9_sgpr10_sgpr11 %sgpr10 = S_MOV_B32 4294967295, implicit-def %sgpr8_sgpr9_sgpr10_sgpr11 %sgpr11 = S_MOV_B32 15204352, implicit-def %sgpr8_sgpr9_sgpr10_sgpr11 %vgpr0 = V_MOV_B32_e32 1, implicit %exec diff --git a/llvm/test/CodeGen/MIR/ARM/cfi-same-value.mir b/llvm/test/CodeGen/MIR/ARM/cfi-same-value.mir index 1a840883641d..cba3ef2063bf 100644 --- a/llvm/test/CodeGen/MIR/ARM/cfi-same-value.mir +++ b/llvm/test/CodeGen/MIR/ARM/cfi-same-value.mir @@ -50,7 +50,7 @@ body: | %sp = STMDB_UPD %sp, 14, _, %lr CFI_INSTRUCTION def_cfa_offset 12 CFI_INSTRUCTION offset %lr, -12 - BL $__morestack, implicit-def %lr, implicit %sp + BL &__morestack, implicit-def %lr, implicit %sp %sp = LDMIA_UPD %sp, 14, _, %lr %sp = LDMIA_UPD %sp, 14, _, %r4, %r5 CFI_INSTRUCTION def_cfa_offset 0 diff --git a/llvm/test/CodeGen/MIR/Mips/expected-global-value-or-symbol-after-call-entry.mir b/llvm/test/CodeGen/MIR/Mips/expected-global-value-or-symbol-after-call-entry.mir index cc7a96ff50cc..33a4136ceb86 100644 --- a/llvm/test/CodeGen/MIR/Mips/expected-global-value-or-symbol-after-call-entry.mir +++ b/llvm/test/CodeGen/MIR/Mips/expected-global-value-or-symbol-after-call-entry.mir @@ -27,7 +27,7 @@ body: | liveins: %a0, %ra Save16 %ra, 24, implicit-def %sp, implicit %sp - %v0, %v1 = GotPrologue16 $_gp_disp, $_gp_disp + %v0, %v1 = GotPrologue16 &_gp_disp, &_gp_disp %v0 = SllX16 killed %v0, 16 %v0 = AdduRxRyRz16 killed %v1, killed %v0 ; CHECK: [[@LINE+1]]:67: expected a global value or an external symbol after 'call-entry' diff --git a/llvm/test/CodeGen/MIR/Mips/memory-operands.mir b/llvm/test/CodeGen/MIR/Mips/memory-operands.mir index 0e465e82b333..62cddcf5588a 100644 --- a/llvm/test/CodeGen/MIR/Mips/memory-operands.mir +++ b/llvm/test/CodeGen/MIR/Mips/memory-operands.mir @@ -46,7 +46,7 @@ body: | Save16 %ra, 24, implicit-def %sp, implicit %sp CFI_INSTRUCTION def_cfa_offset 24 CFI_INSTRUCTION offset %ra_64, -4 - %v0, %v1 = GotPrologue16 $_gp_disp, $_gp_disp + %v0, %v1 = GotPrologue16 &_gp_disp, &_gp_disp %v0 = SllX16 killed %v0, 16 %v0 = AdduRxRyRz16 killed %v1, killed %v0 ; CHECK-LABEL: name: test @@ -84,13 +84,13 @@ body: | CFI_INSTRUCTION offset %ra_64, -4 CFI_INSTRUCTION offset %s2_64, -8 CFI_INSTRUCTION offset %s0_64, -12 - %v0, %v1 = GotPrologue16 $_gp_disp, $_gp_disp + %v0, %v1 = GotPrologue16 &_gp_disp, &_gp_disp %v0 = SllX16 killed %v0, 16 %s0 = AdduRxRyRz16 killed %v1, killed %v0 %v0 = LwRxRyOffMemX16 %s0, @g :: (load 4 from call-entry @g) ; CHECK-LABEL: test2 - ; CHECK: %v1 = LwRxRyOffMemX16 %s0, $__mips16_call_stub_sf_0 :: (load 4 from call-entry $__mips16_call_stub_sf_0) - %v1 = LwRxRyOffMemX16 %s0, $__mips16_call_stub_sf_0 :: (load 4 from call-entry $__mips16_call_stub_sf_0) + ; CHECK: %v1 = LwRxRyOffMemX16 %s0, &__mips16_call_stub_sf_0 :: (load 4 from call-entry &__mips16_call_stub_sf_0) + %v1 = LwRxRyOffMemX16 %s0, &__mips16_call_stub_sf_0 :: (load 4 from call-entry &__mips16_call_stub_sf_0) %gp = COPY %s0 JumpLinkReg16 killed %v1, csr_o32, implicit-def %ra, implicit %v0, implicit killed %gp, implicit-def %sp, implicit-def %v0 %v1 = LwRxRyOffMemX16 %s0, @__mips16_ret_sf :: (load 4 from call-entry @__mips16_ret_sf) diff --git a/llvm/test/CodeGen/MIR/NVPTX/expected-floating-point-literal.mir b/llvm/test/CodeGen/MIR/NVPTX/expected-floating-point-literal.mir index d35fd323bf5d..a75765ffe40e 100644 --- a/llvm/test/CodeGen/MIR/NVPTX/expected-floating-point-literal.mir +++ b/llvm/test/CodeGen/MIR/NVPTX/expected-floating-point-literal.mir @@ -16,7 +16,7 @@ registers: - { id: 1, class: float32regs } body: | bb.0.entry: - %0 = LD_f32_avar 0, 4, 1, 2, 32, $test_param_0 + %0 = LD_f32_avar 0, 4, 1, 2, 32, &test_param_0 ; CHECK: [[@LINE+1]]:33: expected a floating point literal %1 = FADD_rnf32ri %0, float 3 StoreRetvalF32 %1, 0 diff --git a/llvm/test/CodeGen/MIR/NVPTX/floating-point-immediate-operands.mir b/llvm/test/CodeGen/MIR/NVPTX/floating-point-immediate-operands.mir index 71d232b58cf8..58e2e644b000 100644 --- a/llvm/test/CodeGen/MIR/NVPTX/floating-point-immediate-operands.mir +++ b/llvm/test/CodeGen/MIR/NVPTX/floating-point-immediate-operands.mir @@ -40,9 +40,9 @@ registers: - { id: 7, class: float32regs } body: | bb.0.entry: - %0 = LD_f32_avar 0, 4, 1, 2, 32, $test_param_0 + %0 = LD_f32_avar 0, 4, 1, 2, 32, &test_param_0 %1 = CVT_f64_f32 %0, 0 - %2 = LD_i32_avar 0, 4, 1, 0, 32, $test_param_1 + %2 = LD_i32_avar 0, 4, 1, 0, 32, &test_param_1 ; CHECK: %3:float64regs = FADD_rnf64ri %1, double 3.250000e+00 %3 = FADD_rnf64ri %1, double 3.250000e+00 %4 = CVT_f32_f64 %3, 5 @@ -66,9 +66,9 @@ registers: - { id: 7, class: float32regs } body: | bb.0.entry: - %0 = LD_f32_avar 0, 4, 1, 2, 32, $test2_param_0 + %0 = LD_f32_avar 0, 4, 1, 2, 32, &test2_param_0 %1 = CVT_f64_f32 %0, 0 - %2 = LD_i32_avar 0, 4, 1, 0, 32, $test2_param_1 + %2 = LD_i32_avar 0, 4, 1, 0, 32, &test2_param_1 ; CHECK: %3:float64regs = FADD_rnf64ri %1, double 0x7FF8000000000000 %3 = FADD_rnf64ri %1, double 0x7FF8000000000000 %4 = CVT_f32_f64 %3, 5 diff --git a/llvm/test/CodeGen/MIR/NVPTX/floating-point-invalid-type-error.mir b/llvm/test/CodeGen/MIR/NVPTX/floating-point-invalid-type-error.mir index 2ff7f1a9451d..e5d8f9ba6a9d 100644 --- a/llvm/test/CodeGen/MIR/NVPTX/floating-point-invalid-type-error.mir +++ b/llvm/test/CodeGen/MIR/NVPTX/floating-point-invalid-type-error.mir @@ -16,7 +16,7 @@ registers: - { id: 1, class: float32regs } body: | bb.0.entry: - %0 = LD_f32_avar 0, 4, 1, 2, 32, $test_param_0 + %0 = LD_f32_avar 0, 4, 1, 2, 32, &test_param_0 ; CHECK: [[@LINE+1]]:33: floating point constant does not have type 'float' %1 = FADD_rnf32ri %0, float 0xH3C00 StoreRetvalF32 %1, 0 diff --git a/llvm/test/CodeGen/MIR/X86/def-register-already-tied-error.mir b/llvm/test/CodeGen/MIR/X86/def-register-already-tied-error.mir index fe0740e9c622..32d41d264e73 100644 --- a/llvm/test/CodeGen/MIR/X86/def-register-already-tied-error.mir +++ b/llvm/test/CodeGen/MIR/X86/def-register-already-tied-error.mir @@ -18,7 +18,7 @@ body: | liveins: %rdi ; CHECK: [[@LINE+1]]:83: the tied-def operand #3 is already tied with another register operand - INLINEASM $"$foo", 1, 2818058, def %rdi, 2147483657, killed %rdi(tied-def 3), killed %rdi(tied-def 3) + INLINEASM &"$foo", 1, 2818058, def %rdi, 2147483657, killed %rdi(tied-def 3), killed %rdi(tied-def 3) %rax = COPY killed %rdi RETQ killed %rax ... diff --git a/llvm/test/CodeGen/MIR/X86/early-clobber-register-flag.mir b/llvm/test/CodeGen/MIR/X86/early-clobber-register-flag.mir index 2bc825016bc2..7f345545ffdd 100644 --- a/llvm/test/CodeGen/MIR/X86/early-clobber-register-flag.mir +++ b/llvm/test/CodeGen/MIR/X86/early-clobber-register-flag.mir @@ -35,8 +35,8 @@ body: | CFI_INSTRUCTION def_cfa_offset 16 %ecx = COPY %edi %ecx = ADD32rr killed %ecx, killed %esi, implicit-def dead %eflags - ; CHECK: INLINEASM $nop, 1, 12, implicit-def dead early-clobber %ax, 12, implicit-def dead early-clobber %di - INLINEASM $nop, 1, 12, implicit-def dead early-clobber %ax, 12, implicit-def dead early-clobber %di + ; CHECK: INLINEASM &nop, 1, 12, implicit-def dead early-clobber %ax, 12, implicit-def dead early-clobber %di + INLINEASM &nop, 1, 12, implicit-def dead early-clobber %ax, 12, implicit-def dead early-clobber %di %edi = COPY killed %ecx CALL64pcrel32 @foo, csr_64, implicit %rsp, implicit %edi, implicit-def %rsp %rax = POP64r implicit-def %rsp, implicit %rsp diff --git a/llvm/test/CodeGen/MIR/X86/expected-integer-after-tied-def.mir b/llvm/test/CodeGen/MIR/X86/expected-integer-after-tied-def.mir index edbe7d4c34e4..aa30804aafa8 100644 --- a/llvm/test/CodeGen/MIR/X86/expected-integer-after-tied-def.mir +++ b/llvm/test/CodeGen/MIR/X86/expected-integer-after-tied-def.mir @@ -18,7 +18,7 @@ body: | liveins: %rdi ; CHECK: [[@LINE+1]]:78: expected tied-def or low-level type after '(' - INLINEASM $"$foo", 1, 2818058, def %rdi, 2147483657, killed %rdi(tied-def) + INLINEASM &"$foo", 1, 2818058, def %rdi, 2147483657, killed %rdi(tied-def) %rax = COPY killed %rdi RETQ killed %rax ... diff --git a/llvm/test/CodeGen/MIR/X86/expected-tied-def-after-lparen.mir b/llvm/test/CodeGen/MIR/X86/expected-tied-def-after-lparen.mir index f80dd8d7e627..ce2dfed40281 100644 --- a/llvm/test/CodeGen/MIR/X86/expected-tied-def-after-lparen.mir +++ b/llvm/test/CodeGen/MIR/X86/expected-tied-def-after-lparen.mir @@ -18,7 +18,7 @@ body: | liveins: %rdi ; CHECK: [[@LINE+1]]:70: expected tied-def or low-level type after '(' - INLINEASM $"$foo", 1, 2818058, def %rdi, 2147483657, killed %rdi(3) + INLINEASM &"$foo", 1, 2818058, def %rdi, 2147483657, killed %rdi(3) %rax = COPY killed %rdi RETQ killed %rax ... diff --git a/llvm/test/CodeGen/MIR/X86/external-symbol-operands.mir b/llvm/test/CodeGen/MIR/X86/external-symbol-operands.mir index 599f957f66d5..edc432d8b47c 100644 --- a/llvm/test/CodeGen/MIR/X86/external-symbol-operands.mir +++ b/llvm/test/CodeGen/MIR/X86/external-symbol-operands.mir @@ -49,16 +49,16 @@ body: | RETQ %eax bb.2.entry: - ; CHECK: CALL64pcrel32 $__stack_chk_fail, - ; CHECK-NEXT: CALL64pcrel32 $__stack_chk_fail.09-_, - ; CHECK-NEXT: CALL64pcrel32 $"__stack_chk_fail$", - ; CHECK-NEXT: CALL64pcrel32 $"$Quoted \09 External symbol \11 ", - ; CHECK-NEXT: CALL64pcrel32 $__stack_chk_fail + 2, - ; CHECK-NEXT: CALL64pcrel32 $" check stack - 20" - 20, - CALL64pcrel32 $__stack_chk_fail, csr_64, implicit %rsp, implicit-def %rsp - CALL64pcrel32 $__stack_chk_fail.09-_, csr_64, implicit %rsp, implicit-def %rsp - CALL64pcrel32 $__stack_chk_fail$, csr_64, implicit %rsp, implicit-def %rsp - CALL64pcrel32 $"$Quoted \09 External symbol \11 ", csr_64, implicit %rsp, implicit-def %rsp - CALL64pcrel32 $__stack_chk_fail + 2, csr_64, implicit %rsp, implicit-def %rsp - CALL64pcrel32 $" check stack - 20" - 20, csr_64, implicit %rsp, implicit-def %rsp + ; CHECK: CALL64pcrel32 &__stack_chk_fail, + ; CHECK-NEXT: CALL64pcrel32 &__stack_chk_fail.09-_, + ; CHECK-NEXT: CALL64pcrel32 &"__stack_chk_fail$", + ; CHECK-NEXT: CALL64pcrel32 &"$Quoted \09 External symbol \11 ", + ; CHECK-NEXT: CALL64pcrel32 &__stack_chk_fail + 2, + ; CHECK-NEXT: CALL64pcrel32 &" check stack - 20" - 20, + CALL64pcrel32 &__stack_chk_fail, csr_64, implicit %rsp, implicit-def %rsp + CALL64pcrel32 &__stack_chk_fail.09-_, csr_64, implicit %rsp, implicit-def %rsp + CALL64pcrel32 &__stack_chk_fail$, csr_64, implicit %rsp, implicit-def %rsp + CALL64pcrel32 &"$Quoted \09 External symbol \11 ", csr_64, implicit %rsp, implicit-def %rsp + CALL64pcrel32 &__stack_chk_fail + 2, csr_64, implicit %rsp, implicit-def %rsp + CALL64pcrel32 &" check stack - 20" - 20, csr_64, implicit %rsp, implicit-def %rsp ... diff --git a/llvm/test/CodeGen/MIR/X86/frame-info-stack-references.mir b/llvm/test/CodeGen/MIR/X86/frame-info-stack-references.mir index e64b44c65f81..5aa10afa3c18 100644 --- a/llvm/test/CodeGen/MIR/X86/frame-info-stack-references.mir +++ b/llvm/test/CodeGen/MIR/X86/frame-info-stack-references.mir @@ -75,5 +75,5 @@ body: | RETQ %eax bb.2.entry: - CALL64pcrel32 $__stack_chk_fail, csr_64, implicit %rsp, implicit-def %rsp + CALL64pcrel32 &__stack_chk_fail, csr_64, implicit %rsp, implicit-def %rsp ... diff --git a/llvm/test/CodeGen/MIR/X86/inline-asm-registers.mir b/llvm/test/CodeGen/MIR/X86/inline-asm-registers.mir index d84cebfc6df1..2a6e91c484ac 100644 --- a/llvm/test/CodeGen/MIR/X86/inline-asm-registers.mir +++ b/llvm/test/CodeGen/MIR/X86/inline-asm-registers.mir @@ -28,8 +28,8 @@ body: | liveins: %rdi, %rsi ; CHECK-LABEL: name: test - ; CHECK: INLINEASM $foo, 0, 2818058, def %rsi, 2818058, def dead %rdi, - INLINEASM $foo, 0, 2818058, def %rsi, 2818058, def dead %rdi, 2147549193, killed %rdi, 2147483657, killed %rsi, 12, implicit-def dead early-clobber %eflags + ; CHECK: INLINEASM &foo, 0, 2818058, def %rsi, 2818058, def dead %rdi, + INLINEASM &foo, 0, 2818058, def %rsi, 2818058, def dead %rdi, 2147549193, killed %rdi, 2147483657, killed %rsi, 12, implicit-def dead early-clobber %eflags %rax = MOV64rr killed %rsi RETQ killed %rax ... @@ -45,8 +45,8 @@ body: | ; Verify that the register ties are preserved. ; CHECK-LABEL: name: test2 - ; CHECK: INLINEASM $foo, 0, 2818058, def %rsi, 2818058, def dead %rdi, 2147549193, killed %rdi(tied-def 5), 2147483657, killed %rsi(tied-def 3), 12, implicit-def dead early-clobber %eflags - INLINEASM $foo, 0, 2818058, def %rsi, 2818058, def dead %rdi, 2147549193, killed %rdi(tied-def 5), 2147483657, killed %rsi(tied-def 3), 12, implicit-def dead early-clobber %eflags + ; CHECK: INLINEASM &foo, 0, 2818058, def %rsi, 2818058, def dead %rdi, 2147549193, killed %rdi(tied-def 5), 2147483657, killed %rsi(tied-def 3), 12, implicit-def dead early-clobber %eflags + INLINEASM &foo, 0, 2818058, def %rsi, 2818058, def dead %rdi, 2147549193, killed %rdi(tied-def 5), 2147483657, killed %rsi(tied-def 3), 12, implicit-def dead early-clobber %eflags %rax = MOV64rr killed %rsi RETQ killed %rax ... diff --git a/llvm/test/CodeGen/MIR/X86/inline-asm.mir b/llvm/test/CodeGen/MIR/X86/inline-asm.mir index be96517144b0..4d976a944c5f 100644 --- a/llvm/test/CodeGen/MIR/X86/inline-asm.mir +++ b/llvm/test/CodeGen/MIR/X86/inline-asm.mir @@ -3,10 +3,10 @@ # Avoid crash/assert when using an emptystring in an INLINEASM. # CHECK-LABEL: name: emptystring # CHECK: bb.0: -# CHECK: INLINEASM $"", 1 +# CHECK: INLINEASM &"", 1 # CHECK: RET 0 name: emptystring body: | bb.0: - INLINEASM $"", 1 + INLINEASM &"", 1 RET 0 diff --git a/llvm/test/CodeGen/MIR/X86/invalid-tied-def-index-error.mir b/llvm/test/CodeGen/MIR/X86/invalid-tied-def-index-error.mir index 7a0994def210..aac3cecc96fa 100644 --- a/llvm/test/CodeGen/MIR/X86/invalid-tied-def-index-error.mir +++ b/llvm/test/CodeGen/MIR/X86/invalid-tied-def-index-error.mir @@ -18,7 +18,7 @@ body: | liveins: %rdi ; CHECK: [[@LINE+1]]:58: use of invalid tied-def operand index '300'; instruction has only 6 operands - INLINEASM $"$foo", 1, 2818058, def %rdi, 2147483657, killed %rdi(tied-def 300) + INLINEASM &"$foo", 1, 2818058, def %rdi, 2147483657, killed %rdi(tied-def 300) %rax = COPY killed %rdi RETQ killed %rax ... diff --git a/llvm/test/CodeGen/MIR/X86/memory-operands.mir b/llvm/test/CodeGen/MIR/X86/memory-operands.mir index 5db721da72ec..3d23b47b6c71 100644 --- a/llvm/test/CodeGen/MIR/X86/memory-operands.mir +++ b/llvm/test/CodeGen/MIR/X86/memory-operands.mir @@ -359,7 +359,7 @@ body: | ; CHECK: name: stack_psv ; CHECK: ST_FP80m %rsp, 1, %noreg, 0, %noreg, implicit-def dead %fpsw :: (store 10 into stack, align 16) ST_FP80m %rsp, 1, _, 0, _, implicit-def dead %fpsw :: (store 10 into stack, align 16) - CALL64pcrel32 $cosl, csr_64, implicit %rsp, implicit-def %rsp, implicit-def %fp0 + CALL64pcrel32 &cosl, csr_64, implicit %rsp, implicit-def %rsp, implicit-def %fp0 %rsp = ADD64ri8 %rsp, 24, implicit-def dead %eflags RETQ ... diff --git a/llvm/test/CodeGen/MIR/X86/tied-def-operand-invalid.mir b/llvm/test/CodeGen/MIR/X86/tied-def-operand-invalid.mir index 84a38bf8380c..f4ea327edea2 100644 --- a/llvm/test/CodeGen/MIR/X86/tied-def-operand-invalid.mir +++ b/llvm/test/CodeGen/MIR/X86/tied-def-operand-invalid.mir @@ -18,7 +18,7 @@ body: | liveins: %rdi ; CHECK: [[@LINE+1]]:58: use of invalid tied-def operand index '0'; the operand #0 isn't a defined register - INLINEASM $"$foo", 1, 2818058, def %rdi, 2147483657, killed %rdi(tied-def 0) + INLINEASM &"$foo", 1, 2818058, def %rdi, 2147483657, killed %rdi(tied-def 0) %rax = COPY killed %rdi RETQ killed %rax ... diff --git a/llvm/test/CodeGen/Mips/mirparser/target-flags-pic-mxgot-tls.mir b/llvm/test/CodeGen/Mips/mirparser/target-flags-pic-mxgot-tls.mir index 05923377ec6f..6cd0896de757 100644 --- a/llvm/test/CodeGen/Mips/mirparser/target-flags-pic-mxgot-tls.mir +++ b/llvm/test/CodeGen/Mips/mirparser/target-flags-pic-mxgot-tls.mir @@ -166,9 +166,9 @@ body: | %16 = LW killed %15, 0 :: (dereferenceable load 4 from @v) %0 = ADDu killed %12, killed %16 ADJCALLSTACKDOWN 0, 0, implicit-def dead %sp, implicit %sp - %17 = LUi64 target-flags(mips-call-hi16) $__tls_get_addr + %17 = LUi64 target-flags(mips-call-hi16) &__tls_get_addr %18 = DADDu killed %17, %6 - %19 = LD killed %18, target-flags(mips-call-lo16) $__tls_get_addr :: (load 8 from call-entry $__tls_get_addr) + %19 = LD killed %18, target-flags(mips-call-lo16) &__tls_get_addr :: (load 8 from call-entry &__tls_get_addr) %20 = DADDiu %6, target-flags(mips-tlsldm) @__tls_guard %a0_64 = COPY %20 %gp_64 = COPY %6 @@ -184,9 +184,9 @@ body: | successors: %bb.3._ZTW1k.exit(0x80000000) ADJCALLSTACKDOWN 0, 0, implicit-def dead %sp, implicit %sp - %39 = LUi64 target-flags(mips-call-hi16) $__tls_get_addr + %39 = LUi64 target-flags(mips-call-hi16) &__tls_get_addr %40 = DADDu killed %39, %6 - %41 = LD killed %40, target-flags(mips-call-lo16) $__tls_get_addr :: (load 8 from call-entry $__tls_get_addr) + %41 = LD killed %40, target-flags(mips-call-lo16) &__tls_get_addr :: (load 8 from call-entry &__tls_get_addr) %42 = DADDiu %6, target-flags(mips-tlsgd) @k %a0_64 = COPY %42 %gp_64 = COPY %6 @@ -200,9 +200,9 @@ body: | successors: %bb.3._ZTW1k.exit(0x80000000) ADJCALLSTACKDOWN 0, 0, implicit-def dead %sp, implicit %sp - %24 = LUi64 target-flags(mips-call-hi16) $__tls_get_addr + %24 = LUi64 target-flags(mips-call-hi16) &__tls_get_addr %25 = DADDu killed %24, %6 - %26 = LD %25, target-flags(mips-call-lo16) $__tls_get_addr :: (load 8 from call-entry $__tls_get_addr) + %26 = LD %25, target-flags(mips-call-lo16) &__tls_get_addr :: (load 8 from call-entry &__tls_get_addr) %27 = DADDiu %6, target-flags(mips-tlsldm) @__tls_guard %a0_64 = COPY %27 %gp_64 = COPY %6 @@ -223,7 +223,7 @@ body: | ADJCALLSTACKUP 0, 0, implicit-def dead %sp, implicit %sp %35 = COPY %v0 ADJCALLSTACKDOWN 0, 0, implicit-def dead %sp, implicit %sp - %36 = LD %25, target-flags(mips-call-lo16) $__tls_get_addr :: (load 8 from call-entry $__tls_get_addr) + %36 = LD %25, target-flags(mips-call-lo16) &__tls_get_addr :: (load 8 from call-entry &__tls_get_addr) %37 = DADDiu %6, target-flags(mips-tlsgd) @k %a0_64 = COPY %37 %gp_64 = COPY %6 @@ -257,9 +257,9 @@ body: | bb.5._ZTW1j.exit: ADJCALLSTACKDOWN 0, 0, implicit-def dead %sp, implicit %sp - %50 = LUi64 target-flags(mips-call-hi16) $__tls_get_addr + %50 = LUi64 target-flags(mips-call-hi16) &__tls_get_addr %51 = DADDu killed %50, %6 - %52 = LD killed %51, target-flags(mips-call-lo16) $__tls_get_addr :: (load 8 from call-entry $__tls_get_addr) + %52 = LD killed %51, target-flags(mips-call-lo16) &__tls_get_addr :: (load 8 from call-entry &__tls_get_addr) %53 = DADDiu %6, target-flags(mips-tlsgd) @j %a0_64 = COPY %53 %gp_64 = COPY %6 diff --git a/llvm/test/CodeGen/PowerPC/aantidep-def-ec.mir b/llvm/test/CodeGen/PowerPC/aantidep-def-ec.mir index 09aac7b0240a..523329a345f4 100644 --- a/llvm/test/CodeGen/PowerPC/aantidep-def-ec.mir +++ b/llvm/test/CodeGen/PowerPC/aantidep-def-ec.mir @@ -82,8 +82,8 @@ body: | BL8_NOP @__raw_read_unlock, csr_svr464_altivec, implicit-def %lr8, implicit %rm, implicit %x3, implicit %x2, implicit-def %r1, implicit-def dead %x3 %r3 = LI 0 STW killed %r3, 0, killed %x30 :: (volatile store 4 into %ir.p2) - INLINEASM $"#compiler barrier", 25 - INLINEASM $"\0Alwsync \0A1:\09lwarx\09$0,0,$1\09\09# atomic_dec_return\0A\09addic\09$0,$0,-1\0A\09stwcx.\09$0,0,$1\0A\09bne-\091b\0Async \0A", 25, 131083, def early-clobber %r3, 851977, killed %x29, 12, implicit-def dead early-clobber %cr0 + INLINEASM &"#compiler barrier", 25 + INLINEASM &"\0Alwsync \0A1:\09lwarx\09$0,0,$1\09\09# atomic_dec_return\0A\09addic\09$0,$0,-1\0A\09stwcx.\09$0,0,$1\0A\09bne-\091b\0Async \0A", 25, 131083, def early-clobber %r3, 851977, killed %x29, 12, implicit-def dead early-clobber %cr0 ; CHECK-LABEL: @mm_update_next_owner ; CHECK-NOT: lwarx 29, 0, 29 ; CHECK-NOT: stwcx. 29, 0, 29 diff --git a/llvm/test/CodeGen/SystemZ/RAbasic-invalid-LR-update.mir b/llvm/test/CodeGen/SystemZ/RAbasic-invalid-LR-update.mir index e4365f605cbc..163b637e10ba 100644 --- a/llvm/test/CodeGen/SystemZ/RAbasic-invalid-LR-update.mir +++ b/llvm/test/CodeGen/SystemZ/RAbasic-invalid-LR-update.mir @@ -155,7 +155,7 @@ body: | ADJCALLSTACKDOWN 0, 0 %12 = LZDR %f0d = COPY %12 - CallBRASL $fmod, killed %f0d, undef %f2d, csr_systemz, implicit-def dead %r14d, implicit-def dead %cc, implicit-def %f0d + CallBRASL &fmod, killed %f0d, undef %f2d, csr_systemz, implicit-def dead %r14d, implicit-def dead %cc, implicit-def %f0d ADJCALLSTACKUP 0, 0 KILL killed %f0d diff --git a/llvm/test/CodeGen/SystemZ/fp-cmp-07.mir b/llvm/test/CodeGen/SystemZ/fp-cmp-07.mir index 2551d19b53b1..a297b251145c 100644 --- a/llvm/test/CodeGen/SystemZ/fp-cmp-07.mir +++ b/llvm/test/CodeGen/SystemZ/fp-cmp-07.mir @@ -32,7 +32,7 @@ body: | LTEBRCompare %f0s, %f0s, implicit-def %cc %f2s = LER %f0s - INLINEASM $"blah $0", 1, 9, %f2s + INLINEASM &"blah $0", 1, 9, %f2s CondReturn 15, 4, implicit %f0s, implicit %cc bb.1.store: diff --git a/llvm/test/CodeGen/X86/stack-protector-weight.ll b/llvm/test/CodeGen/X86/stack-protector-weight.ll index e8a4746bb648..329b90e933ff 100644 --- a/llvm/test/CodeGen/X86/stack-protector-weight.ll +++ b/llvm/test/CodeGen/X86/stack-protector-weight.ll @@ -6,7 +6,7 @@ ; DARWIN-SELDAG: # Machine code for function test_branch_weights: ; DARWIN-SELDAG: Successors according to CFG: %bb.[[SUCCESS:[0-9]+]]({{[0-9a-fx/= ]+}}100.00%) %bb.[[FAILURE:[0-9]+]] ; DARWIN-SELDAG: %bb.[[FAILURE]]: -; DARWIN-SELDAG: CALL64pcrel32 $__stack_chk_fail +; DARWIN-SELDAG: CALL64pcrel32 &__stack_chk_fail ; DARWIN-SELDAG: %bb.[[SUCCESS]]: ; DARWIN-IR: # Machine code for function test_branch_weights: diff --git a/llvm/unittests/CodeGen/MachineOperandTest.cpp b/llvm/unittests/CodeGen/MachineOperandTest.cpp index 78a20b836486..5bb0b622e099 100644 --- a/llvm/unittests/CodeGen/MachineOperandTest.cpp +++ b/llvm/unittests/CodeGen/MachineOperandTest.cpp @@ -215,7 +215,7 @@ TEST(MachineOperandTest, PrintExternalSymbol) { { raw_string_ostream OS(str); MO.print(OS, /*TRI=*/nullptr, /*IntrinsicInfo=*/nullptr); - ASSERT_TRUE(OS.str() == "$foo"); + ASSERT_TRUE(OS.str() == "&foo"); } str.clear(); @@ -225,7 +225,7 @@ TEST(MachineOperandTest, PrintExternalSymbol) { { raw_string_ostream OS(str); MO.print(OS, /*TRI=*/nullptr, /*IntrinsicInfo=*/nullptr); - ASSERT_TRUE(OS.str() == "$foo + 12"); + ASSERT_TRUE(OS.str() == "&foo + 12"); } str.clear(); @@ -235,7 +235,7 @@ TEST(MachineOperandTest, PrintExternalSymbol) { { raw_string_ostream OS(str); MO.print(OS, /*TRI=*/nullptr, /*IntrinsicInfo=*/nullptr); - ASSERT_TRUE(OS.str() == "$foo - 12"); + ASSERT_TRUE(OS.str() == "&foo - 12"); } }