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Fix bug in which nodes that write to argument registers do not get glued with the JALR node. Patch by Sasa Stankovic 

llvm-svn: 131714
This commit is contained in:
Akira Hatanaka 2011-05-20 02:30:51 +00:00
parent e51dc6f32a
commit fe4f9d5977
2 changed files with 17 additions and 16 deletions
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23
llvm/lib/Target/Mips/MipsISelLowering.cpp
View File

@ -1135,17 +1135,6 @@ MipsTargetLowering::LowerCall(SDValue Chain, SDValue Callee,
Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
&MemOpChains[0], MemOpChains.size());
// Build a sequence of copy-to-reg nodes chained together with token
// chain and flag operands which copy the outgoing args into registers.
// The InFlag in necessary since all emitted instructions must be
// stuck together.
SDValue InFlag;
for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) {
Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first,
RegsToPass[i].second, InFlag);
InFlag = Chain.getValue(1);
}
// If the callee is a GlobalAddress/ExternalSymbol node (quite common, every
// direct call is) turn it into a TargetGlobalAddress/TargetExternalSymbol
// node so that legalize doesn't hack it.
@ -1172,6 +1161,8 @@ MipsTargetLowering::LowerCall(SDValue Chain, SDValue Callee,
LoadSymAddr = true;
}
SDValue InFlag;
// Create nodes that load address of callee and copy it to T9
if (IsPIC) {
if (LoadSymAddr) {
@ -1197,6 +1188,16 @@ MipsTargetLowering::LowerCall(SDValue Chain, SDValue Callee,
Callee = DAG.getRegister(Mips::T9, MVT::i32);
}
// Build a sequence of copy-to-reg nodes chained together with token
// chain and flag operands which copy the outgoing args into registers.
// The InFlag in necessary since all emitted instructions must be
// stuck together.
for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) {
Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first,
RegsToPass[i].second, InFlag);
InFlag = Chain.getValue(1);
}
// MipsJmpLink = #chain, #target_address, #opt_in_flags...
// = Chain, Callee, Reg#1, Reg#2, ...
//

10
llvm/test/CodeGen/Mips/i64arg.ll
View File

@ -4,24 +4,24 @@ define void @f1(i64 %ll1, float %f, i64 %ll, i32 %i, float %f2) nounwind {
entry:
; CHECK: addu $[[R1:[0-9]+]], $zero, $5
; CHECK: addu $[[R0:[0-9]+]], $zero, $4
; CHECK: lw $25, %call16(ff1)
; CHECK: ori $6, ${{[0-9]+}}, 3855
; CHECK: ori $7, ${{[0-9]+}}, 22136
; CHECK: lw $25, %call16(ff1)
; CHECK: jalr
tail call void @ff1(i32 %i, i64 1085102592623924856) nounwind
; CHECK: lw $[[R2:[0-9]+]], 96($sp)
; CHECK: lw $[[R3:[0-9]+]], 100($sp)
; CHECK: lw $25, %call16(ff2)
; CHECK: lw $[[R2:[0-9]+]], 88($sp)
; CHECK: lw $[[R3:[0-9]+]], 92($sp)
; CHECK: addu $4, $zero, $[[R2]]
; CHECK: addu $5, $zero, $[[R3]]
; CHECK: lw $25, %call16(ff2)
; CHECK: jalr $25
tail call void @ff2(i64 %ll, double 3.000000e+00) nounwind
%sub = add nsw i32 %i, -1
; CHECK: sw $[[R0]], 24($sp)
; CHECK: sw $[[R1]], 28($sp)
; CHECK: lw $25, %call16(ff3)
; CHECK: addu $6, $zero, $[[R2]]
; CHECK: addu $7, $zero, $[[R3]]
; CHECK: lw $25, %call16(ff3)
; CHECK: jalr $25
tail call void @ff3(i32 %i, i64 %ll, i32 %sub, i64 %ll1) nounwind
ret void