From fe32bd87c220440453018d239c130fc329aa52d4 Mon Sep 17 00:00:00 2001
From: Vincent Lejeune <vljn@ovi.com>
Date: Tue, 5 Mar 2013 19:12:06 +0000
Subject: [PATCH] R600: Do not predicate vector op

llvm-svn: 176507
---
 llvm/lib/Target/R600/R600InstrInfo.cpp | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/llvm/lib/Target/R600/R600InstrInfo.cpp b/llvm/lib/Target/R600/R600InstrInfo.cpp
index 7e3f00572930..106bbc049509 100644
--- a/llvm/lib/Target/R600/R600InstrInfo.cpp
+++ b/llvm/lib/Target/R600/R600InstrInfo.cpp
@@ -356,6 +356,8 @@ R600InstrInfo::isPredicable(MachineInstr *MI) const {
 
   if (MI->getOpcode() == AMDGPU::KILLGT) {
     return false;
+  } else if (isVector(*MI)) {
+    return false;
   } else {
     return AMDGPUInstrInfo::isPredicable(MI);
   }