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AMDGPU: Remove analyzeImmediate 

This no longer uses the more complicated classification
of constants.

llvm-svn: 276945
This commit is contained in:
Matt Arsenault 2016-07-28 00:32:02 +00:00
parent 242fde1b36
commit fe26775992
3 changed files with 12 additions and 34 deletions
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17
llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
View File

@ -67,7 +67,7 @@ public:
void PostprocessISelDAG() override;
private:
bool isInlineImmediate(SDNode *N) const;
bool isInlineImmediate(const SDNode *N) const;
bool FoldOperand(SDValue &Src, SDValue &Sel, SDValue &Neg, SDValue &Abs,
const R600InstrInfo *TII);
bool FoldOperands(unsigned, const R600InstrInfo *, std::vector<SDValue> &);
@ -175,10 +175,17 @@ bool AMDGPUDAGToDAGISel::runOnMachineFunction(MachineFunction &MF) {
AMDGPUDAGToDAGISel::~AMDGPUDAGToDAGISel() {
}
bool AMDGPUDAGToDAGISel::isInlineImmediate(SDNode *N) const {
const SITargetLowering *TL
= static_cast<const SITargetLowering *>(getTargetLowering());
return TL->analyzeImmediate(N) == 0;
bool AMDGPUDAGToDAGISel::isInlineImmediate(const SDNode *N) const {
const SIInstrInfo *TII
= static_cast<const SISubtarget *>(Subtarget)->getInstrInfo();
if (const ConstantSDNode *C = dyn_cast<ConstantSDNode>(N))
return TII->isInlineConstant(C->getAPIntValue());
if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(N))
return TII->isInlineConstant(C->getValueAPF().bitcastToAPInt());
return false;
}
/// \brief Determine the register class for \p OpNo

28
llvm/lib/Target/AMDGPU/SIISelLowering.cpp
View File

@ -3377,34 +3377,6 @@ SDValue SITargetLowering::PerformDAGCombine(SDNode *N,
return AMDGPUTargetLowering::PerformDAGCombine(N, DCI);
}
/// \brief Analyze the possible immediate value Op
///
/// Returns -1 if it isn't an immediate, 0 if it's and inline immediate
/// and the immediate value if it's a literal immediate
int32_t SITargetLowering::analyzeImmediate(const SDNode *N) const {
const SIInstrInfo *TII = getSubtarget()->getInstrInfo();
if (const ConstantSDNode *Node = dyn_cast<ConstantSDNode>(N)) {
if (TII->isInlineConstant(Node->getAPIntValue()))
return 0;
uint64_t Val = Node->getZExtValue();
return isUInt<32>(Val) ? Val : -1;
}
if (const ConstantFPSDNode *Node = dyn_cast<ConstantFPSDNode>(N)) {
if (TII->isInlineConstant(Node->getValueAPF().bitcastToAPInt()))
return 0;
if (Node->getValueType(0) == MVT::f32)
return FloatToBits(Node->getValueAPF().convertToFloat());
return -1;
}
return -1;
}
/// \brief Helper function for adjustWritemask
static unsigned SubIdx2Lane(unsigned Idx) {
switch (Idx) {

1
llvm/lib/Target/AMDGPU/SIISelLowering.h
View File

@ -141,7 +141,6 @@ public:
void AdjustInstrPostInstrSelection(MachineInstr &MI,
SDNode *Node) const override;
int32_t analyzeImmediate(const SDNode *N) const;
SDValue CreateLiveInRegister(SelectionDAG &DAG, const TargetRegisterClass *RC,
unsigned Reg, EVT VT) const override;
void legalizeTargetIndependentNode(SDNode *Node, SelectionDAG &DAG) const;