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[X86] Disable mul -> shl + lea combine when compiling for minsize 

Differential Revision: http://reviews.llvm.org/D11904

llvm-svn: 244740
This commit is contained in:
Michael Kuperstein 2015-08-12 11:27:26 +00:00
parent 94f2bb5535
commit fe0d9bb6eb
2 changed files with 22 additions and 0 deletions
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4
llvm/lib/Target/X86/X86ISelLowering.cpp
View File

@ -23436,6 +23436,10 @@ static SDValue PerformCMOVCombine(SDNode *N, SelectionDAG &DAG,
/// LEA + SHL, LEA + LEA.
static SDValue PerformMulCombine(SDNode *N, SelectionDAG &DAG,
TargetLowering::DAGCombinerInfo &DCI) {
// An imul is usually smaller than the alternative sequence.
if (DAG.getMachineFunction().getFunction()->optForMinSize())
return SDValue();
if (DCI.isBeforeLegalize() || DCI.isCalledByLegalizer())
return SDValue();

18
llvm/test/CodeGen/X86/imul.ll
View File

@ -108,3 +108,21 @@ define i64 @mul40_64(i64 %A) {
%mul = mul i64 %A, 40
ret i64 %mul
}
define i32 @mul4_32_minsize(i32 %A) minsize {
; X64-LABEL: mul4_32_minsize:
; X64: leal
; X86-LABEL: mul4_32_minsize:
; X86: shll
%mul = mul i32 %A, 4
ret i32 %mul
}
define i32 @mul40_32_minsize(i32 %A) minsize {
; X64-LABEL: mul40_32_minsize:
; X64: imull
; X86-LABEL: mul40_32_minsize:
; X86: imull
%mul = mul i32 %A, 40
ret i32 %mul
}