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make RenamePassWorkList a local var instead of an ivar. 

llvm-svn: 40802
This commit is contained in:
Chris Lattner 2007-08-04 01:04:40 +00:00
parent 81a9688e93
commit fd838f0770
1 changed files with 8 additions and 8 deletions
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16
llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp
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@ -121,9 +121,6 @@ namespace {
/// non-determinstic behavior. /// non-determinstic behavior.
DenseMap<BasicBlock*, unsigned> BBNumbers; DenseMap<BasicBlock*, unsigned> BBNumbers;
/// RenamePassWorkList - Worklist used by RenamePass()
std::vector<RenamePassData> RenamePassWorkList;
public: public:
PromoteMem2Reg(const std::vector<AllocaInst*> &A, PromoteMem2Reg(const std::vector<AllocaInst*> &A,
SmallVector<AllocaInst*, 16> &Retry, DominatorTree &dt, SmallVector<AllocaInst*, 16> &Retry, DominatorTree &dt,
@ -154,7 +151,8 @@ namespace {
const std::vector<AllocaInst*> &AIs); const std::vector<AllocaInst*> &AIs);
void RenamePass(BasicBlock *BB, BasicBlock *Pred, void RenamePass(BasicBlock *BB, BasicBlock *Pred,
std::vector<Value*> &IncVals); std::vector<Value*> &IncVals,
std::vector<RenamePassData> &Worklist);
bool QueuePhiNode(BasicBlock *BB, unsigned AllocaIdx, unsigned &Version, bool QueuePhiNode(BasicBlock *BB, unsigned AllocaIdx, unsigned &Version,
SmallPtrSet<PHINode*, 16> &InsertedPHINodes); SmallPtrSet<PHINode*, 16> &InsertedPHINodes);
}; };
@ -404,13 +402,14 @@ void PromoteMem2Reg::run() {
// Walks all basic blocks in the function performing the SSA rename algorithm // Walks all basic blocks in the function performing the SSA rename algorithm
// and inserting the phi nodes we marked as necessary // and inserting the phi nodes we marked as necessary
// //
RenamePassWorkList.clear();
std::vector<RenamePassData> RenamePassWorkList;
RenamePassWorkList.push_back(RenamePassData(F.begin(), 0, Values)); RenamePassWorkList.push_back(RenamePassData(F.begin(), 0, Values));
while(!RenamePassWorkList.empty()) { while(!RenamePassWorkList.empty()) {
RenamePassData RPD = RenamePassWorkList.back(); RenamePassData RPD = RenamePassWorkList.back();
RenamePassWorkList.pop_back(); RenamePassWorkList.pop_back();
// RenamePass may add new worklist entries. // RenamePass may add new worklist entries.
RenamePass(RPD.BB, RPD.Pred, RPD.Values); RenamePass(RPD.BB, RPD.Pred, RPD.Values, RenamePassWorkList);
} }
// The renamer uses the Visited set to avoid infinite loops. Clear it now. // The renamer uses the Visited set to avoid infinite loops. Clear it now.
@ -699,7 +698,8 @@ bool PromoteMem2Reg::QueuePhiNode(BasicBlock *BB, unsigned AllocaNo,
// value each Alloca contains on exit from the predecessor block Pred. // value each Alloca contains on exit from the predecessor block Pred.
// //
void PromoteMem2Reg::RenamePass(BasicBlock *BB, BasicBlock *Pred, void PromoteMem2Reg::RenamePass(BasicBlock *BB, BasicBlock *Pred,
std::vector<Value*> &IncomingVals) { std::vector<Value*> &IncomingVals,
std::vector<RenamePassData> &Worklist) {
// If we are inserting any phi nodes into this BB, they will already be in the // If we are inserting any phi nodes into this BB, they will already be in the
// block. // block.
if (PHINode *APN = dyn_cast<PHINode>(BB->begin())) { if (PHINode *APN = dyn_cast<PHINode>(BB->begin())) {
@ -793,7 +793,7 @@ void PromoteMem2Reg::RenamePass(BasicBlock *BB, BasicBlock *Pred,
// Recurse to our successors. // Recurse to our successors.
TerminatorInst *TI = BB->getTerminator(); TerminatorInst *TI = BB->getTerminator();
for (unsigned i = 0; i != TI->getNumSuccessors(); i++) for (unsigned i = 0; i != TI->getNumSuccessors(); i++)
RenamePassWorkList.push_back(RenamePassData(TI->getSuccessor(i), BB, IncomingVals)); Worklist.push_back(RenamePassData(TI->getSuccessor(i), BB, IncomingVals));
} }
/// PromoteMemToReg - Promote the specified list of alloca instructions into /// PromoteMemToReg - Promote the specified list of alloca instructions into