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[X86] Remove redundant regular expression from the Znver1 scheduler model. NFC 

llvm-svn: 323303
This commit is contained in:
Craig Topper 2018-01-24 05:14:33 +00:00
parent 501931b117
commit fd68c2d0ae
1 changed files with 0 additions and 1 deletions
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llvm/lib/Target/X86/X86ScheduleZnver1.td
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@ -1383,7 +1383,6 @@ def : InstRW<[ZnWriteCVTPD2DQLd], (instregex "(V?)CVT(T?)PD2DQrm")>;
def : InstRW<[ZnWriteCVTPD2DQr], (instregex "VCVT(T?)PD2DQYrr")>;
// x,m256.
def : InstRW<[ZnWriteCVTPD2DQLd], (instregex "VCVT(T?)PD2DQYrm")>;
def : InstRW<[ZnWriteCVTPD2DQLd], (instregex "VCVT(T?)PD2DQ(64)?rm")>;
def ZnWriteCVTPS2PIr: SchedWriteRes<[ZnFPU3]> {
let Latency = 4;