forked from OSchip/llvm-project
Turn on register scavenger for Mips 16
We use an unused Mips 32 register for the emergency slot instead of using the stack. llvm-svn: 170665
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@ -43,6 +43,32 @@ Mips16RegisterInfo::Mips16RegisterInfo(const MipsSubtarget &ST,
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const Mips16InstrInfo &I)
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: MipsRegisterInfo(ST), TII(I) {}
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bool Mips16RegisterInfo::requiresRegisterScavenging
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(const MachineFunction &MF) const {
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return true;
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}
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bool Mips16RegisterInfo::requiresFrameIndexScavenging
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(const MachineFunction &MF) const {
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return true;
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}
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bool Mips16RegisterInfo::useFPForScavengingIndex
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(const MachineFunction &MF) const {
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return false;
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}
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bool Mips16RegisterInfo::saveScavengerRegister
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(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I,
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MachineBasicBlock::iterator &UseMI,
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const TargetRegisterClass *RC,
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unsigned Reg) const {
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DebugLoc DL;
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TII.copyPhysReg(MBB, I, DL, Mips::T0, Reg, true);
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TII.copyPhysReg(MBB, UseMI, DL, Reg, Mips::T0, true);
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return true;
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}
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// This function eliminate ADJCALLSTACKDOWN,
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// ADJCALLSTACKUP pseudo instructions
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void Mips16RegisterInfo::
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@ -27,6 +27,19 @@ public:
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void eliminateCallFramePseudoInstr(MachineFunction &MF,
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MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I) const;
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bool requiresRegisterScavenging(const MachineFunction &MF) const;
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bool requiresFrameIndexScavenging(const MachineFunction &MF) const;
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bool useFPForScavengingIndex(const MachineFunction &MF) const;
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bool saveScavengerRegister(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I,
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MachineBasicBlock::iterator &UseMI,
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const TargetRegisterClass *RC,
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unsigned Reg) const;
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private:
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virtual void eliminateFI(MachineBasicBlock::iterator II, unsigned OpNo,
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int FrameIndex, uint64_t StackSize,
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