forked from OSchip/llvm-project
parent
071c9637c3
commit
fd41d94486
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@ -165,6 +165,7 @@ SparcV8TargetLowering::SparcV8TargetLowering(TargetMachine &TM)
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const char *SparcV8TargetLowering::getTargetNodeName(unsigned Opcode) const {
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switch (Opcode) {
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default: return 0;
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case V8ISD::CMPICC: return "V8ISD::CMPICC";
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case V8ISD::CMPFCC: return "V8ISD::CMPFCC";
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case V8ISD::BRICC: return "V8ISD::BRICC";
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@ -661,7 +662,7 @@ LowerOperation(SDOperand Op, SelectionDAG &DAG) {
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std::vector<SDOperand> Ops;
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Ops.push_back(LHS);
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Ops.push_back(RHS);
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SDOperand Cond = DAG.getNode(V8ISD::CMPICC, VTs, Ops);
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SDOperand Cond = DAG.getNode(V8ISD::CMPICC, VTs, Ops).getValue(1);
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return DAG.getNode(V8ISD::BRICC, MVT::Other, Chain, Dest, CC, Cond);
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} else {
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std::vector<MVT::ValueType> VTs;
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@ -670,7 +671,7 @@ LowerOperation(SDOperand Op, SelectionDAG &DAG) {
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std::vector<SDOperand> Ops;
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Ops.push_back(LHS);
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Ops.push_back(RHS);
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SDOperand Cond = DAG.getNode(V8ISD::CMPFCC, VTs, Ops);
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SDOperand Cond = DAG.getNode(V8ISD::CMPFCC, VTs, Ops).getValue(1);
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return DAG.getNode(V8ISD::BRFCC, MVT::Other, Chain, Dest, CC, Cond);
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}
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}
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