From fd31bf95c1479e26d77c9000c238ffa36929747f Mon Sep 17 00:00:00 2001
From: Amara Emerson <aemerson@apple.com>
Date: Mon, 28 Jan 2019 03:21:14 +0000
Subject: [PATCH] [AArch64][GlobalISel] Teach RBS about G_FNEG default mapping.

llvm-svn: 352340
---
 .../lib/Target/AArch64/AArch64RegisterBankInfo.cpp |  1 +
 .../AArch64/GlobalISel/regbankselect-default.mir   | 14 ++++++++++++++
 2 files changed, 15 insertions(+)

diff --git a/llvm/lib/Target/AArch64/AArch64RegisterBankInfo.cpp b/llvm/lib/Target/AArch64/AArch64RegisterBankInfo.cpp
index dad4a3c9a717..d68de4ac587e 100644
--- a/llvm/lib/Target/AArch64/AArch64RegisterBankInfo.cpp
+++ b/llvm/lib/Target/AArch64/AArch64RegisterBankInfo.cpp
@@ -392,6 +392,7 @@ static bool isPreISelGenericFloatingPointOpcode(unsigned Opc) {
   case TargetOpcode::G_FPEXT:
   case TargetOpcode::G_FPTRUNC:
   case TargetOpcode::G_FCEIL:
+  case TargetOpcode::G_FNEG:
     return true;
   }
   return false;
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/regbankselect-default.mir b/llvm/test/CodeGen/AArch64/GlobalISel/regbankselect-default.mir
index 6545dfd71158..08fc1998619f 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/regbankselect-default.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/regbankselect-default.mir
@@ -59,6 +59,7 @@
   define void @test_fptrunc_s32_s64() { ret void }
 
   define void @test_fconstant_s32() { ret void }
+  define void @test_fneg_s32() { ret void }
 
   define void @test_fcmp_s32() { ret void }
 
@@ -678,6 +679,19 @@ body: |
     %0(s32) = G_FCONSTANT float 1.0
 ...
 
+---
+name:            test_fneg_s32
+legalized:       true
+body: |
+  bb.0:
+  liveins: $s0
+    ; CHECK-LABEL: name: test_fneg_s32
+    ; CHECK: [[COPY:%[0-9]+]]:fpr(s32) = COPY $s0
+    ; CHECK: [[FNEG:%[0-9]+]]:fpr(s32) = G_FNEG [[COPY]]
+    %0:_(s32) = COPY $s0
+    %1:_(s32) = G_FNEG %0(s32)
+...
+
 ---
 name:            test_fcmp_s32
 legalized:       true