forked from OSchip/llvm-project
[TSAN] Honor failure memory orders in AtomicCAS
LLVM has lifted strong requirements for CAS failure memory orders in431e3138aand819e0d105e. Add support for honoring them in `AtomicCAS`. https://github.com/google/sanitizers/issues/970 Differential Revision: https://reviews.llvm.org/D99434
This commit is contained in:
Bruno Cardoso Lopes
parent
b2186a69c1
commit
fd184c062c
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@ -402,34 +402,45 @@ static T NoTsanAtomicCAS(volatile T *a, T c, T v, morder mo, morder fmo) {
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template<typename T>
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static bool AtomicCAS(ThreadState *thr, uptr pc,
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volatile T *a, T *c, T v, morder mo, morder fmo) {
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(void)fmo; // Unused because llvm does not pass it yet.
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// 31.7.2.18: "The failure argument shall not be memory_order_release
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// nor memory_order_acq_rel". LLVM (2021-05) fallbacks to Monotonic
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// (mo_relaxed) when those are used.
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CHECK(IsLoadOrder(fmo));
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MemoryWriteAtomic(thr, pc, (uptr)a, SizeLog<T>());
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SyncVar *s = 0;
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bool write_lock = mo != mo_acquire && mo != mo_consume;
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if (mo != mo_relaxed) {
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bool write_lock = IsReleaseOrder(mo);
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if (mo != mo_relaxed || fmo != mo_relaxed)
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s = ctx->metamap.GetOrCreateAndLock(thr, pc, (uptr)a, write_lock);
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T cc = *c;
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T pr = func_cas(a, cc, v);
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bool success = pr == cc;
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if (!success) {
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*c = pr;
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mo = fmo;
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}
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if (s) {
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thr->fast_state.IncrementEpoch();
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// Can't increment epoch w/o writing to the trace as well.
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TraceAddEvent(thr, thr->fast_state, EventTypeMop, 0);
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if (IsAcqRelOrder(mo))
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if (success && IsAcqRelOrder(mo))
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AcquireReleaseImpl(thr, pc, &s->clock);
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else if (IsReleaseOrder(mo))
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else if (success && IsReleaseOrder(mo))
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ReleaseImpl(thr, pc, &s->clock);
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else if (IsAcquireOrder(mo))
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AcquireImpl(thr, pc, &s->clock);
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}
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T cc = *c;
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T pr = func_cas(a, cc, v);
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if (s) {
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if (write_lock)
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s->mtx.Unlock();
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else
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s->mtx.ReadUnlock();
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}
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if (pr == cc)
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return true;
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*c = pr;
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return false;
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return success;
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}
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template<typename T>
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@ -0,0 +1,106 @@
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// RUN: %clangxx_tsan -O1 %s %link_libcxx_tsan -o %t && %deflake %env_tsan_opts=atexit_sleep_ms=50 %run %t 2>&1 | FileCheck --check-prefix=CHECK-REPORT %s
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#include <atomic>
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#include <cassert>
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#include <stdio.h>
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#include <thread>
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#define NUM_ORDS 16
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#define NUM_THREADS NUM_ORDS * 2
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struct node {
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int val;
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};
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std::atomic<node *> _nodes[NUM_THREADS] = {};
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void f1(int i) {
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auto n = new node();
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n->val = 42;
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_nodes[i].store(n, std::memory_order_release);
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}
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template <int version>
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void f2(int i, std::memory_order mo, std::memory_order fmo) {
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node *expected = nullptr;
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while (expected == nullptr) {
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_nodes[i].compare_exchange_weak(expected, nullptr, mo, fmo);
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};
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++expected->val;
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assert(expected->val == 43);
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}
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struct MemOrdSuccFail {
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std::memory_order mo;
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std::memory_order fmo;
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};
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MemOrdSuccFail OrdList[NUM_ORDS] = {
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{std::memory_order_release, std::memory_order_relaxed},
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{std::memory_order_release, std::memory_order_acquire},
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{std::memory_order_release, std::memory_order_consume},
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{std::memory_order_release, std::memory_order_seq_cst},
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{std::memory_order_acq_rel, std::memory_order_relaxed},
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{std::memory_order_acq_rel, std::memory_order_acquire},
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{std::memory_order_acq_rel, std::memory_order_consume},
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{std::memory_order_acq_rel, std::memory_order_seq_cst},
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{std::memory_order_seq_cst, std::memory_order_relaxed},
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{std::memory_order_seq_cst, std::memory_order_acquire},
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{std::memory_order_seq_cst, std::memory_order_consume},
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{std::memory_order_seq_cst, std::memory_order_seq_cst},
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{std::memory_order_relaxed, std::memory_order_relaxed},
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{std::memory_order_relaxed, std::memory_order_acquire},
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{std::memory_order_relaxed, std::memory_order_consume},
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{std::memory_order_relaxed, std::memory_order_seq_cst},
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};
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int main() {
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std::thread threads[NUM_THREADS];
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int ords = 0;
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// Instantiate a new f2 for each MO so we can dedup reports and actually
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// make sure relaxed FMO triggers a warning for every different MO.
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for (unsigned t = 0; t < 8; t += 2) {
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threads[t] = std::thread(f1, t);
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threads[t + 1] = std::thread(f2<0>, t, OrdList[ords].mo, OrdList[ords].fmo);
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threads[t].join();
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threads[t + 1].join();
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ords++;
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}
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for (unsigned t = 8; t < 16; t += 2) {
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threads[t] = std::thread(f1, t);
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threads[t + 1] = std::thread(f2<1>, t, OrdList[ords].mo, OrdList[ords].fmo);
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threads[t].join();
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threads[t + 1].join();
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ords++;
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}
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for (unsigned t = 16; t < 24; t += 2) {
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threads[t] = std::thread(f1, t);
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threads[t + 1] = std::thread(f2<2>, t, OrdList[ords].mo, OrdList[ords].fmo);
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threads[t].join();
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threads[t + 1].join();
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ords++;
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}
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for (unsigned t = 24; t < 32; t += 2) {
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threads[t] = std::thread(f1, t);
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threads[t + 1] = std::thread(f2<3>, t, OrdList[ords].mo, OrdList[ords].fmo);
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threads[t].join();
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threads[t + 1].join();
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ords++;
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}
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fprintf(stderr, "DONE\n");
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return 0;
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}
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// CHECK-REPORT: WARNING: ThreadSanitizer: data race
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// CHECK-REPORT: WARNING: ThreadSanitizer: data race
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// CHECK-REPORT: WARNING: ThreadSanitizer: data race
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// CHECK-REPORT: WARNING: ThreadSanitizer: data race
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// CHECK-REPORT: DONE
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// CHECK-REPORT: ThreadSanitizer: reported 4 warnings
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@ -349,41 +349,61 @@ entry:
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define void @atomic8_cas_monotonic(i8* %a) nounwind uwtable {
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entry:
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cmpxchg i8* %a, i8 0, i8 1 monotonic monotonic, !dbg !7
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cmpxchg i8* %a, i8 0, i8 1 monotonic acquire, !dbg !7
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cmpxchg i8* %a, i8 0, i8 1 monotonic seq_cst, !dbg !7
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ret void, !dbg !7
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}
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; CHECK-LABEL: atomic8_cas_monotonic
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; CHECK: call i8 @__tsan_atomic8_compare_exchange_val(i8* %a, i8 0, i8 1, i32 0, i32 0), !dbg
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; CHECK: call i8 @__tsan_atomic8_compare_exchange_val(i8* %a, i8 0, i8 1, i32 0, i32 2), !dbg
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; CHECK: call i8 @__tsan_atomic8_compare_exchange_val(i8* %a, i8 0, i8 1, i32 0, i32 5), !dbg
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define void @atomic8_cas_acquire(i8* %a) nounwind uwtable {
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entry:
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cmpxchg i8* %a, i8 0, i8 1 acquire monotonic, !dbg !7
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cmpxchg i8* %a, i8 0, i8 1 acquire acquire, !dbg !7
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cmpxchg i8* %a, i8 0, i8 1 acquire seq_cst, !dbg !7
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ret void, !dbg !7
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}
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; CHECK-LABEL: atomic8_cas_acquire
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; CHECK: call i8 @__tsan_atomic8_compare_exchange_val(i8* %a, i8 0, i8 1, i32 2, i32 0), !dbg
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; CHECK: call i8 @__tsan_atomic8_compare_exchange_val(i8* %a, i8 0, i8 1, i32 2, i32 2), !dbg
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; CHECK: call i8 @__tsan_atomic8_compare_exchange_val(i8* %a, i8 0, i8 1, i32 2, i32 5), !dbg
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define void @atomic8_cas_release(i8* %a) nounwind uwtable {
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entry:
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cmpxchg i8* %a, i8 0, i8 1 release monotonic, !dbg !7
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cmpxchg i8* %a, i8 0, i8 1 release acquire, !dbg !7
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cmpxchg i8* %a, i8 0, i8 1 release seq_cst, !dbg !7
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ret void, !dbg !7
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}
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; CHECK-LABEL: atomic8_cas_release
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; CHECK: call i8 @__tsan_atomic8_compare_exchange_val(i8* %a, i8 0, i8 1, i32 3, i32 0), !dbg
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; CHECK: call i8 @__tsan_atomic8_compare_exchange_val(i8* %a, i8 0, i8 1, i32 3, i32 2), !dbg
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; CHECK: call i8 @__tsan_atomic8_compare_exchange_val(i8* %a, i8 0, i8 1, i32 3, i32 5), !dbg
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define void @atomic8_cas_acq_rel(i8* %a) nounwind uwtable {
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entry:
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cmpxchg i8* %a, i8 0, i8 1 acq_rel monotonic, !dbg !7
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cmpxchg i8* %a, i8 0, i8 1 acq_rel acquire, !dbg !7
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cmpxchg i8* %a, i8 0, i8 1 acq_rel seq_cst, !dbg !7
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ret void, !dbg !7
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}
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; CHECK-LABEL: atomic8_cas_acq_rel
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; CHECK: call i8 @__tsan_atomic8_compare_exchange_val(i8* %a, i8 0, i8 1, i32 4, i32 0), !dbg
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; CHECK: call i8 @__tsan_atomic8_compare_exchange_val(i8* %a, i8 0, i8 1, i32 4, i32 2), !dbg
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; CHECK: call i8 @__tsan_atomic8_compare_exchange_val(i8* %a, i8 0, i8 1, i32 4, i32 5), !dbg
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define void @atomic8_cas_seq_cst(i8* %a) nounwind uwtable {
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entry:
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cmpxchg i8* %a, i8 0, i8 1 seq_cst monotonic, !dbg !7
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cmpxchg i8* %a, i8 0, i8 1 seq_cst acquire, !dbg !7
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cmpxchg i8* %a, i8 0, i8 1 seq_cst seq_cst, !dbg !7
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ret void, !dbg !7
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}
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; CHECK-LABEL: atomic8_cas_seq_cst
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; CHECK: call i8 @__tsan_atomic8_compare_exchange_val(i8* %a, i8 0, i8 1, i32 5, i32 0), !dbg
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; CHECK: call i8 @__tsan_atomic8_compare_exchange_val(i8* %a, i8 0, i8 1, i32 5, i32 2), !dbg
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; CHECK: call i8 @__tsan_atomic8_compare_exchange_val(i8* %a, i8 0, i8 1, i32 5, i32 5), !dbg
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define i16 @atomic16_load_unordered(i16* %a) nounwind uwtable {
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@ -733,41 +753,61 @@ entry:
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define void @atomic16_cas_monotonic(i16* %a) nounwind uwtable {
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entry:
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cmpxchg i16* %a, i16 0, i16 1 monotonic monotonic, !dbg !7
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cmpxchg i16* %a, i16 0, i16 1 monotonic acquire, !dbg !7
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cmpxchg i16* %a, i16 0, i16 1 monotonic seq_cst, !dbg !7
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ret void, !dbg !7
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}
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; CHECK-LABEL: atomic16_cas_monotonic
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; CHECK: call i16 @__tsan_atomic16_compare_exchange_val(i16* %a, i16 0, i16 1, i32 0, i32 0), !dbg
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; CHECK: call i16 @__tsan_atomic16_compare_exchange_val(i16* %a, i16 0, i16 1, i32 0, i32 2), !dbg
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; CHECK: call i16 @__tsan_atomic16_compare_exchange_val(i16* %a, i16 0, i16 1, i32 0, i32 5), !dbg
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define void @atomic16_cas_acquire(i16* %a) nounwind uwtable {
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entry:
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cmpxchg i16* %a, i16 0, i16 1 acquire monotonic, !dbg !7
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cmpxchg i16* %a, i16 0, i16 1 acquire acquire, !dbg !7
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cmpxchg i16* %a, i16 0, i16 1 acquire seq_cst, !dbg !7
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ret void, !dbg !7
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}
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; CHECK-LABEL: atomic16_cas_acquire
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; CHECK: call i16 @__tsan_atomic16_compare_exchange_val(i16* %a, i16 0, i16 1, i32 2, i32 0), !dbg
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; CHECK: call i16 @__tsan_atomic16_compare_exchange_val(i16* %a, i16 0, i16 1, i32 2, i32 2), !dbg
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; CHECK: call i16 @__tsan_atomic16_compare_exchange_val(i16* %a, i16 0, i16 1, i32 2, i32 5), !dbg
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define void @atomic16_cas_release(i16* %a) nounwind uwtable {
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entry:
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cmpxchg i16* %a, i16 0, i16 1 release monotonic, !dbg !7
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cmpxchg i16* %a, i16 0, i16 1 release acquire, !dbg !7
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cmpxchg i16* %a, i16 0, i16 1 release seq_cst, !dbg !7
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ret void, !dbg !7
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}
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; CHECK-LABEL: atomic16_cas_release
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; CHECK: call i16 @__tsan_atomic16_compare_exchange_val(i16* %a, i16 0, i16 1, i32 3, i32 0), !dbg
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; CHECK: call i16 @__tsan_atomic16_compare_exchange_val(i16* %a, i16 0, i16 1, i32 3, i32 2), !dbg
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; CHECK: call i16 @__tsan_atomic16_compare_exchange_val(i16* %a, i16 0, i16 1, i32 3, i32 5), !dbg
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define void @atomic16_cas_acq_rel(i16* %a) nounwind uwtable {
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entry:
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cmpxchg i16* %a, i16 0, i16 1 acq_rel monotonic, !dbg !7
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cmpxchg i16* %a, i16 0, i16 1 acq_rel acquire, !dbg !7
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cmpxchg i16* %a, i16 0, i16 1 acq_rel seq_cst, !dbg !7
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ret void, !dbg !7
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}
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; CHECK-LABEL: atomic16_cas_acq_rel
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; CHECK: call i16 @__tsan_atomic16_compare_exchange_val(i16* %a, i16 0, i16 1, i32 4, i32 0), !dbg
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; CHECK: call i16 @__tsan_atomic16_compare_exchange_val(i16* %a, i16 0, i16 1, i32 4, i32 2), !dbg
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; CHECK: call i16 @__tsan_atomic16_compare_exchange_val(i16* %a, i16 0, i16 1, i32 4, i32 5), !dbg
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define void @atomic16_cas_seq_cst(i16* %a) nounwind uwtable {
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entry:
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cmpxchg i16* %a, i16 0, i16 1 seq_cst monotonic, !dbg !7
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cmpxchg i16* %a, i16 0, i16 1 seq_cst acquire, !dbg !7
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cmpxchg i16* %a, i16 0, i16 1 seq_cst seq_cst, !dbg !7
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ret void, !dbg !7
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}
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; CHECK-LABEL: atomic16_cas_seq_cst
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; CHECK: call i16 @__tsan_atomic16_compare_exchange_val(i16* %a, i16 0, i16 1, i32 5, i32 0), !dbg
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; CHECK: call i16 @__tsan_atomic16_compare_exchange_val(i16* %a, i16 0, i16 1, i32 5, i32 2), !dbg
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; CHECK: call i16 @__tsan_atomic16_compare_exchange_val(i16* %a, i16 0, i16 1, i32 5, i32 5), !dbg
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define i32 @atomic32_load_unordered(i32* %a) nounwind uwtable {
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@ -1117,41 +1157,61 @@ entry:
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define void @atomic32_cas_monotonic(i32* %a) nounwind uwtable {
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entry:
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cmpxchg i32* %a, i32 0, i32 1 monotonic monotonic, !dbg !7
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cmpxchg i32* %a, i32 0, i32 1 monotonic acquire, !dbg !7
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cmpxchg i32* %a, i32 0, i32 1 monotonic seq_cst, !dbg !7
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ret void, !dbg !7
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}
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; CHECK-LABEL: atomic32_cas_monotonic
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; CHECK: call i32 @__tsan_atomic32_compare_exchange_val(i32* %a, i32 0, i32 1, i32 0, i32 0), !dbg
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; CHECK: call i32 @__tsan_atomic32_compare_exchange_val(i32* %a, i32 0, i32 1, i32 0, i32 2), !dbg
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; CHECK: call i32 @__tsan_atomic32_compare_exchange_val(i32* %a, i32 0, i32 1, i32 0, i32 5), !dbg
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define void @atomic32_cas_acquire(i32* %a) nounwind uwtable {
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entry:
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cmpxchg i32* %a, i32 0, i32 1 acquire monotonic, !dbg !7
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cmpxchg i32* %a, i32 0, i32 1 acquire acquire, !dbg !7
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cmpxchg i32* %a, i32 0, i32 1 acquire seq_cst, !dbg !7
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ret void, !dbg !7
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}
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; CHECK-LABEL: atomic32_cas_acquire
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; CHECK: call i32 @__tsan_atomic32_compare_exchange_val(i32* %a, i32 0, i32 1, i32 2, i32 0), !dbg
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; CHECK: call i32 @__tsan_atomic32_compare_exchange_val(i32* %a, i32 0, i32 1, i32 2, i32 2), !dbg
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; CHECK: call i32 @__tsan_atomic32_compare_exchange_val(i32* %a, i32 0, i32 1, i32 2, i32 5), !dbg
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define void @atomic32_cas_release(i32* %a) nounwind uwtable {
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entry:
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cmpxchg i32* %a, i32 0, i32 1 release monotonic, !dbg !7
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cmpxchg i32* %a, i32 0, i32 1 release acquire, !dbg !7
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cmpxchg i32* %a, i32 0, i32 1 release seq_cst, !dbg !7
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ret void, !dbg !7
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}
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; CHECK-LABEL: atomic32_cas_release
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; CHECK: call i32 @__tsan_atomic32_compare_exchange_val(i32* %a, i32 0, i32 1, i32 3, i32 0), !dbg
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; CHECK: call i32 @__tsan_atomic32_compare_exchange_val(i32* %a, i32 0, i32 1, i32 3, i32 2), !dbg
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; CHECK: call i32 @__tsan_atomic32_compare_exchange_val(i32* %a, i32 0, i32 1, i32 3, i32 5), !dbg
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define void @atomic32_cas_acq_rel(i32* %a) nounwind uwtable {
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entry:
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cmpxchg i32* %a, i32 0, i32 1 acq_rel monotonic, !dbg !7
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||||
cmpxchg i32* %a, i32 0, i32 1 acq_rel acquire, !dbg !7
|
||||
cmpxchg i32* %a, i32 0, i32 1 acq_rel seq_cst, !dbg !7
|
||||
ret void, !dbg !7
|
||||
}
|
||||
; CHECK-LABEL: atomic32_cas_acq_rel
|
||||
; CHECK: call i32 @__tsan_atomic32_compare_exchange_val(i32* %a, i32 0, i32 1, i32 4, i32 0), !dbg
|
||||
; CHECK: call i32 @__tsan_atomic32_compare_exchange_val(i32* %a, i32 0, i32 1, i32 4, i32 2), !dbg
|
||||
; CHECK: call i32 @__tsan_atomic32_compare_exchange_val(i32* %a, i32 0, i32 1, i32 4, i32 5), !dbg
|
||||
|
||||
define void @atomic32_cas_seq_cst(i32* %a) nounwind uwtable {
|
||||
entry:
|
||||
cmpxchg i32* %a, i32 0, i32 1 seq_cst monotonic, !dbg !7
|
||||
cmpxchg i32* %a, i32 0, i32 1 seq_cst acquire, !dbg !7
|
||||
cmpxchg i32* %a, i32 0, i32 1 seq_cst seq_cst, !dbg !7
|
||||
ret void, !dbg !7
|
||||
}
|
||||
; CHECK-LABEL: atomic32_cas_seq_cst
|
||||
; CHECK: call i32 @__tsan_atomic32_compare_exchange_val(i32* %a, i32 0, i32 1, i32 5, i32 0), !dbg
|
||||
; CHECK: call i32 @__tsan_atomic32_compare_exchange_val(i32* %a, i32 0, i32 1, i32 5, i32 2), !dbg
|
||||
; CHECK: call i32 @__tsan_atomic32_compare_exchange_val(i32* %a, i32 0, i32 1, i32 5, i32 5), !dbg
|
||||
|
||||
define i64 @atomic64_load_unordered(i64* %a) nounwind uwtable {
|
||||
|
|
@ -1521,41 +1581,61 @@ entry:
|
|||
define void @atomic64_cas_monotonic(i64* %a) nounwind uwtable {
|
||||
entry:
|
||||
cmpxchg i64* %a, i64 0, i64 1 monotonic monotonic, !dbg !7
|
||||
cmpxchg i64* %a, i64 0, i64 1 monotonic acquire, !dbg !7
|
||||
cmpxchg i64* %a, i64 0, i64 1 monotonic seq_cst, !dbg !7
|
||||
ret void, !dbg !7
|
||||
}
|
||||
; CHECK-LABEL: atomic64_cas_monotonic
|
||||
; CHECK: call i64 @__tsan_atomic64_compare_exchange_val(i64* %a, i64 0, i64 1, i32 0, i32 0), !dbg
|
||||
; CHECK: call i64 @__tsan_atomic64_compare_exchange_val(i64* %a, i64 0, i64 1, i32 0, i32 2), !dbg
|
||||
; CHECK: call i64 @__tsan_atomic64_compare_exchange_val(i64* %a, i64 0, i64 1, i32 0, i32 5), !dbg
|
||||
|
||||
define void @atomic64_cas_acquire(i64* %a) nounwind uwtable {
|
||||
entry:
|
||||
cmpxchg i64* %a, i64 0, i64 1 acquire monotonic, !dbg !7
|
||||
cmpxchg i64* %a, i64 0, i64 1 acquire acquire, !dbg !7
|
||||
cmpxchg i64* %a, i64 0, i64 1 acquire seq_cst, !dbg !7
|
||||
ret void, !dbg !7
|
||||
}
|
||||
; CHECK-LABEL: atomic64_cas_acquire
|
||||
; CHECK: call i64 @__tsan_atomic64_compare_exchange_val(i64* %a, i64 0, i64 1, i32 2, i32 0), !dbg
|
||||
; CHECK: call i64 @__tsan_atomic64_compare_exchange_val(i64* %a, i64 0, i64 1, i32 2, i32 2), !dbg
|
||||
; CHECK: call i64 @__tsan_atomic64_compare_exchange_val(i64* %a, i64 0, i64 1, i32 2, i32 5), !dbg
|
||||
|
||||
define void @atomic64_cas_release(i64* %a) nounwind uwtable {
|
||||
entry:
|
||||
cmpxchg i64* %a, i64 0, i64 1 release monotonic, !dbg !7
|
||||
cmpxchg i64* %a, i64 0, i64 1 release acquire, !dbg !7
|
||||
cmpxchg i64* %a, i64 0, i64 1 release seq_cst, !dbg !7
|
||||
ret void, !dbg !7
|
||||
}
|
||||
; CHECK-LABEL: atomic64_cas_release
|
||||
; CHECK: call i64 @__tsan_atomic64_compare_exchange_val(i64* %a, i64 0, i64 1, i32 3, i32 0), !dbg
|
||||
; CHECK: call i64 @__tsan_atomic64_compare_exchange_val(i64* %a, i64 0, i64 1, i32 3, i32 2), !dbg
|
||||
; CHECK: call i64 @__tsan_atomic64_compare_exchange_val(i64* %a, i64 0, i64 1, i32 3, i32 5), !dbg
|
||||
|
||||
define void @atomic64_cas_acq_rel(i64* %a) nounwind uwtable {
|
||||
entry:
|
||||
cmpxchg i64* %a, i64 0, i64 1 acq_rel monotonic, !dbg !7
|
||||
cmpxchg i64* %a, i64 0, i64 1 acq_rel acquire, !dbg !7
|
||||
cmpxchg i64* %a, i64 0, i64 1 acq_rel seq_cst, !dbg !7
|
||||
ret void, !dbg !7
|
||||
}
|
||||
; CHECK-LABEL: atomic64_cas_acq_rel
|
||||
; CHECK: call i64 @__tsan_atomic64_compare_exchange_val(i64* %a, i64 0, i64 1, i32 4, i32 0), !dbg
|
||||
; CHECK: call i64 @__tsan_atomic64_compare_exchange_val(i64* %a, i64 0, i64 1, i32 4, i32 2), !dbg
|
||||
; CHECK: call i64 @__tsan_atomic64_compare_exchange_val(i64* %a, i64 0, i64 1, i32 4, i32 5), !dbg
|
||||
|
||||
define void @atomic64_cas_seq_cst(i64* %a) nounwind uwtable {
|
||||
entry:
|
||||
cmpxchg i64* %a, i64 0, i64 1 seq_cst monotonic, !dbg !7
|
||||
cmpxchg i64* %a, i64 0, i64 1 seq_cst acquire, !dbg !7
|
||||
cmpxchg i64* %a, i64 0, i64 1 seq_cst seq_cst, !dbg !7
|
||||
ret void, !dbg !7
|
||||
}
|
||||
; CHECK-LABEL: atomic64_cas_seq_cst
|
||||
; CHECK: call i64 @__tsan_atomic64_compare_exchange_val(i64* %a, i64 0, i64 1, i32 5, i32 0), !dbg
|
||||
; CHECK: call i64 @__tsan_atomic64_compare_exchange_val(i64* %a, i64 0, i64 1, i32 5, i32 2), !dbg
|
||||
; CHECK: call i64 @__tsan_atomic64_compare_exchange_val(i64* %a, i64 0, i64 1, i32 5, i32 5), !dbg
|
||||
|
||||
define void @atomic64_cas_seq_cst_ptr_ty(i8** %a, i8* %v1, i8* %v2) nounwind uwtable {
|
||||
|
|
|
|||
Loading…
Reference in New Issue