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[RISCV] Give an explicit error if 'generic' CPU is passed instead of 'generic-rv32' or 'generic-rv64'. Validate 64Bit feature against the triple. 

I encountered a project that uses llvm that passes "generic" by
default. While I could fix that project, I wouldn't be surprised
if other projects did something similar. So it seems like
a good idea to provide a better error here.

I've also added validation of the 64Bit feature against the
triple so that we can catch a mismatched CPU before failing in
a mysterious way. We can make it pretty far in isel because we
calculate XLenVT from the triple and use that to set up the legal
integer type.

Reviewed By: luismarques, khchen

Differential Revision: https://reviews.llvm.org/D98307
This commit is contained in:
Craig Topper 2021-03-14 17:17:50 -07:00
parent 12dac66f6b
commit fcdf7f6224
3 changed files with 24 additions and 13 deletions
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4
llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
View File

@ -88,6 +88,10 @@ MCRegister getSCSPReg() { return RISCV::X18; }
namespace RISCVFeatures {
void validate(const Triple &TT, const FeatureBitset &FeatureBits) {
if (TT.isArch64Bit() && !FeatureBits[RISCV::Feature64Bit])
report_fatal_error("RV64 target requires an RV64 CPU");
if (!TT.isArch64Bit() && FeatureBits[RISCV::Feature64Bit])
report_fatal_error("RV32 target requires an RV32 CPU");
if (TT.isArch64Bit() && FeatureBits[RISCV::FeatureRV32E])
report_fatal_error("RV32E can't be enabled for an RV64 target");
}

10
llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp
View File

@ -64,10 +64,12 @@ static MCAsmInfo *createRISCVMCAsmInfo(const MCRegisterInfo &MRI,
static MCSubtargetInfo *createRISCVMCSubtargetInfo(const Triple &TT,
StringRef CPU, StringRef FS) {
std::string CPUName = std::string(CPU);
if (CPUName.empty())
CPUName = TT.isArch64Bit() ? "generic-rv64" : "generic-rv32";
return createRISCVMCSubtargetInfoImpl(TT, CPUName, /*TuneCPU*/ CPUName, FS);
if (CPU.empty())
CPU = TT.isArch64Bit() ? "generic-rv64" : "generic-rv32";
if (CPU == "generic")
report_fatal_error(Twine("CPU 'generic' is not supported. Use ") +
(TT.isArch64Bit() ? "generic-rv64" : "generic-rv32"));
return createRISCVMCSubtargetInfoImpl(TT, CPU, /*TuneCPU*/ CPU, FS);
}
static MCInstPrinter *createRISCVMCInstPrinter(const Triple &T,

23
llvm/lib/Target/RISCV/RISCVSubtarget.cpp
View File

@ -47,17 +47,22 @@ static cl::opt<unsigned> RVVVectorLMULMax(
void RISCVSubtarget::anchor() {}
RISCVSubtarget &RISCVSubtarget::initializeSubtargetDependencies(
const Triple &TT, StringRef CPU, StringRef TuneCPU, StringRef FS, StringRef ABIName) {
RISCVSubtarget &
RISCVSubtarget::initializeSubtargetDependencies(const Triple &TT, StringRef CPU,
StringRef TuneCPU, StringRef FS,
StringRef ABIName) {
// Determine default and user-specified characteristics
bool Is64Bit = TT.isArch64Bit();
std::string CPUName = std::string(CPU);
std::string TuneCPUName = std::string(TuneCPU);
if (CPUName.empty())
CPUName = Is64Bit ? "generic-rv64" : "generic-rv32";
if (TuneCPUName.empty())
TuneCPUName = CPUName;
ParseSubtargetFeatures(CPUName, TuneCPUName, FS);
if (CPU.empty())
CPU = Is64Bit ? "generic-rv64" : "generic-rv32";
if (CPU == "generic")
report_fatal_error(Twine("CPU 'generic' is not supported. Use ") +
(Is64Bit ? "generic-rv64" : "generic-rv32"));
if (TuneCPU.empty())
TuneCPU = CPU;
ParseSubtargetFeatures(CPU, TuneCPU, FS);
if (Is64Bit) {
XLenVT = MVT::i64;
XLen = 64;