From fcdc2ff6e069b31fcb429ff61c77c52864fe476a Mon Sep 17 00:00:00 2001 From: Ruchira Sasanka Date: Mon, 12 Nov 2001 14:45:33 +0000 Subject: [PATCH] Added phi elimination code llvm-svn: 1265 --- llvm/lib/Target/Sparc/SparcInstrSelection.cpp | 8 +-- llvm/lib/Target/Sparc/SparcInternals.h | 11 ++++- llvm/lib/Target/Sparc/SparcRegInfo.cpp | 49 +++++++++++++++---- 3 files changed, 55 insertions(+), 13 deletions(-) diff --git a/llvm/lib/Target/Sparc/SparcInstrSelection.cpp b/llvm/lib/Target/Sparc/SparcInstrSelection.cpp index 266d42435af7..533d74c15f91 100644 --- a/llvm/lib/Target/Sparc/SparcInstrSelection.cpp +++ b/llvm/lib/Target/Sparc/SparcInstrSelection.cpp @@ -943,11 +943,12 @@ ForwardOperand(InstructionNode* treeNode, } -void + +void UltraSparcInstrInfo:: CreateCopyInstructionsByType(const TargetMachine& target, Value* src, Instruction* dest, - vector& minstrVec) + vector& minstrVec) const { bool loadConstantToReg = false; @@ -1004,6 +1005,7 @@ CreateCopyInstructionsByType(const TargetMachine& target, } + //******************* Externally Visible Functions *************************/ @@ -2048,7 +2050,7 @@ GetInstructionsByRule(InstructionNode* subtreeRoot, else { vector minstrVec; - CreateCopyInstructionsByType(target, + target.getInstrInfo().CreateCopyInstructionsByType(target, subtreeRoot->getInstruction()->getOperand(forwardOperandNum), subtreeRoot->getInstruction(), minstrVec); assert(minstrVec.size() > 0); diff --git a/llvm/lib/Target/Sparc/SparcInternals.h b/llvm/lib/Target/Sparc/SparcInternals.h index 0e48b96a3d13..9b8fe177ef27 100644 --- a/llvm/lib/Target/Sparc/SparcInternals.h +++ b/llvm/lib/Target/Sparc/SparcInternals.h @@ -139,6 +139,15 @@ public: vector& minstrVec, vector& tempVec, TargetMachine& target) const; + + // create copy instruction(s) + virtual void + CreateCopyInstructionsByType(const TargetMachine& target, + Value* src, + Instruction* dest, + vector& minstrVec) const; + + }; @@ -1278,7 +1287,7 @@ private: static const int MinStackFrameSize = 176; static const int NumFixedOutgoingArgs = 6; static const int SizeOfEachArgOnStack = 8; - static const int StaticAreaOffsetFromFP = 0 + OFFSET; + static const int StaticAreaOffsetFromFP = 0 + OFFSET; static const int FirstIncomingArgOffsetFromFP = 128 + OFFSET; static const int FirstOptionalIncomingArgOffsetFromFP = 176 + OFFSET; static const int FirstOutgoingArgOffsetFromSP = 128 + OFFSET; diff --git a/llvm/lib/Target/Sparc/SparcRegInfo.cpp b/llvm/lib/Target/Sparc/SparcRegInfo.cpp index cb7009d4de0d..4040b02579d9 100644 --- a/llvm/lib/Target/Sparc/SparcRegInfo.cpp +++ b/llvm/lib/Target/Sparc/SparcRegInfo.cpp @@ -893,7 +893,6 @@ void UltraSparcRegInfo::colorRetValue(const MachineInstr *const RetMI, // register number //--------------------------------------------------------------------------- - MachineInstr * UltraSparcRegInfo::cpReg2RegMI(const unsigned SrcReg, const unsigned DestReg, const int RegType) const { @@ -1040,24 +1039,56 @@ MachineInstr * UltraSparcRegInfo::cpMem2RegMI(const unsigned SrcPtrReg, -// Following method is Not needed now -MachineInstr* UltraSparcRegInfo::cpValue2Value(Value *Src, Value *Dest) const { +//--------------------------------------------------------------------------- +// Generate a copy instruction to copy a value to another. Temporarily +// used by PhiElimination code. +//--------------------------------------------------------------------------- + + +MachineInstr * UltraSparcRegInfo::cpValue2Value(Value *Src, Value *Dest) const{ + + int RegType = getRegType( Src ); + + assert( (RegType==getRegType(Src)) && "Src & Dest are diff types"); MachineInstr * MI = NULL; - MI = new MachineInstr(ADD, 3); - MI->SetMachineOperand(0, MachineOperand:: MO_VirtualRegister, Src, false); - MI->SetMachineOperand(1, SparcIntRegOrder::g0, false); - MI->SetMachineOperand(2, MachineOperand:: MO_VirtualRegister, Dest, true); - + switch( RegType ) { + + case IntRegType: + + MI = new MachineInstr(ADD, 3); + MI->SetMachineOperand(0, MachineOperand:: MO_VirtualRegister, Src, false); + MI->SetMachineOperand(1, SparcIntRegOrder::g0, false); + MI->SetMachineOperand(2, MachineOperand:: MO_VirtualRegister, Dest, true); + break; + + case FPSingleRegType: + MI = new MachineInstr(FMOVS, 2); + MI->SetMachineOperand(0, MachineOperand:: MO_VirtualRegister, Src, false); + MI->SetMachineOperand(1, MachineOperand:: MO_VirtualRegister, Dest, true); + break; + + + case FPDoubleRegType: + MI = new MachineInstr(FMOVD, 2); + MI->SetMachineOperand(0, MachineOperand:: MO_VirtualRegister, Src, false); + MI->SetMachineOperand(1, MachineOperand:: MO_VirtualRegister, Dest, true); + break; + + default: + assert(0 && "Unknow RegType in CpValu2Value"); + } return MI; - } + + + //---------------------------------------------------------------------------- // This method inserts caller saving/restoring instructons before/after // a call machine instruction.