forked from OSchip/llvm-project
[mips] [IAS] Make .module directives change AssemblerOptions->front().
Differential Revision: http://reviews.llvm.org/D10643 llvm-svn: 241062
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@ -361,6 +361,16 @@ class MipsAsmParser : public MCTargetAsmParser {
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}
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}
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void setModuleFeatureBits(uint64_t Feature, StringRef FeatureString) {
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setFeatureBits(Feature, FeatureString);
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AssemblerOptions.front()->setFeatures(STI.getFeatureBits());
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}
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void clearModuleFeatureBits(uint64_t Feature, StringRef FeatureString) {
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clearFeatureBits(Feature, FeatureString);
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AssemblerOptions.front()->setFeatures(STI.getFeatureBits());
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}
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public:
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enum MipsMatchResultTy {
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Match_RequiresDifferentSrcAndDst = FIRST_TARGET_MATCH_RESULT_TY
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@ -4711,7 +4721,7 @@ bool MipsAsmParser::parseDirectiveModule() {
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}
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if (Option == "oddspreg") {
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clearFeatureBits(Mips::FeatureNoOddSPReg, "nooddspreg");
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clearModuleFeatureBits(Mips::FeatureNoOddSPReg, "nooddspreg");
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// Synchronize the abiflags information with the FeatureBits information we
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// changed above.
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@ -4735,7 +4745,7 @@ bool MipsAsmParser::parseDirectiveModule() {
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return false;
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}
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setFeatureBits(Mips::FeatureNoOddSPReg, "nooddspreg");
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setModuleFeatureBits(Mips::FeatureNoOddSPReg, "nooddspreg");
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// Synchronize the abiflags information with the FeatureBits information we
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// changed above.
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@ -4800,6 +4810,7 @@ bool MipsAsmParser::parseFpABIValue(MipsABIFlagsSection::FpABIKind &FpABI,
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StringRef Directive) {
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MCAsmParser &Parser = getParser();
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MCAsmLexer &Lexer = getLexer();
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bool ModuleLevelOptions = Directive == ".module";
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if (Lexer.is(AsmToken::Identifier)) {
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StringRef Value = Parser.getTok().getString();
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@ -4816,8 +4827,13 @@ bool MipsAsmParser::parseFpABIValue(MipsABIFlagsSection::FpABIKind &FpABI,
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}
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FpABI = MipsABIFlagsSection::FpABIKind::XX;
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setFeatureBits(Mips::FeatureFPXX, "fpxx");
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clearFeatureBits(Mips::FeatureFP64Bit, "fp64");
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if (ModuleLevelOptions) {
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setModuleFeatureBits(Mips::FeatureFPXX, "fpxx");
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clearModuleFeatureBits(Mips::FeatureFP64Bit, "fp64");
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} else {
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setFeatureBits(Mips::FeatureFPXX, "fpxx");
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clearFeatureBits(Mips::FeatureFP64Bit, "fp64");
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}
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return true;
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}
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@ -4837,12 +4853,22 @@ bool MipsAsmParser::parseFpABIValue(MipsABIFlagsSection::FpABIKind &FpABI,
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}
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FpABI = MipsABIFlagsSection::FpABIKind::S32;
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clearFeatureBits(Mips::FeatureFPXX, "fpxx");
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clearFeatureBits(Mips::FeatureFP64Bit, "fp64");
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if (ModuleLevelOptions) {
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clearModuleFeatureBits(Mips::FeatureFPXX, "fpxx");
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clearModuleFeatureBits(Mips::FeatureFP64Bit, "fp64");
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} else {
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clearFeatureBits(Mips::FeatureFPXX, "fpxx");
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clearFeatureBits(Mips::FeatureFP64Bit, "fp64");
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}
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} else {
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FpABI = MipsABIFlagsSection::FpABIKind::S64;
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clearFeatureBits(Mips::FeatureFPXX, "fpxx");
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setFeatureBits(Mips::FeatureFP64Bit, "fp64");
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if (ModuleLevelOptions) {
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clearModuleFeatureBits(Mips::FeatureFPXX, "fpxx");
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setModuleFeatureBits(Mips::FeatureFP64Bit, "fp64");
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} else {
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clearFeatureBits(Mips::FeatureFPXX, "fpxx");
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setFeatureBits(Mips::FeatureFP64Bit, "fp64");
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}
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}
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return true;
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@ -0,0 +1,14 @@
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# RUN: not llvm-mc %s -arch=mips -mcpu=mips32 -mattr=+fp64,-nooddspreg 2>&1 | \
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# RUN: FileCheck %s
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.module nooddspreg
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add.s $f1, $f2, $f4
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# CHECK: :[[@LINE-1]]:9: error: -mno-odd-spreg prohibits the use of odd FPU registers
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.set oddspreg
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add.s $f1, $f2, $f4
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# CHECK-NOT: :[[@LINE-1]]:{{[0-9]+}}: error: -mno-odd-spreg prohibits the use of odd FPU registers
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.set mips0
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add.s $f1, $f2, $f4
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# CHECK: :[[@LINE-1]]:9: error: -mno-odd-spreg prohibits the use of odd FPU registers
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