forked from OSchip/llvm-project
Revert "Localizer fun"
This reverts commit r299283. Didn't intend to commit this :( llvm-svn: 299287
This commit is contained in:
Quentin Colombet
parent
35a47010b1
commit
fc8f048c13
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@ -1,58 +0,0 @@
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//== llvm/CodeGen/GlobalISel/Localizer.h - Localizer -------------*- C++ -*-==//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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/// \file This file describes the interface of the
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CODEGEN_GLOBALISEL_LOCALIZER_H
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#define LLVM_CODEGEN_GLOBALISEL_LOCALIZER_H
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#include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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namespace llvm {
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// Forward declarations.
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class MachineRegisterInfo;
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/// This pass implements the reg bank selector pass used in the GlobalISel
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/// pipeline. At the end of this pass, all register operands have been assigned
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class Localizer : public MachineFunctionPass {
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public:
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static char ID;
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private:
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/// MRI contains all the register class/bank information that this
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/// pass uses and updates.
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MachineRegisterInfo *MRI;
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static bool shouldLocalize(const MachineInstr &MI);
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static bool isLocalUse(MachineOperand &MOUse, const MachineInstr &Def, MachineBasicBlock **InsertMBB);
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/// Initialize the field members using \p MF.
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void init(MachineFunction &MF);
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public:
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Localizer();
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StringRef getPassName() const override { return "Localizer"; }
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MachineFunctionProperties getRequiredProperties() const override {
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return MachineFunctionProperties()
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.set(MachineFunctionProperties::Property::IsSSA)
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.set(MachineFunctionProperties::Property::Legalized)
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.set(MachineFunctionProperties::Property::RegBankSelected);
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}
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bool runOnMachineFunction(MachineFunction &MF) override;
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};
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} // End namespace llvm.
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#endif
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@ -642,11 +642,6 @@ public:
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///
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void setRegBank(unsigned Reg, const RegisterBank &RegBank);
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void setRegClassOrRegBank(unsigned Reg,
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const RegClassOrRegBank &RCOrRB){
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VRegInfo[Reg].first = RCOrRB;
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}
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/// constrainRegClass - Constrain the register class of the specified virtual
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/// register to be a common subclass of RC and the current register class,
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/// but only if the new class has at least MinNumRegs registers. Return the
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@ -192,7 +192,6 @@ void initializeLiveVariablesPass(PassRegistry&);
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void initializeLoadCombinePass(PassRegistry&);
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void initializeLoadStoreVectorizerPass(PassRegistry&);
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void initializeLoaderPassPass(PassRegistry&);
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void initializeLocalizerPass(PassRegistry&);
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void initializeLocalStackSlotPassPass(PassRegistry&);
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void initializeLoopAccessLegacyAnalysisPass(PassRegistry&);
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void initializeLoopDataPrefetchLegacyPassPass(PassRegistry&);
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@ -8,7 +8,6 @@ set(GLOBAL_ISEL_FILES
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LegalizerHelper.cpp
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Legalizer.cpp
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LegalizerInfo.cpp
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Localizer.cpp
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RegBankSelect.cpp
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RegisterBank.cpp
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RegisterBankInfo.cpp
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@ -26,7 +26,6 @@ void llvm::initializeGlobalISel(PassRegistry &Registry) {
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void llvm::initializeGlobalISel(PassRegistry &Registry) {
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initializeIRTranslatorPass(Registry);
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initializeLegalizerPass(Registry);
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initializeLocalizerPass(Registry);
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initializeRegBankSelectPass(Registry);
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initializeInstructionSelectPass(Registry);
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}
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@ -1,120 +0,0 @@
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//===- Localizer.cpp ---------------------- Localize some instrs -*- C++ -*-==//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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/// \file
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/// This file implements the Localizer class.
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//===----------------------------------------------------------------------===//
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#include "llvm/ADT/DenseMap.h"
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#include "llvm/ADT/SmallPtrSet.h"
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#include "llvm/CodeGen/GlobalISel/Localizer.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/Support/Debug.h"
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#define DEBUG_TYPE "localizer"
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using namespace llvm;
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char Localizer::ID = 0;
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INITIALIZE_PASS(Localizer, DEBUG_TYPE,
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"Move/duplicate certain instructions close to their use",
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false, false);
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Localizer::Localizer() : MachineFunctionPass(ID) {
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initializeLocalizerPass(*PassRegistry::getPassRegistry());
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}
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void Localizer::init(MachineFunction &MF) {
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MRI = &MF.getRegInfo();
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}
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bool Localizer::shouldLocalize(const MachineInstr &MI) {
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switch(MI.getOpcode()) {
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default:
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return false;
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// Constants-like instructions should be close to their users.
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// We don't want long live-ranges for them.
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case TargetOpcode::G_CONSTANT:
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case TargetOpcode::G_FRAME_INDEX:
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return true;
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}
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}
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bool Localizer::isLocalUse(MachineOperand &MOUse, const MachineInstr &Def, MachineBasicBlock **InsertMBB) {
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MachineInstr &MIUse = *MOUse.getParent();
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*InsertMBB = MIUse.getParent();
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if (MIUse.isPHI())
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*InsertMBB = MIUse.getOperand(MIUse.getOperandNo(&MOUse) + 1).getMBB();
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return *InsertMBB == Def.getParent();
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}
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bool Localizer::runOnMachineFunction(MachineFunction &MF) {
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// If the ISel pipeline failed, do not bother running that pass.
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if (MF.getProperties().hasProperty(
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MachineFunctionProperties::Property::FailedISel))
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return false;
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DEBUG(dbgs() << "Localize instructions for: " << MF.getName() << '\n');
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init(MF);
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bool Changed = false;
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// Keep track of the instructions we localized.
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// We won't need to process them if we see them later in the CFG.
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SmallPtrSet<MachineInstr *, 16> LocalizedInstrs;
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DenseMap<std::pair<MachineBasicBlock *, unsigned>, unsigned> MBBWithLocalDef;
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// TODO: Do bottom up traversal.
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for (MachineBasicBlock &MBB : MF) {
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for (MachineInstr &MI : MBB) {
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if (LocalizedInstrs.count(&MI) || !shouldLocalize(MI))
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continue;
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DEBUG(dbgs() << "Should localize: " << MI);
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assert(MI.getDesc().getNumDefs() == 1 && "More than one definition not supported yet");
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unsigned Reg = MI.getOperand(0).getReg();
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// Check if all the users of MI are local.
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// We are going to invalidation the list of use operands, so we
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// can't use range iterator.
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for (auto MOIt = MRI->use_begin(Reg), MOItEnd = MRI->use_end();
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MOIt != MOItEnd;) {
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MachineOperand &MOUse = *MOIt++;
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// Check if the use is already local.
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MachineBasicBlock *InsertMBB;
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DEBUG(MachineInstr &MIUse = *MOUse.getParent();
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dbgs() << "Checking use: " << MIUse << " #Opd: " << MIUse.getOperandNo(&MOUse) << '\n');
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if (isLocalUse(MOUse, MI, &InsertMBB))
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continue;
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DEBUG(dbgs() << "Fixing non-local use\n");
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Changed = true;
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auto MBBAndReg = std::make_pair(InsertMBB, Reg);
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auto NewVRegIt = MBBWithLocalDef.find(MBBAndReg);
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if (NewVRegIt == MBBWithLocalDef.end()) {
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// Create the localized instruction.
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MachineInstr *LocalizedMI = MF.CloneMachineInstr(&MI);
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LocalizedInstrs.insert(LocalizedMI);
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// Move it at the right place.
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MachineInstr &MIUse = *MOUse.getParent();
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if (MIUse.getParent() == InsertMBB)
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InsertMBB->insert(MIUse, LocalizedMI);
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else
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InsertMBB->insert(InsertMBB->getFirstNonPHI(), LocalizedMI);
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// Set a new register for the definition.
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unsigned NewReg = MRI->createGenericVirtualRegister(MRI->getType(Reg));
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MRI->setRegClassOrRegBank(NewReg, MRI->getRegClassOrRegBank(Reg));
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LocalizedMI->getOperand(0).setReg(NewReg);
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NewVRegIt = MBBWithLocalDef.insert(std::make_pair(MBBAndReg, NewReg)).first;
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DEBUG(dbgs() << "Inserted: " << *LocalizedMI);
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}
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DEBUG(dbgs() << "Update use with: " << PrintReg(NewVRegIt->second) << '\n');
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// Update the user reg.
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MOUse.setReg(NewVRegIt->second);
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}
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}
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}
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return Changed;
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}
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@ -1,260 +0,0 @@
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# RUN: llc -O0 -mtriple=aarch64-apple-ios -run-pass=localizer -verify-machineinstrs -global-isel %s -o - | FileCheck %s -check-prefix=CHECK
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# Test the localizer.
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--- |
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target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
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define void @local_use() { ret void }
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define void @non_local_1use() { ret void }
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define void @non_local_2uses() { ret void }
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define void @non_local_phi_use() { ret void }
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define void @non_local_phi_use_followed_by_use() { ret void }
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define void @non_local_phi_use_followed_by_use_fi() { ret void }
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...
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---
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# CHECK-LABEL: name: local_use
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name: local_use
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legalized: true
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regBankSelected: true
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# CHECK: registers:
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registers:
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- { id: 0, class: gpr }
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- { id: 1, class: gpr }
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- { id: 2, class: gpr }
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# CHECK: body:
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# CHECK: %0(s32) = G_CONSTANT 1
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# CHECK-NEXT: %1(s32) = G_ADD %0, %0
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body: |
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bb.0:
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%0(s32) = G_CONSTANT 1
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%1(s32) = G_ADD %0, %0
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...
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---
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# CHECK-LABEL: name: non_local_1use
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name: non_local_1use
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legalized: true
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regBankSelected: true
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# CHECK: registers:
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# Existing registers should be left untouched
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# CHECK: - { id: 0, class: gpr }
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#CHECK-NEXT: - { id: 1, class: gpr }
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#CHECK-NEXT: - { id: 2, class: gpr }
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# The newly created reg should be on the same regbank/regclass as its origin.
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#CHECK-NEXT: - { id: 3, class: gpr }
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registers:
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- { id: 0, class: gpr }
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- { id: 1, class: gpr }
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- { id: 2, class: gpr }
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# CHECK: body:
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# CHECK: %0(s32) = G_CONSTANT 1
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# CHECK-NEXT: %1(s32) = G_ADD %0, %0
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# CHECK: bb.1:
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# CHECK: %3(s32) = G_CONSTANT 1
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# CHECK-NEXT: %2(s32) = G_ADD %3, %1
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body: |
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bb.0:
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successors: %bb.1
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%0(s32) = G_CONSTANT 1
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%1(s32) = G_ADD %0, %0
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bb.1:
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%2(s32) = G_ADD %0, %1
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...
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---
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# CHECK-LABEL: name: non_local_2uses
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name: non_local_2uses
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legalized: true
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regBankSelected: true
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# CHECK: registers:
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# Existing registers should be left untouched
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# CHECK: - { id: 0, class: gpr }
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#CHECK-NEXT: - { id: 1, class: gpr }
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#CHECK-NEXT: - { id: 2, class: gpr }
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# The newly created reg should be on the same regbank/regclass as its origin.
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#CHECK-NEXT: - { id: 3, class: gpr }
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registers:
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- { id: 0, class: gpr }
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- { id: 1, class: gpr }
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- { id: 2, class: gpr }
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# CHECK: body:
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# CHECK: %0(s32) = G_CONSTANT 1
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# CHECK-NEXT: %1(s32) = G_ADD %0, %0
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# CHECK: bb.1:
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# CHECK: %3(s32) = G_CONSTANT 1
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# CHECK-NEXT: %2(s32) = G_ADD %3, %3
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body: |
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bb.0:
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successors: %bb.1
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%0(s32) = G_CONSTANT 1
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%1(s32) = G_ADD %0, %0
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bb.1:
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%2(s32) = G_ADD %0, %0
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...
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---
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# CHECK-LABEL: name: non_local_phi_use
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name: non_local_phi_use
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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# CHECK: registers:
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# Existing registers should be left untouched
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# CHECK: - { id: 0, class: gpr }
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#CHECK-NEXT: - { id: 1, class: gpr }
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#CHECK-NEXT: - { id: 2, class: gpr }
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#CHECK-NEXT: - { id: 3, class: gpr }
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#CHECK-NEXT: - { id: 4, class: gpr }
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# The newly created reg should be on the same regbank/regclass as its origin.
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#CHECK-NEXT: - { id: 5, class: gpr }
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registers:
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- { id: 0, class: gpr }
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- { id: 1, class: gpr }
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- { id: 2, class: gpr }
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- { id: 3, class: gpr }
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- { id: 4, class: gpr }
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# CHECK: body:
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# CHECK: %0(s32) = G_CONSTANT 1
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# CHECK-NEXT: %1(s32) = G_ADD %0, %0
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# CHECK: bb.1:
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# CHECK: %5(s32) = G_CONSTANT 1
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# CHECK: bb.2:
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# CHECK: %3(s32) = PHI %5(s32), %bb.1
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body: |
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bb.0:
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successors: %bb.1
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%0(s32) = G_CONSTANT 1
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%1(s32) = G_ADD %0, %0
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bb.1:
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successors: %bb.2
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bb.2:
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%3(s32) = PHI %0(s32), %bb.1
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%2(s32) = G_ADD %3, %3
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...
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---
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# CHECK-LABEL: name: non_local_phi_use_followed_by_use
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name: non_local_phi_use_followed_by_use
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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# CHECK: registers:
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# Existing registers should be left untouched
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# CHECK: - { id: 0, class: gpr }
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#CHECK-NEXT: - { id: 1, class: gpr }
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#CHECK-NEXT: - { id: 2, class: gpr }
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#CHECK-NEXT: - { id: 3, class: gpr }
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#CHECK-NEXT: - { id: 4, class: gpr }
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# The newly created regs should be on the same regbank/regclass as its origin.
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#CHECK-NEXT: - { id: 5, class: gpr }
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#CHECK-NEXT: - { id: 6, class: gpr }
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registers:
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- { id: 0, class: gpr }
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- { id: 1, class: gpr }
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- { id: 2, class: gpr }
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- { id: 3, class: gpr }
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- { id: 4, class: gpr }
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# CHECK: body:
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# CHECK: %0(s32) = G_CONSTANT 1
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# CHECK-NEXT: %1(s32) = G_ADD %0, %0
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# CHECK: bb.1:
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# CHECK: %5(s32) = G_CONSTANT 1
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# CHECK: bb.2:
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# CHECK: %3(s32) = PHI %5(s32), %bb.1
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# CHECK-NEXT: %6(s32) = G_CONSTANT 1
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# CHECK-NEXT: %2(s32) = G_ADD %3, %6
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body: |
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bb.0:
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successors: %bb.1
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%0(s32) = G_CONSTANT 1
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%1(s32) = G_ADD %0, %0
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bb.1:
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successors: %bb.2
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bb.2:
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%3(s32) = PHI %0(s32), %bb.1
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%2(s32) = G_ADD %3, %0
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...
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---
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# CHECK-LABEL: name: non_local_phi_use_followed_by_use_fi
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name: non_local_phi_use_followed_by_use_fi
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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# CHECK: registers:
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# Existing registers should be left untouched
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# CHECK: - { id: 0, class: gpr }
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#CHECK-NEXT: - { id: 1, class: gpr }
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#CHECK-NEXT: - { id: 2, class: gpr }
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#CHECK-NEXT: - { id: 3, class: gpr }
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#CHECK-NEXT: - { id: 4, class: gpr }
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# The newly created reg should be on the same regbank/regclass as its origin.
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#CHECK-NEXT: - { id: 5, class: gpr }
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#CHECK-NEXT: - { id: 6, class: gpr }
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registers:
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- { id: 0, class: gpr }
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- { id: 1, class: gpr }
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- { id: 2, class: gpr }
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- { id: 3, class: gpr }
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- { id: 4, class: gpr }
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# CHECK: body:
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# CHECK: %0(s32) = G_FRAME_INDEX 1
|
||||
# CHECK-NEXT: %1(s32) = G_ADD %0, %0
|
||||
|
||||
# CHECK: bb.1:
|
||||
# CHECK: %5(s32) = G_FRAME_INDEX 1
|
||||
|
||||
# CHECK: bb.2:
|
||||
# CHECK: %3(s32) = PHI %5(s32), %bb.1
|
||||
# CHECK-NEXT: %6(s32) = G_FRAME_INDEX 1
|
||||
# CHECK-NEXT: %2(s32) = G_ADD %3, %6
|
||||
body: |
|
||||
bb.0:
|
||||
successors: %bb.1
|
||||
|
||||
%0(s32) = G_FRAME_INDEX 1
|
||||
%1(s32) = G_ADD %0, %0
|
||||
|
||||
bb.1:
|
||||
successors: %bb.2
|
||||
|
||||
bb.2:
|
||||
%3(s32) = PHI %0(s32), %bb.1
|
||||
%2(s32) = G_ADD %3, %0
|
||||
...
|
||||
Loading…
Reference in New Issue