From fc4b343ddab7a34fc41c849d16f0065bad27a5a6 Mon Sep 17 00:00:00 2001
From: Eli Friedman <eli.friedman@gmail.com>
Date: Tue, 6 Sep 2011 20:53:37 +0000
Subject: [PATCH] Add mayLoad/mayStore markings to ARM 64-bit atomic
 pseudo-instructions.

llvm-svn: 139179
---
 llvm/lib/Target/ARM/ARMInstrInfo.td | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/llvm/lib/Target/ARM/ARMInstrInfo.td b/llvm/lib/Target/ARM/ARMInstrInfo.td
index 9806d058a31a..429fe9e3bd64 100644
--- a/llvm/lib/Target/ARM/ARMInstrInfo.td
+++ b/llvm/lib/Target/ARM/ARMInstrInfo.td
@@ -1611,7 +1611,7 @@ PseudoInst<(outs), (ins i32imm:$amt, pred:$p), NoItinerary,
 
 // Atomic pseudo-insts which will be lowered to ldrexd/strexd loops.
 // (These psuedos use a hand-written selection code).
-let usesCustomInserter = 1, Defs = [CPSR] in {
+let usesCustomInserter = 1, Defs = [CPSR], mayLoad = 1, mayStore = 1 in {
 def ATOMOR6432   : PseudoInst<(outs GPR:$dst1, GPR:$dst2),
                               (ins GPR:$addr, GPR:$src1, GPR:$src2),
                               NoItinerary, []>;