forked from OSchip/llvm-project
[LLD][ELF][ARM] Tidy up test to hook up missing filecheck patterns [NFC]
A couple of filecheck patterns had not been hooked up with the patterns suffering from some drift. As this test is old and llvm-objdump has improved a lot, take this opportunity to hide the instruction encoding. I've also taken out a lot of the explanatory comments that llvm-objdump improvements make redundant, as these comments oftern don't get updated when addresses change. Differential Revision: https://reviews.llvm.org/D104907
This commit is contained in:
Peter Smith
parent
e585b332e4
commit
fc1cb3104b
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@ -11,23 +11,23 @@
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// RUN: .R_ARM_THM_JUMP_callee_2 : { *(.R_ARM_THM_JUMP_callee_high) } \
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// RUN: .R_ARM_THM_JUMP_callee_2 : { *(.R_ARM_THM_JUMP_callee_high) } \
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// RUN: .got.plt 0x18b4 : { } } " > %t.script
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// RUN: .got.plt 0x18b4 : { } } " > %t.script
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// RUN: ld.lld --script %t.script %t -o %t2
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// RUN: ld.lld --script %t.script %t -o %t2
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// RUN: llvm-objdump -d --triple=thumbv7a-none-linux-gnueabi %t2 | FileCheck --check-prefix=CHECK-THUMB --check-prefix=CHECK-ABS-THUMB %s
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// RUN: llvm-objdump -d --no-show-raw-insn --triple=thumbv7a-none-linux-gnueabi %t2 | FileCheck --check-prefix=CHECK-THUMB --check-prefix=CHECK-ABS-THUMB %s
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// RUN: llvm-objdump -d --triple=armv7a-none-linux-gnueabi %t2 | FileCheck --check-prefix=CHECK-ARM --check-prefix=CHECK-ARM-ABS-ARM %s
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// RUN: llvm-objdump -d --no-show-raw-insn --triple=armv7a-none-linux-gnueabi %t2 | FileCheck --check-prefix=CHECK-ARM --check-prefix=CHECK-ARM-ABS-ARM %s
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// RUN: ld.lld --script %t.script %t -pie -o %t3
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// RUN: ld.lld --script %t.script %t -pie -o %t3
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// RUN: llvm-objdump -d --no-show-raw-insn --triple=thumbv7a-none-linux-gnueabi %t3 | FileCheck --check-prefix=CHECK-THUMB --check-prefix=CHECK-PI-THUMB %s
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// RUN: llvm-objdump -d --no-show-raw-insn --triple=armv7a-none-linux-gnueabi %t3 | FileCheck --check-prefix=CHECK-ARM --check-prefix=CHECK-PI-ARM %s
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// RUN: ld.lld --script %t.script %t --shared -o %t4
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// RUN: ld.lld --script %t.script %t --shared -o %t4
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// RUN: llvm-objdump -d --triple=thumbv7a-none-linux-gnueabi %t3 | FileCheck --check-prefix=CHECK-THUMB --check-prefix=CHECK-PI-THUMB %s
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// RUN: llvm-objdump -d --triple=armv7a-none-linux-gnueabi %t3 | FileCheck --check-prefix=CHECK-ARM --check-prefix=CHECK-PI-ARM %s
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// RUN: llvm-readobj -S -r %t4 | FileCheck -check-prefix=CHECK-DSO-REL %s
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// RUN: llvm-readobj -S -r %t4 | FileCheck -check-prefix=CHECK-DSO-REL %s
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// RUN: llvm-objdump -d --no-show-raw-insn --triple=armv7a-none-linux-gnueabi %t4 | FileCheck -check-prefix=CHECK-ARM-PLT %s
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// Test ARM Thumb Interworking
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/// Test ARM Thumb Interworking
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// The file is linked and checked 3 times to check the following contexts
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/// The file is linked and checked 3 times to check the following contexts
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// - Absolute executables, absolute Thunks are used.
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/// - Absolute executables, absolute Thunks are used.
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// - Position independent executables, position independent Thunks are used.
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/// - Position independent executables, position independent Thunks are used.
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// - Shared object, position independent Thunks to PLT entries are used.
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/// - Shared object, position independent Thunks to PLT entries are used.
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.syntax unified
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.syntax unified
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// Target Sections for thunks at a lower address than the callers.
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/// Target Sections for thunks at a lower address than the callers.
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.section .R_ARM_JUMP24_callee_low, "ax", %progbits
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.section .R_ARM_JUMP24_callee_low, "ax", %progbits
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.thumb
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.thumb
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.balign 0x1000
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.balign 0x1000
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@ -39,7 +39,7 @@ thumb_callee1:
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// CHECK-THUMB: Disassembly of section .R_ARM_JUMP24_callee_1:
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// CHECK-THUMB: Disassembly of section .R_ARM_JUMP24_callee_1:
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// CHECK-THUMB-EMPTY:
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// CHECK-THUMB-EMPTY:
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// CHECK-THUMB: <thumb_callee1>:
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// CHECK-THUMB: <thumb_callee1>:
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// CHECK-THUMB: 1000: 70 47 bx
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// CHECK-THUMB: 1000: bx lr
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.section .R_ARM_THM_JUMP_callee_low, "ax", %progbits
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.section .R_ARM_THM_JUMP_callee_low, "ax", %progbits
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.arm
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.arm
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.balign 0x100
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.balign 0x100
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@ -49,30 +49,30 @@ arm_callee1:
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bx lr
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bx lr
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// Disassembly of section .R_ARM_THM_JUMP_callee_1:
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// Disassembly of section .R_ARM_THM_JUMP_callee_1:
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// CHECK-ARM: <arm_callee1>:
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// CHECK-ARM: <arm_callee1>:
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// CHECK-ARM-NEXT: 1100: 1e ff 2f e1 bx lr
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// CHECK-ARM-NEXT: 1100: bx lr
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// Calling sections
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/// Calling sections
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// At present ARM and Thumb interworking thunks are always added to the calling
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/// At present ARM and Thumb interworking thunks are always added to the calling
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// section.
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/// section.
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.section .arm_caller, "ax", %progbits
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.section .arm_caller, "ax", %progbits
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.arm
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.arm
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.balign 0x100
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.balign 0x100
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.globl arm_caller
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.globl arm_caller
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.type arm_caller, %function
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.type arm_caller, %function
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arm_caller:
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arm_caller:
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// If target supports BLX and target is in range we don't need an
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/// If target supports BLX and target is in range we don't need an
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// interworking thunk for a BL or BLX instruction.
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/// interworking thunk for a BL or BLX instruction.
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bl thumb_callee1
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bl thumb_callee1
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blx thumb_callee1
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blx thumb_callee1
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// A B instruction can't be transformed into a BLX and needs an interworking
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/// A B instruction can't be transformed into a BLX and needs an interworking
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// thunk
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/// thunk.
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b thumb_callee1
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b thumb_callee1
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// As long as the thunk is in range it can be reused
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/// As long as the thunk is in range it can be reused.
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b thumb_callee1
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b thumb_callee1
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// There can be more than one thunk associated with a section
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/// There can be more than one thunk associated with a section.
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b thumb_callee2
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b thumb_callee2
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b thumb_callee3
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b thumb_callee3
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// In range ARM targets do not require interworking thunks
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/// In range ARM targets do not require interworking thunks.
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b arm_callee1
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b arm_callee1
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beq arm_callee2
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beq arm_callee2
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bne arm_callee3
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bne arm_callee3
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@ -80,88 +80,75 @@ arm_caller:
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// CHECK-ARM-ABS-ARM: Disassembly of section .arm_caller:
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// CHECK-ARM-ABS-ARM: Disassembly of section .arm_caller:
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// CHECK-ARM-ABS-ARM-EMPTY:
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// CHECK-ARM-ABS-ARM-EMPTY:
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// CHECK-ARM-ABS-ARM-NEXT: <arm_caller>:
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// CHECK-ARM-ABS-ARM-NEXT: <arm_caller>:
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// CHECK-ARM-ABS-ARM-NEXT: 1300: 3e ff ff fa blx 0x1000 <thumb_callee1>
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// CHECK-ARM-ABS-ARM-NEXT: 1300: blx 0x1000 <thumb_callee1>
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// CHECK-ARM-ABS-ARM-NEXT: 1304: 3d ff ff fa blx 0x1000 <thumb_callee1>
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// CHECK-ARM-ABS-ARM-NEXT: 1304: blx 0x1000 <thumb_callee1>
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// CHECK-ARM-ABS-ARM-NEXT: 1308: 06 00 00 ea b 0x1328 <__ARMv7ABSLongThunk_thumb_callee1>
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// CHECK-ARM-ABS-ARM-NEXT: 1308: b 0x1328 <__ARMv7ABSLongThunk_thumb_callee1>
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// CHECK-ARM-ABS-ARM-NEXT: 130c: 05 00 00 ea b 0x1328 <__ARMv7ABSLongThunk_thumb_callee1>
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// CHECK-ARM-ABS-ARM-NEXT: 130c: b 0x1328 <__ARMv7ABSLongThunk_thumb_callee1>
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// CHECK-ARM-ABS-ARM-NEXT: 1310: 07 00 00 ea b 0x1334 <__ARMv7ABSLongThunk_thumb_callee2>
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// CHECK-ARM-ABS-ARM-NEXT: 1310: b 0x1334 <__ARMv7ABSLongThunk_thumb_callee2>
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// CHECK-ARM-ABS-ARM-NEXT: 1314: 09 00 00 ea b 0x1340 <__ARMv7ABSLongThunk_thumb_callee3>
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// CHECK-ARM-ABS-ARM-NEXT: 1314: b 0x1340 <__ARMv7ABSLongThunk_thumb_callee3>
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// CHECK-ARM-ABS-ARM-NEXT: 1318: 78 ff ff ea b 0x1100 <arm_callee1>
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// CHECK-ARM-ABS-ARM-NEXT: 1318: b 0x1100 <arm_callee1>
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// CHECK-ARM-ABS-ARM-NEXT: 131c: b7 00 00 0a beq 0x1600 <arm_callee2>
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// CHECK-ARM-ABS-ARM-NEXT: 131c: beq 0x1600 <arm_callee2>
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// CHECK-ARM-ABS-ARM-NEXT: 1320: b7 00 00 1a bne 0x1604 <arm_callee3>
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// CHECK-ARM-ABS-ARM-NEXT: 1320: bne 0x1604 <arm_callee3>
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// CHECK-ARM-ABS-ARM-NEXT: 1324: 1e ff 2f e1 bx lr
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// CHECK-ARM-ABS-ARM-NEXT: 1324: bx lr
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// CHECK-ARM-ABS-ARM: <__ARMv7ABSLongThunk_thumb_callee1>:
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// CHECK-ARM-ABS-ARM: <__ARMv7ABSLongThunk_thumb_callee1>:
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// 0x1001 = thumb_callee1
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// 0x1001 = thumb_callee1
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// CHECK-ARM-ABS-ARM-NEXT: 1328: 01 c0 01 e3 movw r12, #4097
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// CHECK-ARM-ABS-ARM-NEXT: 1328: movw r12, #4097
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// CHECK-ARM-ABS-ARM-NEXT: 132c: 00 c0 40 e3 movt r12, #0
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// CHECK-ARM-ABS-ARM-NEXT: 132c: movt r12, #0
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// CHECK-ARM-ABS-ARM-NEXT: 1330: 1c ff 2f e1 bx r12
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// CHECK-ARM-ABS-ARM-NEXT: 1330: bx r12
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// 0x1501 = thumb_callee2
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// 0x1501 = thumb_callee2
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// CHECK-ARM-ABS-ARM: <__ARMv7ABSLongThunk_thumb_callee2>:
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// CHECK-ARM-ABS-ARM: <__ARMv7ABSLongThunk_thumb_callee2>:
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// CHECK-ARM-ABS-ARM-NEXT: 1334: 01 c5 01 e3 movw r12, #5377
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// CHECK-ARM-ABS-ARM-NEXT: 1334: movw r12, #5377
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// CHECK-ARM-ABS-ARM-NEXT: 1338: 00 c0 40 e3 movt r12, #0
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// CHECK-ARM-ABS-ARM-NEXT: 1338: movt r12, #0
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// CHECK-ARM-ABS-ARM-NEXT: 133c: 1c ff 2f e1 bx r12
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// CHECK-ARM-ABS-ARM-NEXT: 133c: bx r12
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// 0x1503 = thumb_callee3
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// 0x1503 = thumb_callee3
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// CHECK-ARM-ABS-ARM: <__ARMv7ABSLongThunk_thumb_callee3>:
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// CHECK-ARM-ABS-ARM: <__ARMv7ABSLongThunk_thumb_callee3>:
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// CHECK-ARM-ABS-ARM-NEXT: 1340: 03 c5 01 e3 movw r12, #5379
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// CHECK-ARM-ABS-ARM-NEXT: 1340: movw r12, #5379
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// CHECK-ARM-ABS-ARM-NEXT: 1344: 00 c0 40 e3 movt r12, #0
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// CHECK-ARM-ABS-ARM-NEXT: 1344: movt r12, #0
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// CHECK-ARM-ABS-ARM-NEXT: 1348: 1c ff 2f e1 bx r12
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// CHECK-ARM-ABS-ARM-NEXT: 1348: bx r12
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// CHECK-PI-ARM: Disassembly of section .arm_caller:
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// CHECK-PI-ARM: Disassembly of section .arm_caller:
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// CHECK-PI-ARM-EMPTY:
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// CHECK-PI-ARM-EMPTY:
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// CHECK-PI-ARM-NEXT: <arm_caller>:
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// CHECK-PI-ARM-NEXT: <arm_caller>:
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// CHECK-PI-ARM-NEXT: 1300: 3e ff ff fa blx 0x1000 <thumb_callee1>
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// CHECK-PI-ARM-NEXT: 1300: blx 0x1000 <thumb_callee1>
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// CHECK-PI-ARM-NEXT: 1304: 3d ff ff fa blx 0x1000 <thumb_callee1>
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// CHECK-PI-ARM-NEXT: 1304: blx 0x1000 <thumb_callee1>
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// CHECK-PI-ARM-NEXT: 1308: 06 00 00 ea b 0x1328 <__ARMV7PILongThunk_thumb_callee1>
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// CHECK-PI-ARM-NEXT: 1308: b 0x1328 <__ARMV7PILongThunk_thumb_callee1>
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// CHECK-PI-ARM-NEXT: 130c: 05 00 00 ea b 0x1328 <__ARMV7PILongThunk_thumb_callee1>
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// CHECK-PI-ARM-NEXT: 130c: b 0x1328 <__ARMV7PILongThunk_thumb_callee1>
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// CHECK-PI-ARM-NEXT: 1310: 08 00 00 ea b 0x1338 <__ARMV7PILongThunk_thumb_callee2>
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// CHECK-PI-ARM-NEXT: 1310: b 0x1338 <__ARMV7PILongThunk_thumb_callee2>
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// CHECK-PI-ARM-NEXT: 1314: 0b 00 00 ea b 0x1348 <__ARMV7PILongThunk_thumb_callee3>
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// CHECK-PI-ARM-NEXT: 1314: b 0x1348 <__ARMV7PILongThunk_thumb_callee3>
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// CHECK-PI-ARM-NEXT: 1318: 78 ff ff ea b 0x1100 <arm_callee1>
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// CHECK-PI-ARM-NEXT: 1318: b 0x1100 <arm_callee1>
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// CHECK-PI-ARM-NEXT: 131c: b7 00 00 0a beq 0x1600 <arm_callee2>
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// CHECK-PI-ARM-NEXT: 131c: beq 0x1600 <arm_callee2>
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// CHECK-PI-ARM-NEXT: 1320: b7 00 00 1a bne 0x1604 <arm_callee3>
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// CHECK-PI-ARM-NEXT: 1320: bne 0x1604 <arm_callee3>
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// CHECK-PI-ARM-NEXT: 1324: 1e ff 2f e1 bx lr
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// CHECK-PI-ARM-NEXT: 1324: bx lr
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// CHECK-PI-ARM: <__ARMV7PILongThunk_thumb_callee1>:
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// CHECK-PI-ARM: <__ARMV7PILongThunk_thumb_callee1>:
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// 0x1330 + 8 - 0x337 = 0x1001 = thumb_callee1
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// CHECK-PI-ARM-NEXT: 1328: movw r12, #64713
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// CHECK-PI-ARM-NEXT: 1328: c9 cc 0f e3 movw r12, #64713
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// CHECK-PI-ARM-NEXT: 132c: movt r12, #65535
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// CHECK-PI-ARM-NEXT: 132c: ff cf 4f e3 movt r12, #65535
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// CHECK-PI-ARM-NEXT: 1330: add r12, r12, pc
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// CHECK-PI-ARM-NEXT: 1330: 0f c0 8c e0 add r12, r12, pc
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// CHECK-PI-ARM-NEXT: 1334: bx r12
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// CHECK-PI-ARM-NEXT: 1334: 1c ff 2f e1 bx r12
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// CHECK-PI-ARM: <__ARMV7PILongThunk_thumb_callee2>:
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// CHECK-PI-ARM: <__ARMV7PILongThunk_thumb_callee2>:
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// CHECK-PI-ARM-NEXT: 1338: movw r12, #441
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// CHECK-PI-ARM-NEXT: 1338: b9 c1 00 e3 movw r12, #441
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// CHECK-PI-ARM-NEXT: 133c: movt r12, #0
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// CHECK-PI-ARM-NEXT: 133c: 00 c0 40 e3 movt r12, #0
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// CHECK-PI-ARM-NEXT: 1340: add r12, r12, pc
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// CHECK-PI-ARM-NEXT: 1340: 0f c0 8c e0 add r12, r12, pc
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// CHECK-PI-ARM-NEXT: 1344: bx r12
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// CHECK-PI-ARM-NEXT: 1344: 1c ff 2f e1 bx r12
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// CHECK-PI-ARM: <__ARMV7PILongThunk_thumb_callee3>:
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// CHECK-PI-ARM: <__ARMV7PILongThunk_thumb_callee3>:
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// 0x1340 + 8 + 0x1b9 = 0x1501
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// CHECK-PI-ARM-NEXT: 1348: movw r12, #427
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// CHECK-PI-ARM-NEXT: 1348: ab c1 00 e3 movw r12, #427
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// CHECK-PI-ARM-NEXT: 134c: movt r12, #0
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// CHECK-PI-ARM-NEXT: 134c: 00 c0 40 e3 movt r12, #0
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// CHECK-PI-ARM-NEXT: 1350: add r12, r12, pc
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// CHECK-PI-ARM-NEXT: 1350: 0f c0 8c e0 add r12, r12, pc
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// CHECK-PI-ARM-NEXT: 1354: bx r12
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// CHECK-PI-ARM-NEXT: 1354: 1c ff 2f e1 bx r12
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// 1350 + 8 + 0x1ab = 0x1503
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// All PLT entries are ARM, no need for interworking thunks
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/// All PLT entries are ARM, callers via PLT no need for interworking thunks.
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// CHECK-PI-ARM-PLT: Disassembly of section .arm_caller:
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// CHECK-ARM-PLT: Disassembly of section .arm_caller:
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// CHECK-PI-ARM-PLT-EMPTY:
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// CHECK-ARM-PLT-EMPTY:
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// CHECK-PI-ARM-PLT-NEXT: arm_caller:
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// CHECK-ARM-PLT-NEXT: <arm_caller>:
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// 0x17e4 PLT(thumb_callee1)
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// CHECK-ARM-PLT-NEXT: 1300: bl 0x1650
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// CHECK-PI-ARM-PLT-NEXT: 1300: 37 01 00 eb bl #1244
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// CHECK-ARM-PLT-NEXT: 1304: bl 0x1650
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// 0x17e4 PLT(thumb_callee1)
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// CHECK-ARM-PLT-NEXT: 1308: b 0x1650
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// CHECK-PI-ARM-PLT-NEXT: 1304: 36 01 00 eb bl #1240
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// CHECK-ARM-PLT-NEXT: 130c: b 0x1650
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// 0x17e4 PLT(thumb_callee1)
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// CHECK-ARM-PLT-NEXT: 1310: b 0x1660
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// CHECK-PI-ARM-PLT-NEXT: 1308: 35 01 00 ea b #1236
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// CHECK-ARM-PLT-NEXT: 1314: b 0x1670
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// 0x17e4 PLT(thumb_callee1)
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// CHECK-ARM-PLT-NEXT: 1318: b 0x1680
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// CHECK-PI-ARM-PLT-NEXT: 130c: 34 01 00 ea b #1232
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// CHECK-ARM-PLT-NEXT: 131c: beq 0x1690
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// 0x17f4 PLT(thumb_callee2)
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// CHECK-ARM-PLT-NEXT: 1320: bne 0x16a0
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// CHECK-PI-ARM-PLT-NEXT: 1310: 37 01 00 ea b #1244
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// CHECK-ARM-PLT-NEXT: 1324: bx lr
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// 0x1804 PLT(thumb_callee3)
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// CHECK-PI-ARM-PLT-NEXT: 1314: 3a 01 00 ea b #1256
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// 0x1814 PLT(arm_callee1)
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// CHECK-PI-ARM-PLT-NEXT: 1318: 3d 01 00 ea b #1268
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// 0x1824 PLT(arm_callee2)
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// CHECK-PI-ARM-PLT-NEXT: 131c: 40 01 00 0a beq #1280
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// 0x1834 PLT(arm_callee3)
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// CHECK-PI-ARM-PLT-NEXT: 1320: 43 01 00 1a bne #1292
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// CHECK-PI-ARM-PLT-NEXT: 1324: 1e ff 2f e1 bx lr
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.section .thumb_caller, "ax", %progbits
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.section .thumb_caller, "ax", %progbits
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.balign 0x100
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.balign 0x100
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@ -169,115 +156,89 @@ arm_caller:
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.globl thumb_caller
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.globl thumb_caller
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.type thumb_caller, %function
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.type thumb_caller, %function
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thumb_caller:
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thumb_caller:
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// If target supports BLX and target is in range we don't need an
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/// If target supports BLX and target is in range we don't need an
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// interworking thunk for a BL or BLX instruction.
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/// interworking thunk for a BL or BLX instruction.
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bl arm_callee1
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bl arm_callee1
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blx arm_callee1
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blx arm_callee1
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// A B instruction can't be transformed into a BLX and needs an interworking
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/// A B instruction can't be transformed into a BLX and needs an interworking
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// thunk
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/// thunk
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b.w arm_callee1
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b.w arm_callee1
|
||||||
// As long as the thunk is in range it can be reused
|
/// As long as the thunk is in range it can be reused
|
||||||
b.w arm_callee2
|
b.w arm_callee2
|
||||||
// There can be more than one thunk associated with a section
|
/// There can be more than one thunk associated with a section
|
||||||
b.w arm_callee3
|
b.w arm_callee3
|
||||||
// Conditional branches also require interworking thunks, they can use the
|
/// Conditional branches also require interworking thunks, they can use the
|
||||||
// same interworking thunks.
|
/// same interworking thunks.
|
||||||
beq.w arm_callee1
|
beq.w arm_callee1
|
||||||
beq.w arm_callee2
|
beq.w arm_callee2
|
||||||
bne.w arm_callee3
|
bne.w arm_callee3
|
||||||
// CHECK-ABS-THUMB: Disassembly of section .thumb_caller:
|
// CHECK-ABS-THUMB: Disassembly of section .thumb_caller:
|
||||||
// CHECK-ABS-THUMB-EMPTY:
|
// CHECK-ABS-THUMB-EMPTY:
|
||||||
// CHECK-ABS-THUMB-NEXT: <thumb_caller>:
|
// CHECK-ABS-THUMB-NEXT: <thumb_caller>:
|
||||||
// CHECK-ABS-THUMB-NEXT: 1400: ff f7 7e ee blx 0x1100 <arm_callee1>
|
// CHECK-ABS-THUMB-NEXT: 1400: blx 0x1100 <arm_callee1>
|
||||||
// CHECK-ABS-THUMB-NEXT: 1404: ff f7 7c ee blx 0x1100 <arm_callee1>
|
// CHECK-ABS-THUMB-NEXT: 1404: blx 0x1100 <arm_callee1>
|
||||||
// CHECK-ABS-THUMB-NEXT: 1408: 00 f0 0a b8 b.w 0x1420 <__Thumbv7ABSLongThunk_arm_callee1>
|
// CHECK-ABS-THUMB-NEXT: 1408: b.w 0x1420 <__Thumbv7ABSLongThunk_arm_callee1>
|
||||||
// CHECK-ABS-THUMB-NEXT: 140c: 00 f0 0d b8 b.w 0x142a <__Thumbv7ABSLongThunk_arm_callee2>
|
// CHECK-ABS-THUMB-NEXT: 140c: b.w 0x142a <__Thumbv7ABSLongThunk_arm_callee2>
|
||||||
// CHECK-ABS-THUMB-NEXT: 1410: 00 f0 10 b8 b.w 0x1434 <__Thumbv7ABSLongThunk_arm_callee3>
|
// CHECK-ABS-THUMB-NEXT: 1410: b.w 0x1434 <__Thumbv7ABSLongThunk_arm_callee3>
|
||||||
// CHECK-ABS-THUMB-NEXT: 1414: 00 f0 04 80 beq.w 0x1420 <__Thumbv7ABSLongThunk_arm_callee1>
|
// CHECK-ABS-THUMB-NEXT: 1414: beq.w 0x1420 <__Thumbv7ABSLongThunk_arm_callee1>
|
||||||
// CHECK-ABS-THUMB-NEXT: 1418: 00 f0 07 80 beq.w 0x142a <__Thumbv7ABSLongThunk_arm_callee2>
|
// CHECK-ABS-THUMB-NEXT: 1418: beq.w 0x142a <__Thumbv7ABSLongThunk_arm_callee2>
|
||||||
// CHECK-ABS-THUMB-NEXT: 141c: 40 f0 0a 80 bne.w 0x1434 <__Thumbv7ABSLongThunk_arm_callee3>
|
// CHECK-ABS-THUMB-NEXT: 141c: bne.w 0x1434 <__Thumbv7ABSLongThunk_arm_callee3>
|
||||||
// CHECK-ABS-THUMB: <__Thumbv7ABSLongThunk_arm_callee1>:
|
// CHECK-ABS-THUMB: <__Thumbv7ABSLongThunk_arm_callee1>:
|
||||||
// 0x1100 = arm_callee1
|
// CHECK-ABS-THUMB-NEXT: 1420: movw r12, #4352
|
||||||
// CHECK-ABS-THUMB-NEXT: 1420: 41 f2 00 1c movw r12, #4352
|
// CHECK-ABS-THUMB-NEXT: 1424: movt r12, #0
|
||||||
// CHECK-ABS-THUMB-NEXT: 1424: c0 f2 00 0c movt r12, #0
|
// CHECK-ABS-THUMB-NEXT: 1428: bx r12
|
||||||
// CHECK-ABS-THUMB-NEXT: 1428: 60 47 bx r12
|
|
||||||
// CHECK-ABS-THUMB: <__Thumbv7ABSLongThunk_arm_callee2>:
|
// CHECK-ABS-THUMB: <__Thumbv7ABSLongThunk_arm_callee2>:
|
||||||
// 0x1600 = arm_callee2
|
// CHECK-ABS-THUMB-NEXT: 142a: movw r12, #5632
|
||||||
// CHECK-ABS-THUMB-NEXT: 142a: 41 f2 00 6c movw r12, #5632
|
// CHECK-ABS-THUMB-NEXT: 142e: movt r12, #0
|
||||||
// CHECK-ABS-THUMB-NEXT: 142e: c0 f2 00 0c movt r12, #0
|
// CHECK-ABS-THUMB-NEXT: 1432: bx r12
|
||||||
// CHECK-ABS-THUMB-NEXT: 1432: 60 47 bx r12
|
|
||||||
// 0x1604 = arm_callee3
|
|
||||||
// CHECK-ABS-THUMB: <__Thumbv7ABSLongThunk_arm_callee3>:
|
// CHECK-ABS-THUMB: <__Thumbv7ABSLongThunk_arm_callee3>:
|
||||||
// CHECK-ABS-THUMB-NEXT: 1434: 41 f2 04 6c movw r12, #5636
|
// CHECK-ABS-THUMB-NEXT: 1434: movw r12, #5636
|
||||||
// CHECK-ABS-THUMB-NEXT: 1438: c0 f2 00 0c movt r12, #0
|
// CHECK-ABS-THUMB-NEXT: 1438: movt r12, #0
|
||||||
// CHECK-ABS-THUMB-NEXT: 143c: 60 47 bx r12
|
// CHECK-ABS-THUMB-NEXT: 143c: bx r12
|
||||||
|
|
||||||
// CHECK-PI-THUMB: Disassembly of section .thumb_caller:
|
// CHECK-PI-THUMB: Disassembly of section .thumb_caller:
|
||||||
// CHECK-PI-THUMB-EMPTY:
|
// CHECK-PI-THUMB-EMPTY:
|
||||||
// CHECK-PI-THUMB-NEXT: <thumb_caller>:
|
// CHECK-PI-THUMB-NEXT: <thumb_caller>:
|
||||||
// CHECK-PI-THUMB-NEXT: 1400: ff f7 7e ee blx 0x1100 <arm_callee1>
|
// CHECK-PI-THUMB-NEXT: 1400: blx 0x1100 <arm_callee1>
|
||||||
// CHECK-PI-THUMB-NEXT: 1404: ff f7 7c ee blx 0x1100 <arm_callee1>
|
// CHECK-PI-THUMB-NEXT: 1404: blx 0x1100 <arm_callee1>
|
||||||
// CHECK-PI-THUMB-NEXT: 1408: 00 f0 0a b8 b.w 0x1420 <__ThumbV7PILongThunk_arm_callee1>
|
// CHECK-PI-THUMB-NEXT: 1408: b.w 0x1420 <__ThumbV7PILongThunk_arm_callee1>
|
||||||
// CHECK-PI-THUMB-NEXT: 140c: 00 f0 0e b8 b.w 0x142c <__ThumbV7PILongThunk_arm_callee2>
|
// CHECK-PI-THUMB-NEXT: 140c: b.w 0x142c <__ThumbV7PILongThunk_arm_callee2>
|
||||||
// CHECK-PI-THUMB-NEXT: 1410: 00 f0 12 b8 b.w 0x1438 <__ThumbV7PILongThunk_arm_callee3>
|
// CHECK-PI-THUMB-NEXT: 1410: b.w 0x1438 <__ThumbV7PILongThunk_arm_callee3>
|
||||||
// CHECK-PI-THUMB-NEXT: 1414: 00 f0 04 80 beq.w 0x1420 <__ThumbV7PILongThunk_arm_callee1>
|
// CHECK-PI-THUMB-NEXT: 1414: beq.w 0x1420 <__ThumbV7PILongThunk_arm_callee1>
|
||||||
// CHECK-PI-THUMB-NEXT: 1418: 00 f0 08 80 beq.w 0x142c <__ThumbV7PILongThunk_arm_callee2>
|
// CHECK-PI-THUMB-NEXT: 1418: beq.w 0x142c <__ThumbV7PILongThunk_arm_callee2>
|
||||||
// CHECK-PI-THUMB-NEXT: 141c: 40 f0 0c 80 bne.w 0x1438 <__ThumbV7PILongThunk_arm_callee3>
|
// CHECK-PI-THUMB-NEXT: 141c: bne.w 0x1438 <__ThumbV7PILongThunk_arm_callee3>
|
||||||
// CHECK-PI-THUMB: <__ThumbV7PILongThunk_arm_callee1>:
|
// CHECK-PI-THUMB: <__ThumbV7PILongThunk_arm_callee1>:
|
||||||
// 0x1428 + 4 - 0x32c = 0x1100 = arm_callee1
|
// CHECK-PI-THUMB-NEXT: 1420: movw r12, #64724
|
||||||
// CHECK-PI-THUMB-NEXT: 1420: 4f f6 d4 4c movw r12, #64724
|
// CHECK-PI-THUMB-NEXT: 1424: movt r12, #65535
|
||||||
// CHECK-PI-THUMB-NEXT: 1424: cf f6 ff 7c movt r12, #65535
|
// CHECK-PI-THUMB-NEXT: 1428: add r12, pc
|
||||||
// CHECK-PI-THUMB-NEXT: 1428: fc 44 add r12, pc
|
// CHECK-PI-THUMB-NEXT: 142a: bx r12
|
||||||
// CHECK-PI-THUMB-NEXT: 142a: 60 47 bx r12
|
|
||||||
// CHECK-PI-THUMB: <__ThumbV7PILongThunk_arm_callee2>:
|
// CHECK-PI-THUMB: <__ThumbV7PILongThunk_arm_callee2>:
|
||||||
// 0x1434 + 4 + 0x1c8 = 0x1600 = arm_callee2
|
// CHECK-PI-THUMB-NEXT: 142c: movw r12, #456
|
||||||
// CHECK-PI-THUMB-NEXT: 142c: 40 f2 c8 1c movw r12, #456
|
// CHECK-PI-THUMB-NEXT: 1430: movt r12, #0
|
||||||
// CHECK-PI-THUMB-NEXT: 1430: c0 f2 00 0c movt r12, #0
|
// CHECK-PI-THUMB-NEXT: 1434: add r12, pc
|
||||||
// CHECK-PI-THUMB-NEXT: 1434: fc 44 add r12, pc
|
// CHECK-PI-THUMB-NEXT: 1436: bx r12
|
||||||
// CHECK-PI-THUMB-NEXT: 1436: 60 47 bx r12
|
|
||||||
// CHECK-PI-THUMB: <__ThumbV7PILongThunk_arm_callee3>:
|
// CHECK-PI-THUMB: <__ThumbV7PILongThunk_arm_callee3>:
|
||||||
// 0x1440 + 4 + 0x1c0 = 0x1604 = arm_callee3
|
// CHECK-PI-THUMB-NEXT: 1438: movw r12, #448
|
||||||
// CHECK-PI-THUMB-NEXT: 1438: 40 f2 c0 1c movw r12, #448
|
// CHECK-PI-THUMB-NEXT: 143c: movt r12, #0
|
||||||
// CHECK-PI-THUMB-NEXT: 143c: c0 f2 00 0c movt r12, #0
|
// CHECK-PI-THUMB-NEXT: 1440: add r12, pc
|
||||||
// CHECK-PI-THUMB-NEXT: 1440: fc 44 add r12, pc
|
// CHECK-PI-THUMB-NEXT: 1442: bx r12
|
||||||
// CHECK-PI-THUMB-NEXT: 1442: 60 47 bx r12
|
|
||||||
|
|
||||||
// CHECK-PI-THUMB-PLT: Disassembly of section .arm_caller:
|
/// Thumb calls need to change state to reach PLT
|
||||||
// CHECK-PI-THUMB-PLT-EMPTY:
|
/// bl can change to blx to PLT entries, branches
|
||||||
// CHECK-PI-THUMB-PLT-NEXT: thumb_caller:
|
/// need a state change thunk.
|
||||||
// 0x1400 + 4 + 0x410 = 0x1814 = PLT(arm_callee1)
|
// CHECK-ARM-PLT: Disassembly of section .thumb_caller:
|
||||||
// CHECK-PI-THUMB-PLT-NEXT: 1400: 00 f0 08 ea blx #1040
|
// CHECK-ARM-PLT-EMPTY:
|
||||||
// 0x1404 + 4 + 0x40c = 0x1814 = PLT(arm_callee1)
|
// CHECK-ARM-PLT-NEXT: <thumb_caller>:
|
||||||
// CHECK-PI-THUMB-PLT-NEXT: 1404: 00 f0 06 ea blx #1036
|
// CHECK-ARM-PLT-NEXT: 1400: blx 0x1680
|
||||||
// 0x1408 + 4 + 0x14 = 0x1420 = IWV(PLT(arm_callee1)
|
// CHECK-ARM-PLT-NEXT: 1404: blx 0x1680
|
||||||
// CHECK-PI-THUMB-PLT-NEXT: 1408: 00 f0 0a b8 b.w #20
|
// CHECK-ARM-PLT-NEXT: 1408: b.w 0x1420 <__ThumbV7PILongThunk_arm_callee1>
|
||||||
// 0x140c + 4 + 0x1c = 0x142c = IWV(PLT(arm_callee2)
|
// CHECK-ARM-PLT-NEXT: 140c: b.w 0x142c <__ThumbV7PILongThunk_arm_callee2>
|
||||||
// CHECK-PI-THUMB-PLT-NEXT: 140c: 00 f0 0e b8 b.w #28
|
// CHECK-ARM-PLT-NEXT: 1410: b.w 0x1438 <__ThumbV7PILongThunk_arm_callee3>
|
||||||
// 0x1410 + 4 + 0x24 = 0x1438 = IWV(PLT(arm_callee3)
|
// CHECK-ARM-PLT-NEXT: 1414: beq.w 0x1420 <__ThumbV7PILongThunk_arm_callee1>
|
||||||
// CHECK-PI-THUMB-PLT-NEXT: 1410: 00 f0 12 b8 b.w #36
|
// CHECK-ARM-PLT-NEXT: 1418: beq.w 0x142c <__ThumbV7PILongThunk_arm_callee2>
|
||||||
// 0x1414 + 4 + 8 = 0x1420 = IWV(PLT(arm_callee1)
|
// CHECK-ARM-PLT-NEXT: 141c: bne.w 0x1438 <__ThumbV7PILongThunk_arm_callee3>
|
||||||
// CHECK-PI-THUMB-PLT-NEXT: 1414: 00 f0 04 80 beq.w #8
|
|
||||||
// 0x1418 + 4 + 0x10 = 0x142c = IWV(PLT(arm_callee2)
|
|
||||||
// CHECK-PI-THUMB-PLT-NEXT: 1418: 00 f0 08 80 beq.w #16
|
|
||||||
// 0x141c + 4 + 0x18 = 0x1438 = IWV(PLT(arm_callee3)
|
|
||||||
// CHECK-PI-THUMB-PLT-NEXT: 141c: 40 f0 0c 80 bne.w #24
|
|
||||||
// 0x1428 + 4 + 0x3e8 = 0x1814 = PLT(arm_callee1)
|
|
||||||
// CHECK-PI-THUMB-PLT-NEXT: 1420: 40 f2 e8 3c movw r12, #1000
|
|
||||||
// CHECK-PI-THUMB-PLT-NEXT: 1424: c0 f2 00 0c movt r12, #0
|
|
||||||
// CHECK-PI-THUMB-PLT-NEXT: 1428: fc 44 add r12, pc
|
|
||||||
// CHECK-PI-THUMB-PLT-NEXT: 142a: 60 47 bx r12
|
|
||||||
// 0x1434 + 4 + 0x3ec = 0x1824 = PLT(arm_callee2)
|
|
||||||
// CHECK-PI-THUMB-PLT-NEXT: 142c: 40 f2 ec 3c movw r12, #1004
|
|
||||||
// CHECK-PI-THUMB-PLT-NEXT: 1430: c0 f2 00 0c movt r12, #0
|
|
||||||
// CHECK-PI-THUMB-PLT-NEXT: 1434: fc 44 add r12, pc
|
|
||||||
// CHECK-PI-THUMB-PLT-NEXT: 1436: 60 47 bx r12
|
|
||||||
// 0x1440 + 4 + 0x3f0 = 0x1834 = PLT(arm_callee3)
|
|
||||||
// CHECK-PI-THUMB-PLT-NEXT: 1438: 40 f2 f0 3c movw r12, #1008
|
|
||||||
// CHECK-PI-THUMB-PLT-NEXT: 143c: c0 f2 00 0c movt r12, #0
|
|
||||||
// CHECK-PI-THUMB-PLT-NEXT: 1440: fc 44 add r12, pc
|
|
||||||
// CHECK-PI-THUMB-PLT-NEXT: 1442: 60 47 bx r12
|
|
||||||
|
|
||||||
// Target Sections for thunks at a higher address than the callers.
|
/// Target Sections for thunks at a higher address than the callers.
|
||||||
.section .R_ARM_JUMP24_callee_high, "ax", %progbits
|
.section .R_ARM_JUMP24_callee_high, "ax", %progbits
|
||||||
.thumb
|
.thumb
|
||||||
.balign 0x100
|
.balign 0x100
|
||||||
|
|
@ -293,9 +254,9 @@ thumb_callee3:
|
||||||
// CHECK-THUMB: Disassembly of section .R_ARM_JUMP24_callee_2:
|
// CHECK-THUMB: Disassembly of section .R_ARM_JUMP24_callee_2:
|
||||||
// CHECK-THUMB-EMPTY:
|
// CHECK-THUMB-EMPTY:
|
||||||
// CHECK-THUMB-NEXT: <thumb_callee2>:
|
// CHECK-THUMB-NEXT: <thumb_callee2>:
|
||||||
// CHECK-THUMB-NEXT: 1500: 70 47 bx lr
|
// CHECK-THUMB-NEXT: 1500: bx lr
|
||||||
// CHECK-THUMB: <thumb_callee3>:
|
// CHECK-THUMB: <thumb_callee3>:
|
||||||
// CHECK-THUMB-NEXT: 1502: 70 47 bx lr
|
// CHECK-THUMB-NEXT: 1502: bx lr
|
||||||
|
|
||||||
.section .R_ARM_THM_JUMP_callee_high, "ax", %progbits
|
.section .R_ARM_THM_JUMP_callee_high, "ax", %progbits
|
||||||
.arm
|
.arm
|
||||||
|
|
@ -311,11 +272,11 @@ arm_callee3:
|
||||||
// CHECK-ARM: Disassembly of section .R_ARM_THM_JUMP_callee_2:
|
// CHECK-ARM: Disassembly of section .R_ARM_THM_JUMP_callee_2:
|
||||||
// CHECK-ARM-EMPTY:
|
// CHECK-ARM-EMPTY:
|
||||||
// CHECK-ARM-NEXT: <arm_callee2>:
|
// CHECK-ARM-NEXT: <arm_callee2>:
|
||||||
// CHECK-ARM-NEXT: 1600: 1e ff 2f e1 bx lr
|
// CHECK-ARM-NEXT: 1600: bx lr
|
||||||
// CHECK-ARM: <arm_callee3>:
|
// CHECK-ARM: <arm_callee3>:
|
||||||
// CHECK-ARM-NEXT: 1604: 1e ff 2f e1 bx lr
|
// CHECK-ARM-NEXT: 1604: bx lr
|
||||||
|
|
||||||
// _start section just calls the arm and thumb calling sections
|
/// _start section just calls the arm and thumb calling sections
|
||||||
.text
|
.text
|
||||||
.arm
|
.arm
|
||||||
.globl _start
|
.globl _start
|
||||||
|
|
@ -326,55 +287,83 @@ _start:
|
||||||
bl thumb_caller
|
bl thumb_caller
|
||||||
bx lr
|
bx lr
|
||||||
|
|
||||||
|
// CHECK-ARM-PLT: Disassembly of section .plt:
|
||||||
// CHECK-PI-ARM-PLT: Disassembly of section .plt:
|
// CHECK-ARM-PLT-EMPTY:
|
||||||
// CHECK-PI-ARM-PLT-EMPTY:
|
// CHECK-ARM-PLT-NEXT: 00001610 <$a>:
|
||||||
// CHECK-PI-ARM-PLT-NEXT: .plt:
|
// CHECK-ARM-PLT-NEXT: 1610: str lr, [sp, #-4]!
|
||||||
// CHECK-PI-ARM-PLT-NEXT: 17b0: 04 e0 2d e5 str lr, [sp, #-4]!
|
// CHECK-ARM-PLT-NEXT: 1614: add lr, pc, #0, #12
|
||||||
// CHECK-PI-ARM-PLT-NEXT: 17b4: 04 e0 9f e5 ldr lr, [pc, #4]
|
// CHECK-ARM-PLT-NEXT: 1618: add lr, lr, #0, #20
|
||||||
// CHECK-PI-ARM-PLT-NEXT: 17b8: 0e e0 8f e0 add lr, pc, lr
|
// CHECK-ARM-PLT-NEXT: 161c: ldr pc, [lr, #672]!
|
||||||
// CHECK-PI-ARM-PLT-NEXT: 17bc: 08 f0 be e5 ldr pc, [lr, #8]!
|
// CHECK-ARM-PLT-EMPTY:
|
||||||
// CHECK-PI-ARM-PLT-NEXT: 17c0: d4 00 00 00
|
// CHECK-ARM-PLT-NEXT: 00001620 <$d>:
|
||||||
// 0x17c8 + 8 + 0xd0 = 0x18a0 arm_caller
|
// CHECK-ARM-PLT-NEXT: 1620: d4 d4 d4 d4 .word 0xd4d4d4d4
|
||||||
// CHECK-PI-ARM-PLT-NEXT: 17c4: 04 c0 9f e5 ldr r12, [pc, #4]
|
// CHECK-ARM-PLT-NEXT: 1624: d4 d4 d4 d4 .word 0xd4d4d4d4
|
||||||
// CHECK-PI-ARM-PLT-NEXT: 17c8: 0f c0 8c e0 add r12, r12, pc
|
// CHECK-ARM-PLT-NEXT: 1628: d4 d4 d4 d4 .word 0xd4d4d4d4
|
||||||
// CHECK-PI-ARM-PLT-NEXT: 17cc: 00 f0 9c e5 ldr pc, [r12]
|
// CHECK-ARM-PLT-NEXT: 162c: d4 d4 d4 d4 .word 0xd4d4d4d4
|
||||||
// CHECK-PI-ARM-PLT-NEXT: 17d0: d0 00 00 00
|
// CHECK-ARM-PLT-EMPTY:
|
||||||
// 0x17d8 + 8 + 0xc4 = 0x18a4 thumb_caller
|
// CHECK-ARM-PLT-NEXT: 00001630 <$a>:
|
||||||
// CHECK-PI-ARM-PLT-NEXT: 17d4: 04 c0 9f e5 ldr r12, [pc, #4]
|
// CHECK-ARM-PLT-NEXT: 1630: add r12, pc, #0, #12
|
||||||
// CHECK-PI-ARM-PLT-NEXT: 17d8: 0f c0 8c e0 add r12, r12, pc
|
// CHECK-ARM-PLT-NEXT: 1634: add r12, r12, #0, #20
|
||||||
// CHECK-PI-ARM-PLT-NEXT: 17dc: 00 f0 9c e5 ldr pc, [r12]
|
// CHECK-ARM-PLT-NEXT: 1638: ldr pc, [r12, #648]!
|
||||||
// CHECK-PI-ARM-PLT-NEXT: 17e0: c4 00 00 00
|
// CHECK-ARM-PLT-EMPTY:
|
||||||
// 0x17e8 + 8 + 0xb8 = 0x18a8 thumb_callee1
|
// CHECK-ARM-PLT-NEXT: 0000163c <$d>:
|
||||||
// CHECK-PI-ARM-PLT-NEXT: 17e4: 04 c0 9f e5 ldr r12, [pc, #4]
|
// CHECK-ARM-PLT-NEXT: 163c: d4 d4 d4 d4 .word 0xd4d4d4d4
|
||||||
// CHECK-PI-ARM-PLT-NEXT: 17e8: 0f c0 8c e0 add r12, r12, pc
|
// CHECK-ARM-PLT-EMPTY:
|
||||||
// CHECK-PI-ARM-PLT-NEXT: 17ec: 00 f0 9c e5 ldr pc, [r12]
|
// CHECK-ARM-PLT-NEXT: 00001640 <$a>:
|
||||||
// CHECK-PI-ARM-PLT-NEXT: 17f0: b8 00 00 00
|
// CHECK-ARM-PLT-NEXT: 1640: add r12, pc, #0, #12
|
||||||
// 0x17f8 + 8 + 0xac = 0x18ac thumb_callee2
|
// CHECK-ARM-PLT-NEXT: 1644: add r12, r12, #0, #20
|
||||||
// CHECK-PI-ARM-PLT-NEXT: 17f4: 04 c0 9f e5 ldr r12, [pc, #4]
|
// CHECK-ARM-PLT-NEXT: 1648: ldr pc, [r12, #636]!
|
||||||
// CHECK-PI-ARM-PLT-NEXT: 17f8: 0f c0 8c e0 add r12, r12, pc
|
// CHECK-ARM-PLT-EMPTY:
|
||||||
// CHECK-PI-ARM-PLT-NEXT: 17fc: 00 f0 9c e5 ldr pc, [r12]
|
// CHECK-ARM-PLT-NEXT: 0000164c <$d>:
|
||||||
// CHECK-PI-ARM-PLT-NEXT: 1800: ac 00 00 00
|
// CHECK-ARM-PLT-NEXT: 164c: d4 d4 d4 d4 .word 0xd4d4d4d4
|
||||||
// 0x1808 + 8 + 0xa0 = 0x18b0 thumb_callee3
|
// CHECK-ARM-PLT-EMPTY:
|
||||||
// CHECK-PI-ARM-PLT-NEXT: 1804: 04 c0 9f e5 ldr r12, [pc, #4]
|
// CHECK-ARM-PLT-NEXT: 00001650 <$a>:
|
||||||
// CHECK-PI-ARM-PLT-NEXT: 1808: 0f c0 8c e0 add r12, r12, pc
|
// CHECK-ARM-PLT-NEXT: 1650: add r12, pc, #0, #12
|
||||||
// CHECK-PI-ARM-PLT-NEXT: 180c: 00 f0 9c e5 ldr pc, [r12]
|
// CHECK-ARM-PLT-NEXT: 1654: add r12, r12, #0, #20
|
||||||
// CHECK-PI-ARM-PLT-NEXT: 1810: a0 00 00 00
|
// CHECK-ARM-PLT-NEXT: 1658: ldr pc, [r12, #624]!
|
||||||
// 0x1818 + 8 + 0x94 = 0x18b4 arm_callee1
|
// CHECK-ARM-PLT-EMPTY:
|
||||||
// CHECK-PI-ARM-PLT-NEXT: 1814: 04 c0 9f e5 ldr r12, [pc, #4]
|
// CHECK-ARM-PLT-NEXT: 0000165c <$d>:
|
||||||
// CHECK-PI-ARM-PLT-NEXT: 1818: 0f c0 8c e0 add r12, r12, pc
|
// CHECK-ARM-PLT-NEXT: 165c: d4 d4 d4 d4 .word 0xd4d4d4d4
|
||||||
// CHECK-PI-ARM-PLT-NEXT: 181c: 00 f0 9c e5 ldr pc, [r12]
|
// CHECK-ARM-PLT-EMPTY:
|
||||||
// CHECK-PI-ARM-PLT-NEXT: 1820: 94 00 00 00
|
// CHECK-ARM-PLT-NEXT: 00001660 <$a>:
|
||||||
// 0x1828 + 8 + 0x88 = 0x18b8 arm_callee2
|
// CHECK-ARM-PLT-NEXT: 1660: add r12, pc, #0, #12
|
||||||
// CHECK-PI-ARM-PLT-NEXT: 1824: 04 c0 9f e5 ldr r12, [pc, #4]
|
// CHECK-ARM-PLT-NEXT: 1664: add r12, r12, #0, #20
|
||||||
// CHECK-PI-ARM-PLT-NEXT: 1828: 0f c0 8c e0 add r12, r12, pc
|
// CHECK-ARM-PLT-NEXT: 1668: ldr pc, [r12, #612]!
|
||||||
// CHECK-PI-ARM-PLT-NEXT: 182c: 00 f0 9c e5 ldr pc, [r12]
|
// CHECK-ARM-PLT-EMPTY:
|
||||||
// CHECK-PI-ARM-PLT-NEXT: 1830: 88 00 00 00
|
// CHECK-ARM-PLT-NEXT: 0000166c <$d>:
|
||||||
// 0x1838 + 8 + 0x7c = 0x18bc arm_callee3
|
// CHECK-ARM-PLT-NEXT: 166c: d4 d4 d4 d4 .word 0xd4d4d4d4
|
||||||
// CHECK-PI-ARM-PLT-NEXT: 1834: 04 c0 9f e5 ldr r12, [pc, #4]
|
// CHECK-ARM-PLT-EMPTY:
|
||||||
// CHECK-PI-ARM-PLT-NEXT: 1838: 0f c0 8c e0 add r12, r12, pc
|
// CHECK-ARM-PLT-NEXT: 00001670 <$a>:
|
||||||
// CHECK-PI-ARM-PLT-NEXT: 183c: 00 f0 9c e5 ldr pc, [r12]
|
// CHECK-ARM-PLT-NEXT: 1670: add r12, pc, #0, #12
|
||||||
// CHECK-PI-ARM-PLT-NEXT: 1840: 7c 00 00 00
|
// CHECK-ARM-PLT-NEXT: 1674: add r12, r12, #0, #20
|
||||||
|
// CHECK-ARM-PLT-NEXT: 1678: ldr pc, [r12, #600]!
|
||||||
|
// CHECK-ARM-PLT-EMPTY:
|
||||||
|
// CHECK-ARM-PLT-NEXT: 0000167c <$d>:
|
||||||
|
// CHECK-ARM-PLT-NEXT: 167c: d4 d4 d4 d4 .word 0xd4d4d4d4
|
||||||
|
// CHECK-ARM-PLT-EMPTY:
|
||||||
|
// CHECK-ARM-PLT-NEXT: 00001680 <$a>:
|
||||||
|
// CHECK-ARM-PLT-NEXT: 1680: add r12, pc, #0, #12
|
||||||
|
// CHECK-ARM-PLT-NEXT: 1684: add r12, r12, #0, #20
|
||||||
|
// CHECK-ARM-PLT-NEXT: 1688: ldr pc, [r12, #588]!
|
||||||
|
// CHECK-ARM-PLT-EMPTY:
|
||||||
|
// CHECK-ARM-PLT-NEXT: 0000168c <$d>:
|
||||||
|
// CHECK-ARM-PLT-NEXT: 168c: d4 d4 d4 d4 .word 0xd4d4d4d4
|
||||||
|
// CHECK-ARM-PLT-EMPTY:
|
||||||
|
// CHECK-ARM-PLT-NEXT: 00001690 <$a>:
|
||||||
|
// CHECK-ARM-PLT-NEXT: 1690: add r12, pc, #0, #12
|
||||||
|
// CHECK-ARM-PLT-NEXT: 1694: add r12, r12, #0, #20
|
||||||
|
// CHECK-ARM-PLT-NEXT: 1698: ldr pc, [r12, #576]!
|
||||||
|
// CHECK-ARM-PLT-EMPTY:
|
||||||
|
// CHECK-ARM-PLT-NEXT: 0000169c <$d>:
|
||||||
|
// CHECK-ARM-PLT-NEXT: 169c: d4 d4 d4 d4 .word 0xd4d4d4d4
|
||||||
|
// CHECK-ARM-PLT-EMPTY:
|
||||||
|
// CHECK-ARM-PLT-NEXT: 000016a0 <$a>:
|
||||||
|
// CHECK-ARM-PLT-NEXT: 16a0: add r12, pc, #0, #12
|
||||||
|
// CHECK-ARM-PLT-NEXT: 16a4: add r12, r12, #0, #20
|
||||||
|
// CHECK-ARM-PLT-NEXT: 16a8: ldr pc, [r12, #564]!
|
||||||
|
// CHECK-ARM-PLT-EMPTY:
|
||||||
|
// CHECK-ARM-PLT-NEXT: 000016ac <$d>:
|
||||||
|
// CHECK-ARM-PLT-NEXT: 16ac: d4 d4 d4 d4 .word 0xd4d4d4d4
|
||||||
|
|
||||||
// CHECK-DSO-REL: 0x18C0 R_ARM_JUMP_SLOT arm_caller
|
// CHECK-DSO-REL: 0x18C0 R_ARM_JUMP_SLOT arm_caller
|
||||||
// CHECK-DSO-REL-NEXT: 0x18C4 R_ARM_JUMP_SLOT thumb_caller
|
// CHECK-DSO-REL-NEXT: 0x18C4 R_ARM_JUMP_SLOT thumb_caller
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue