forked from OSchip/llvm-project
Revert 96634. It causes assertion failures for 126.gcc and 176.gcc in
the armv6 nightly tests. llvm-svn: 96691
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@ -587,17 +587,6 @@ public:
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return !hasFP(MF);
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}
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/// canSimplifyCallFramePseudos - When possible, it's best to simplify the
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/// call frame pseudo ops before doing frame index elimination. This is
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/// possible only when frame index references between the pseudos won't
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/// need adjusted for the call frame adjustments. Normally, that's true
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/// if the function has a reserved call frame or a frame pointer. Some
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/// targets (Thumb2, for example) may have more complicated criteria,
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/// however, and can override this behavior.
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virtual bool canSimplifyCallFramePseudos(MachineFunction &MF) const {
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return hasReservedCallFrame(MF) || hasFP(MF);
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}
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/// hasReservedSpillSlot - Return true if target has reserved a spill slot in
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/// the stack frame of the given function for the specified register. e.g. On
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/// x86, if the frame register is required, the first fixed stack object is
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@ -175,10 +175,9 @@ void PEI::calculateCallsInformation(MachineFunction &Fn) {
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MachineBasicBlock::iterator I = *i;
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// If call frames are not being included as part of the stack frame, and
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// the target doesn't indicate otherwise, remove the call frame pseudos
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// here. The sub/add sp instruction pairs are still inserted, but we don't
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// need to track the SP adjustment for frame index elimination.
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if (RegInfo->canSimplifyCallFramePseudos(Fn))
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// there is no dynamic allocation (therefore referencing frame slots off
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// sp), leave the pseudo ops alone. We'll eliminate them later.
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if (RegInfo->hasReservedCallFrame(Fn) || RegInfo->hasFP(Fn))
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RegInfo->eliminateCallFramePseudoInstr(Fn, *I->getParent(), I);
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}
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}
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@ -1085,16 +1085,6 @@ hasReservedCallFrame(MachineFunction &MF) const {
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return !MF.getFrameInfo()->hasVarSizedObjects();
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}
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// canSimplifyCallFramePseudos - If there is a reserved call frame, the
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// call frame pseudos can be simplified. Unlike most targets, having a FP
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// is not sufficient here since we still may reference some objects via SP
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// even when FP is available in Thumb2 mode.
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bool ARMBaseRegisterInfo::
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canSimplifyCallFramePseudos(MachineFunction &MF) const {
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ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
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return hasReservedCallFrame(MF) || (AFI->isThumb1OnlyFunction() && hasFP(MF));
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}
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static void
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emitSPUpdate(bool isARM,
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MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI,
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@ -1159,6 +1149,7 @@ ARMBaseRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
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MachineInstr &MI = *II;
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MachineBasicBlock &MBB = *MI.getParent();
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MachineFunction &MF = *MBB.getParent();
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const MachineFrameInfo *MFI = MF.getFrameInfo();
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ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
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assert(!AFI->isThumb1OnlyFunction() &&
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"This eliminateFrameIndex does not support Thumb1!");
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@ -1169,12 +1160,12 @@ ARMBaseRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
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}
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int FrameIndex = MI.getOperand(i).getIndex();
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int Offset = MFI->getObjectOffset(FrameIndex) + MFI->getStackSize() + SPAdj;
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unsigned FrameReg;
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int Offset = getFrameIndexReference(MF, FrameIndex, FrameReg);
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Offset = getFrameIndexReference(MF, FrameIndex, FrameReg);
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if (FrameReg != ARM::SP)
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SPAdj = 0;
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Offset += SPAdj;
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// Modify MI as necessary to handle as much of 'Offset' as possible
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bool Done = false;
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@ -138,7 +138,6 @@ public:
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virtual bool requiresFrameIndexScavenging(const MachineFunction &MF) const;
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virtual bool hasReservedCallFrame(MachineFunction &MF) const;
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virtual bool canSimplifyCallFramePseudos(MachineFunction &MF) const;
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virtual void eliminateCallFramePseudoInstr(MachineFunction &MF,
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MachineBasicBlock &MBB,
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