forked from OSchip/llvm-project
[HLSL] Mark buffer subscript operators as AlwaysInline
HLSL requires aggressive inlineing for resource accesses. This just enforces that we get resource handle accesses inlined early.
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@ -270,6 +270,9 @@ struct BuiltinTypeDeclBuilder {
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SourceLocation()));
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MethodDecl->setLexicalDeclContext(Record);
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MethodDecl->setAccess(AccessSpecifier::AS_public);
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MethodDecl->addAttr(AlwaysInlineAttr::CreateImplicit(
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AST, SourceRange(), AttributeCommonInfo::AS_Keyword,
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AlwaysInlineAttr::CXX11_clang_always_inline));
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Record->addDecl(MethodDecl);
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return *this;
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@ -49,6 +49,7 @@ RWBuffer<float> Buffer;
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// CHECK-NEXT: MemberExpr 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> 'element_type *' lvalue ->h 0x{{[0-9A-Fa-f]+}}
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// CHECK-NEXT: CXXThisExpr 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> 'const RWBuffer<element_type> *' implicit this
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// CHECK-NEXT: DeclRefExpr 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> 'unsigned int' ParmVar 0x{{[0-9A-Fa-f]+}} 'Idx' 'unsigned int'
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// CHECK-NEXT: AlwaysInlineAttr 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> Implicit always_inline
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// CHECK-NEXT: CXXMethodDecl 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> <invalid sloc> operator[] 'element_type &(unsigned int)'
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// CHECK-NEXT: ParmVarDecl 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> <invalid sloc> Idx 'unsigned int'
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@ -58,6 +59,7 @@ RWBuffer<float> Buffer;
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// CHECK-NEXT: MemberExpr 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> 'element_type *' lvalue ->h 0x{{[0-9A-Fa-f]+}}
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// CHECK-NEXT: CXXThisExpr 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> 'RWBuffer<element_type> *' implicit this
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// CHECK-NEXT: DeclRefExpr 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> 'unsigned int' ParmVar 0x{{[0-9A-Fa-f]+}} 'Idx' 'unsigned int'
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// CHECK-NEXT: AlwaysInlineAttr 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> Implicit always_inline
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// CHECK: ClassTemplateSpecializationDecl 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> <invalid sloc> class RWBuffer definition
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