forked from OSchip/llvm-project
InstCombine: Propagate exact for (sdiv X, Pow2) -> (udiv X, Pow2)
llvm-svn: 222625
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@ -1102,12 +1102,14 @@ Instruction *InstCombiner::visitSDiv(BinaryOperator &I) {
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return BO;
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return BO;
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}
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}
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if (match(Op1, m_Shl(m_Power2(), m_Value()))) {
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if (isKnownToBeAPowerOfTwo(Op1, /*OrZero*/true, 0, AT, &I, DT)) {
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// X sdiv (1 << Y) -> X udiv (1 << Y) ( -> X u>> Y)
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// X sdiv (1 << Y) -> X udiv (1 << Y) ( -> X u>> Y)
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// Safe because the only negative value (1 << Y) can take on is
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// Safe because the only negative value (1 << Y) can take on is
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// INT_MIN, and X sdiv INT_MIN == X udiv INT_MIN == 0 if X doesn't have
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// INT_MIN, and X sdiv INT_MIN == X udiv INT_MIN == 0 if X doesn't have
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// the sign bit set.
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// the sign bit set.
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return BinaryOperator::CreateUDiv(Op0, Op1, I.getName());
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auto *BO = BinaryOperator::CreateUDiv(Op0, Op1, I.getName());
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BO->setIsExact(I.isExact());
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return BO;
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}
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}
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}
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}
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}
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}
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@ -314,3 +314,14 @@ define i32 @test35(i32 %A) {
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; CHECK-NEXT: %[[udiv:.*]] = udiv exact i32 %[[and]], 2147483647
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; CHECK-NEXT: %[[udiv:.*]] = udiv exact i32 %[[and]], 2147483647
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; CHECK-NEXT: ret i32 %[[udiv]]
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; CHECK-NEXT: ret i32 %[[udiv]]
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}
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}
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define i32 @test36(i32 %A) {
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%and = and i32 %A, 2147483647
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%shl = shl nsw i32 1, %A
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%mul = sdiv exact i32 %and, %shl
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ret i32 %mul
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; CHECK-LABEL: @test36(
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; CHECK-NEXT: %[[and:.*]] = and i32 %A, 2147483647
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; CHECK-NEXT: %[[shr:.*]] = lshr exact i32 %[[and]], %A
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; CHECK-NEXT: ret i32 %[[shr]]
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}
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