From fb3805576b3b2907cbd0c425656d93d4eaed729f Mon Sep 17 00:00:00 2001 From: David Majnemer Date: Sat, 22 Nov 2014 20:00:41 +0000 Subject: [PATCH] InstCombine: Propagate exact for (sdiv X, Pow2) -> (udiv X, Pow2) llvm-svn: 222625 --- .../Transforms/InstCombine/InstCombineMulDivRem.cpp | 6 ++++-- llvm/test/Transforms/InstCombine/div.ll | 11 +++++++++++ 2 files changed, 15 insertions(+), 2 deletions(-) diff --git a/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp b/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp index 216177ff2b42..d7847ca5ccdf 100644 --- a/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp +++ b/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp @@ -1102,12 +1102,14 @@ Instruction *InstCombiner::visitSDiv(BinaryOperator &I) { return BO; } - if (match(Op1, m_Shl(m_Power2(), m_Value()))) { + if (isKnownToBeAPowerOfTwo(Op1, /*OrZero*/true, 0, AT, &I, DT)) { // X sdiv (1 << Y) -> X udiv (1 << Y) ( -> X u>> Y) // Safe because the only negative value (1 << Y) can take on is // INT_MIN, and X sdiv INT_MIN == X udiv INT_MIN == 0 if X doesn't have // the sign bit set. - return BinaryOperator::CreateUDiv(Op0, Op1, I.getName()); + auto *BO = BinaryOperator::CreateUDiv(Op0, Op1, I.getName()); + BO->setIsExact(I.isExact()); + return BO; } } } diff --git a/llvm/test/Transforms/InstCombine/div.ll b/llvm/test/Transforms/InstCombine/div.ll index cfe346e1f2b2..e0ff07baae7c 100644 --- a/llvm/test/Transforms/InstCombine/div.ll +++ b/llvm/test/Transforms/InstCombine/div.ll @@ -314,3 +314,14 @@ define i32 @test35(i32 %A) { ; CHECK-NEXT: %[[udiv:.*]] = udiv exact i32 %[[and]], 2147483647 ; CHECK-NEXT: ret i32 %[[udiv]] } + +define i32 @test36(i32 %A) { + %and = and i32 %A, 2147483647 + %shl = shl nsw i32 1, %A + %mul = sdiv exact i32 %and, %shl + ret i32 %mul +; CHECK-LABEL: @test36( +; CHECK-NEXT: %[[and:.*]] = and i32 %A, 2147483647 +; CHECK-NEXT: %[[shr:.*]] = lshr exact i32 %[[and]], %A +; CHECK-NEXT: ret i32 %[[shr]] +}