From fb2bb6fad4d477f5be5f110a640508e5ccde8089 Mon Sep 17 00:00:00 2001 From: "Kazushi (Jam) Marukawa" Date: Sun, 18 Oct 2020 02:30:28 +0900 Subject: [PATCH] [VE] Add cast to/from fp128 patterns Add cast to/from fp128 patterns. Clean other cast patterns too. Update a regression test by adding missing tests. Reviewed By: simoll Differential Revision: https://reviews.llvm.org/D89682 --- llvm/lib/Target/VE/VEInstrInfo.td | 34 ++- llvm/test/CodeGen/VE/cast.ll | 452 ++++++++++++++++++++++++++---- 2 files changed, 415 insertions(+), 71 deletions(-) diff --git a/llvm/lib/Target/VE/VEInstrInfo.td b/llvm/lib/Target/VE/VEInstrInfo.td index 415428e08d94..4eee79aca9fe 100644 --- a/llvm/lib/Target/VE/VEInstrInfo.td +++ b/llvm/lib/Target/VE/VEInstrInfo.td @@ -1358,17 +1358,17 @@ defm CVTDL : CVTm<"cvt.d.l", 0x5F, I64, f64, I64, i64, sint_to_fp>; // Section 8.7.15 - CVS (Convert to Single-format) defm CVTSD : CVTm<"cvt.s.d", 0x1F, F32, f32, I64, f64, fpround>; let cx = 1 in -defm CVTSQ : CVTm<"cvt.s.q", 0x1F, F32, f32, F128, f128>; +defm CVTSQ : CVTm<"cvt.s.q", 0x1F, F32, f32, F128, f128, fpround>; // Section 8.7.16 - CVD (Convert to Double-format) defm CVTDS : CVTm<"cvt.d.s", 0x0F, I64, f64, F32, f32, fpextend>; let cx = 1 in -defm CVTDQ : CVTm<"cvt.d.q", 0x0F, I64, f64, F128, f128>; +defm CVTDQ : CVTm<"cvt.d.q", 0x0F, I64, f64, F128, f128, fpround>; // Section 8.7.17 - CVQ (Convert to Single-format) -defm CVTQD : CVTm<"cvt.q.d", 0x2D, F128, f128, I64, f64>; +defm CVTQD : CVTm<"cvt.q.d", 0x2D, F128, f128, I64, f64, fpextend>; let cx = 1 in -defm CVTQS : CVTm<"cvt.q.s", 0x2D, F128, f128, F32, f32>; +defm CVTQS : CVTm<"cvt.q.s", 0x2D, F128, f128, F32, f32, fpextend>; //----------------------------------------------------------------------------- // Section 8.8 - Branch instructions @@ -1562,22 +1562,28 @@ def : Pat<(i32 (and (trunc i64:$src), 0xffff)), // Cast to i32 def : Pat<(i32 (trunc i64:$src)), (ADDSWSXrm (EXTRACT_SUBREG $src, sub_i32), 0)>; -def : Pat<(i32 (fp_to_sint I64:$reg)), (CVTWDSXr RD_RZ, $reg)>; -def : Pat<(i32 (fp_to_sint F32:$reg)), (CVTWSSXr RD_RZ, $reg)>; +def : Pat<(i32 (fp_to_sint f32:$src)), (CVTWSSXr RD_RZ, $src)>; +def : Pat<(i32 (fp_to_sint f64:$src)), (CVTWDSXr RD_RZ, $src)>; +def : Pat<(i32 (fp_to_sint f128:$src)), (CVTWDSXr RD_RZ, (CVTDQr $src))>; // Cast to i64 -def : Pat<(sext_inreg I64:$src, i32), +def : Pat<(sext_inreg i64:$src, i32), (INSERT_SUBREG (i64 (IMPLICIT_DEF)), (ADDSWSXrm (EXTRACT_SUBREG $src, sub_i32), 0), sub_i32)>; -def : Pat<(i64 (sext i32:$sy)), - (INSERT_SUBREG (i64 (IMPLICIT_DEF)), (ADDSWSXrm $sy, 0), sub_i32)>; -def : Pat<(i64 (zext i32:$sy)), - (INSERT_SUBREG (i64 (IMPLICIT_DEF)), (ADDSWZXrm $sy, 0), sub_i32)>; -def : Pat<(i64 (fp_to_sint f32:$sy)), (CVTLDr RD_RZ, (CVTDSr $sy))>; -def : Pat<(i64 (fp_to_sint I64:$reg)), (CVTLDr RD_RZ, $reg)>; +def : Pat<(i64 (sext i32:$src)), + (INSERT_SUBREG (i64 (IMPLICIT_DEF)), (ADDSWSXrm $src, 0), sub_i32)>; +def : Pat<(i64 (zext i32:$src)), + (INSERT_SUBREG (i64 (IMPLICIT_DEF)), (ADDSWZXrm $src, 0), sub_i32)>; +def : Pat<(i64 (fp_to_sint f32:$src)), (CVTLDr RD_RZ, (CVTDSr $src))>; +def : Pat<(i64 (fp_to_sint f64:$src)), (CVTLDr RD_RZ, $src)>; +def : Pat<(i64 (fp_to_sint f128:$src)), (CVTLDr RD_RZ, (CVTDQr $src))>; // Cast to f32 -def : Pat<(f32 (sint_to_fp i64:$sy)), (CVTSDr (CVTDLr i64:$sy))>; +def : Pat<(f32 (sint_to_fp i64:$src)), (CVTSDr (CVTDLr i64:$src))>; + +// Cast to f128 +def : Pat<(f128 (sint_to_fp i32:$src)), (CVTQDr (CVTDWr $src))>; +def : Pat<(f128 (sint_to_fp i64:$src)), (CVTQDr (CVTDLr $src))>; def : Pat<(i64 (anyext i32:$sy)), (INSERT_SUBREG (i64 (IMPLICIT_DEF)), $sy, sub_i32)>; diff --git a/llvm/test/CodeGen/VE/cast.ll b/llvm/test/CodeGen/VE/cast.ll index eccdb7d107c7..adb2a29cbb7c 100644 --- a/llvm/test/CodeGen/VE/cast.ll +++ b/llvm/test/CodeGen/VE/cast.ll @@ -1,15 +1,14 @@ ; RUN: llc < %s -mtriple=ve-unknown-unknown | FileCheck %s -define i32 @i() { +define signext i32 @i() { ; CHECK-LABEL: i: ; CHECK: .LBB{{[0-9]+}}_2: ; CHECK-NEXT: lea %s0, -2147483648 -; CHECK-NEXT: and %s0, %s0, (32)0 ; CHECK-NEXT: or %s11, 0, %s9 ret i32 -2147483648 } -define i32 @ui() { +define zeroext i32 @ui() { ; CHECK-LABEL: ui: ; CHECK: .LBB{{[0-9]+}}_2: ; CHECK-NEXT: lea %s0, -2147483648 @@ -75,19 +74,21 @@ define zeroext i16 @d2us(double %x) { ret i16 %r } -define i32 @d2i(double %x) { +define signext i32 @d2i(double %x) { ; CHECK-LABEL: d2i: ; CHECK: .LBB{{[0-9]+}}_2: ; CHECK-NEXT: cvt.w.d.sx.rz %s0, %s0 +; CHECK-NEXT: adds.w.sx %s0, %s0, (0)1 ; CHECK-NEXT: or %s11, 0, %s9 %r = fptosi double %x to i32 ret i32 %r } -define i32 @d2ui(double %x) { +define zeroext i32 @d2ui(double %x) { ; CHECK-LABEL: d2ui: ; CHECK: .LBB{{[0-9]+}}_2: ; CHECK-NEXT: cvt.l.d.rz %s0, %s0 +; CHECK-NEXT: and %s0, %s0, (32)0 ; CHECK-NEXT: or %s11, 0, %s9 %r = fptoui double %x to i32 ret i32 %r @@ -134,6 +135,138 @@ define double @d2d(double returned %0) { ret double %0 } +define fp128 @d2q(double) { +; CHECK-LABEL: d2q: +; CHECK: .LBB{{[0-9]+}}_2: +; CHECK-NEXT: cvt.q.d %s0, %s0 +; CHECK-NEXT: or %s11, 0, %s9 + %2 = fpext double %0 to fp128 + ret fp128 %2 +} + +define signext i8 @q2c(fp128) { +; CHECK-LABEL: q2c: +; CHECK: .LBB{{[0-9]+}}_2: +; CHECK-NEXT: cvt.d.q %s0, %s0 +; CHECK-NEXT: cvt.w.d.sx.rz %s0, %s0 +; CHECK-NEXT: adds.w.sx %s0, %s0, (0)1 +; CHECK-NEXT: or %s11, 0, %s9 + %2 = fptosi fp128 %0 to i8 + ret i8 %2 +} + +define zeroext i8 @q2uc(fp128) { +; CHECK-LABEL: q2uc: +; CHECK: .LBB{{[0-9]+}}_2: +; CHECK-NEXT: cvt.d.q %s0, %s0 +; CHECK-NEXT: cvt.w.d.sx.rz %s0, %s0 +; CHECK-NEXT: adds.w.zx %s0, %s0, (0)1 +; CHECK-NEXT: or %s11, 0, %s9 + %2 = fptoui fp128 %0 to i8 + ret i8 %2 +} + +define signext i16 @q2s(fp128) { +; CHECK-LABEL: q2s: +; CHECK: .LBB{{[0-9]+}}_2: +; CHECK-NEXT: cvt.d.q %s0, %s0 +; CHECK-NEXT: cvt.w.d.sx.rz %s0, %s0 +; CHECK-NEXT: adds.w.sx %s0, %s0, (0)1 +; CHECK-NEXT: or %s11, 0, %s9 + %2 = fptosi fp128 %0 to i16 + ret i16 %2 +} + +define zeroext i16 @q2us(fp128) { +; CHECK-LABEL: q2us: +; CHECK: .LBB{{[0-9]+}}_2: +; CHECK-NEXT: cvt.d.q %s0, %s0 +; CHECK-NEXT: cvt.w.d.sx.rz %s0, %s0 +; CHECK-NEXT: adds.w.zx %s0, %s0, (0)1 +; CHECK-NEXT: or %s11, 0, %s9 + %2 = fptoui fp128 %0 to i16 + ret i16 %2 +} + +define signext i32 @q2i(fp128) { +; CHECK-LABEL: q2i: +; CHECK: .LBB{{[0-9]+}}_2: +; CHECK-NEXT: cvt.d.q %s0, %s0 +; CHECK-NEXT: cvt.w.d.sx.rz %s0, %s0 +; CHECK-NEXT: adds.w.sx %s0, %s0, (0)1 +; CHECK-NEXT: or %s11, 0, %s9 + %2 = fptosi fp128 %0 to i32 + ret i32 %2 +} + +define zeroext i32 @q2ui(fp128) { +; CHECK-LABEL: q2ui: +; CHECK: .LBB{{[0-9]+}}_2: +; CHECK-NEXT: cvt.d.q %s0, %s0 +; CHECK-NEXT: cvt.l.d.rz %s0, %s0 +; CHECK-NEXT: and %s0, %s0, (32)0 +; CHECK-NEXT: or %s11, 0, %s9 + %2 = fptoui fp128 %0 to i32 + ret i32 %2 +} + +define i64 @q2ll(fp128) { +; CHECK-LABEL: q2ll: +; CHECK: .LBB{{[0-9]+}}_2: +; CHECK-NEXT: cvt.d.q %s0, %s0 +; CHECK-NEXT: cvt.l.d.rz %s0, %s0 +; CHECK-NEXT: or %s11, 0, %s9 + %2 = fptosi fp128 %0 to i64 + ret i64 %2 +} + +define i64 @q2ull(fp128) { +; CHECK-LABEL: q2ull: +; CHECK: .LBB{{[0-9]+}}_2: +; CHECK-NEXT: lea %s2, .LCPI{{[0-9]+}}_0@lo +; CHECK-NEXT: and %s2, %s2, (32)0 +; CHECK-NEXT: lea.sl %s2, .LCPI{{[0-9]+}}_0@hi(, %s2) +; CHECK-NEXT: ld %s4, 8(, %s2) +; CHECK-NEXT: ld %s5, (, %s2) +; CHECK-NEXT: fcmp.q %s3, %s0, %s4 +; CHECK-NEXT: fsub.q %s4, %s0, %s4 +; CHECK-NEXT: cvt.d.q %s2, %s4 +; CHECK-NEXT: cvt.l.d.rz %s2, %s2 +; CHECK-NEXT: xor %s2, %s2, (1)1 +; CHECK-NEXT: cvt.d.q %s0, %s0 +; CHECK-NEXT: cvt.l.d.rz %s0, %s0 +; CHECK-NEXT: cmov.d.lt %s2, %s0, %s3 +; CHECK-NEXT: or %s0, 0, %s2 +; CHECK-NEXT: or %s11, 0, %s9 + %2 = fptoui fp128 %0 to i64 + ret i64 %2 +} + +define float @q2f(fp128) { +; CHECK-LABEL: q2f: +; CHECK: .LBB{{[0-9]+}}_2: +; CHECK-NEXT: cvt.s.q %s0, %s0 +; CHECK-NEXT: or %s11, 0, %s9 + %2 = fptrunc fp128 %0 to float + ret float %2 +} + +define double @q2d(fp128) { +; CHECK-LABEL: q2d: +; CHECK: .LBB{{[0-9]+}}_2: +; CHECK-NEXT: cvt.d.q %s0, %s0 +; CHECK-NEXT: or %s11, 0, %s9 + %2 = fptrunc fp128 %0 to double + ret double %2 +} + +define fp128 @q2q(fp128 returned) { +; CHECK-LABEL: q2q: +; CHECK: .LBB{{[0-9]+}}_2: +; CHECK-NEXT: or %s11, 0, %s9 + ret fp128 %0 +} + define signext i8 @f2c(float %x) { ; CHECK-LABEL: f2c: ; CHECK: .LBB{{[0-9]+}}_2: @@ -174,20 +307,22 @@ define zeroext i16 @f2us(float %x) { ret i16 %r } -define i32 @f2i(float %x) { +define signext i32 @f2i(float %x) { ; CHECK-LABEL: f2i: ; CHECK: .LBB{{[0-9]+}}_2: ; CHECK-NEXT: cvt.w.s.sx.rz %s0, %s0 +; CHECK-NEXT: adds.w.sx %s0, %s0, (0)1 ; CHECK-NEXT: or %s11, 0, %s9 %r = fptosi float %x to i32 ret i32 %r } -define i32 @f2ui(float %x) { +define zeroext i32 @f2ui(float %x) { ; CHECK-LABEL: f2ui: ; CHECK: .LBB{{[0-9]+}}_2: ; CHECK-NEXT: cvt.d.s %s0, %s0 ; CHECK-NEXT: cvt.l.d.rz %s0, %s0 +; CHECK-NEXT: and %s0, %s0, (32)0 ; CHECK-NEXT: or %s11, 0, %s9 %r = fptoui float %x to i32 ret i32 %r @@ -237,6 +372,15 @@ define double @f2d(float %x) { ret double %r } +define fp128 @f2q(float) { +; CHECK-LABEL: f2q: +; CHECK: .LBB{{[0-9]+}}_2: +; CHECK-NEXT: cvt.q.s %s0, %s0 +; CHECK-NEXT: or %s11, 0, %s9 + %2 = fpext float %0 to fp128 + ret fp128 %2 +} + define signext i8 @ll2c(i64 %0) { ; CHECK-LABEL: ll2c: ; CHECK: .LBB{{[0-9]+}}_2: @@ -275,17 +419,19 @@ define zeroext i16 @ll2us(i64 %0) { ret i16 %2 } -define i32 @ll2i(i64 %0) { +define signext i32 @ll2i(i64 %0) { ; CHECK-LABEL: ll2i: ; CHECK: .LBB{{[0-9]+}}_2: +; CHECK-NEXT: adds.w.sx %s0, %s0, (0)1 ; CHECK-NEXT: or %s11, 0, %s9 %2 = trunc i64 %0 to i32 ret i32 %2 } -define i32 @ll2ui(i64 %0) { +define zeroext i32 @ll2ui(i64 %0) { ; CHECK-LABEL: ll2ui: ; CHECK: .LBB{{[0-9]+}}_2: +; CHECK-NEXT: and %s0, %s0, (32)0 ; CHECK-NEXT: or %s11, 0, %s9 %2 = trunc i64 %0 to i32 ret i32 %2 @@ -324,6 +470,16 @@ define double @ll2d(i64 %x) { ret double %r } +define fp128 @ll2q(i64) { +; CHECK-LABEL: ll2q: +; CHECK: .LBB{{[0-9]+}}_2: +; CHECK-NEXT: cvt.d.l %s0, %s0 +; CHECK-NEXT: cvt.q.d %s0, %s0 +; CHECK-NEXT: or %s11, 0, %s9 + %2 = sitofp i64 %0 to fp128 + ret fp128 %2 +} + define signext i8 @ull2c(i64 %0) { ; CHECK-LABEL: ull2c: ; CHECK: .LBB{{[0-9]+}}_2: @@ -362,17 +518,19 @@ define zeroext i16 @ull2us(i64 %0) { ret i16 %2 } -define i32 @ull2i(i64 %0) { +define signext i32 @ull2i(i64 %0) { ; CHECK-LABEL: ull2i: ; CHECK: .LBB{{[0-9]+}}_2: +; CHECK-NEXT: adds.w.sx %s0, %s0, (0)1 ; CHECK-NEXT: or %s11, 0, %s9 %2 = trunc i64 %0 to i32 ret i32 %2 } -define i32 @ull2ui(i64 %0) { +define zeroext i32 @ull2ui(i64 %0) { ; CHECK-LABEL: ull2ui: ; CHECK: .LBB{{[0-9]+}}_2: +; CHECK-NEXT: and %s0, %s0, (32)0 ; CHECK-NEXT: or %s11, 0, %s9 %2 = trunc i64 %0 to i32 ret i32 %2 @@ -430,7 +588,25 @@ define double @ull2d(i64 %x) { ret double %r } -define signext i8 @i2c(i32 %0) { +define fp128 @ull2q(i64) { +; CHECK-LABEL: ull2q: +; CHECK: .LBB{{[0-9]+}}_2: +; CHECK-NEXT: srl %s1, %s0, 61 +; CHECK-NEXT: and %s1, 4, %s1 +; CHECK-NEXT: lea %s2, .LCPI{{[0-9]+}}_0@lo +; CHECK-NEXT: and %s2, %s2, (32)0 +; CHECK-NEXT: lea.sl %s2, .LCPI{{[0-9]+}}_0@hi(, %s2) +; CHECK-NEXT: ldu %s1, (%s1, %s2) +; CHECK-NEXT: cvt.q.s %s2, %s1 +; CHECK-NEXT: cvt.d.l %s0, %s0 +; CHECK-NEXT: cvt.q.d %s0, %s0 +; CHECK-NEXT: fadd.q %s0, %s0, %s2 +; CHECK-NEXT: or %s11, 0, %s9 + %2 = uitofp i64 %0 to fp128 + ret fp128 %2 +} + +define signext i8 @i2c(i32 signext %0) { ; CHECK-LABEL: i2c: ; CHECK: .LBB{{[0-9]+}}_2: ; CHECK-NEXT: sll %s0, %s0, 56 @@ -440,7 +616,7 @@ define signext i8 @i2c(i32 %0) { ret i8 %2 } -define zeroext i8 @i2uc(i32 %0) { +define zeroext i8 @i2uc(i32 signext %0) { ; CHECK-LABEL: i2uc: ; CHECK: .LBB{{[0-9]+}}_2: ; CHECK-NEXT: and %s0, %s0, (56)0 @@ -449,7 +625,7 @@ define zeroext i8 @i2uc(i32 %0) { ret i8 %2 } -define signext i16 @i2s(i32 %0) { +define signext i16 @i2s(i32 signext %0) { ; CHECK-LABEL: i2s: ; CHECK: .LBB{{[0-9]+}}_2: ; CHECK-NEXT: sll %s0, %s0, 48 @@ -459,7 +635,7 @@ define signext i16 @i2s(i32 %0) { ret i16 %2 } -define zeroext i16 @i2us(i32 %0) { +define zeroext i16 @i2us(i32 signext %0) { ; CHECK-LABEL: i2us: ; CHECK: .LBB{{[0-9]+}}_2: ; CHECK-NEXT: and %s0, %s0, (48)0 @@ -468,39 +644,38 @@ define zeroext i16 @i2us(i32 %0) { ret i16 %2 } -define i32 @i2i(i32 returned %0) { +define signext i32 @i2i(i32 signext returned %0) { ; CHECK-LABEL: i2i: ; CHECK: .LBB{{[0-9]+}}_2: ; CHECK-NEXT: or %s11, 0, %s9 ret i32 %0 } -define i32 @i2ui(i32 returned %0) { +define zeroext i32 @i2ui(i32 signext returned %0) { ; CHECK-LABEL: i2ui: ; CHECK: .LBB{{[0-9]+}}_2: +; CHECK-NEXT: and %s0, %s0, (32)0 ; CHECK-NEXT: or %s11, 0, %s9 ret i32 %0 } -define i64 @i2ll(i32 %0) { +define i64 @i2ll(i32 signext %0) { ; CHECK-LABEL: i2ll: ; CHECK: .LBB{{[0-9]+}}_2: -; CHECK-NEXT: adds.w.sx %s0, %s0, (0)1 ; CHECK-NEXT: or %s11, 0, %s9 %2 = sext i32 %0 to i64 ret i64 %2 } -define i64 @i2ull(i32 %0) { +define i64 @i2ull(i32 signext %0) { ; CHECK-LABEL: i2ull: ; CHECK: .LBB{{[0-9]+}}_2: -; CHECK-NEXT: adds.w.sx %s0, %s0, (0)1 ; CHECK-NEXT: or %s11, 0, %s9 %2 = sext i32 %0 to i64 ret i64 %2 } -define float @i2f(i32 %x) { +define float @i2f(i32 signext %x) { ; CHECK-LABEL: i2f: ; CHECK: .LBB{{[0-9]+}}_2: ; CHECK-NEXT: cvt.s.w %s0, %s0 @@ -509,7 +684,7 @@ define float @i2f(i32 %x) { ret float %r } -define double @i2d(i32 %x) { +define double @i2d(i32 signext %x) { ; CHECK-LABEL: i2d: ; CHECK: .LBB{{[0-9]+}}_2: ; CHECK-NEXT: cvt.d.w %s0, %s0 @@ -518,7 +693,17 @@ define double @i2d(i32 %x) { ret double %r } -define signext i8 @ui2c(i32 %0) { +define fp128 @i2q(i32 signext %x) { +; CHECK-LABEL: i2q: +; CHECK: .LBB{{[0-9]+}}_2: +; CHECK-NEXT: cvt.d.w %s0, %s0 +; CHECK-NEXT: cvt.q.d %s0, %s0 +; CHECK-NEXT: or %s11, 0, %s9 + %r = sitofp i32 %x to fp128 + ret fp128 %r +} + +define signext i8 @ui2c(i32 zeroext %0) { ; CHECK-LABEL: ui2c: ; CHECK: .LBB{{[0-9]+}}_2: ; CHECK-NEXT: sll %s0, %s0, 56 @@ -528,7 +713,7 @@ define signext i8 @ui2c(i32 %0) { ret i8 %2 } -define zeroext i8 @ui2uc(i32 %0) { +define zeroext i8 @ui2uc(i32 zeroext %0) { ; CHECK-LABEL: ui2uc: ; CHECK: .LBB{{[0-9]+}}_2: ; CHECK-NEXT: and %s0, %s0, (56)0 @@ -537,7 +722,7 @@ define zeroext i8 @ui2uc(i32 %0) { ret i8 %2 } -define signext i16 @ui2s(i32 %0) { +define signext i16 @ui2s(i32 zeroext %0) { ; CHECK-LABEL: ui2s: ; CHECK: .LBB{{[0-9]+}}_2: ; CHECK-NEXT: sll %s0, %s0, 48 @@ -547,7 +732,7 @@ define signext i16 @ui2s(i32 %0) { ret i16 %2 } -define zeroext i16 @ui2us(i32 %0) { +define zeroext i16 @ui2us(i32 zeroext %0) { ; CHECK-LABEL: ui2us: ; CHECK: .LBB{{[0-9]+}}_2: ; CHECK-NEXT: and %s0, %s0, (48)0 @@ -556,42 +741,40 @@ define zeroext i16 @ui2us(i32 %0) { ret i16 %2 } -define i32 @ui2i(i32 returned %0) { +define signext i32 @ui2i(i32 zeroext returned %0) { ; CHECK-LABEL: ui2i: ; CHECK: .LBB{{[0-9]+}}_2: +; CHECK-NEXT: adds.w.sx %s0, %s0, (0)1 ; CHECK-NEXT: or %s11, 0, %s9 ret i32 %0 } -define i32 @ui2ui(i32 returned %0) { +define zeroext i32 @ui2ui(i32 zeroext returned %0) { ; CHECK-LABEL: ui2ui: ; CHECK: .LBB{{[0-9]+}}_2: ; CHECK-NEXT: or %s11, 0, %s9 ret i32 %0 } -define i64 @ui2ll(i32 %0) { +define i64 @ui2ll(i32 zeroext %0) { ; CHECK-LABEL: ui2ll: ; CHECK: .LBB{{[0-9]+}}_2: -; CHECK-NEXT: and %s0, %s0, (32)0 ; CHECK-NEXT: or %s11, 0, %s9 %2 = zext i32 %0 to i64 ret i64 %2 } -define i64 @ui2ull(i32 %0) { +define i64 @ui2ull(i32 zeroext %0) { ; CHECK-LABEL: ui2ull: ; CHECK: .LBB{{[0-9]+}}_2: -; CHECK-NEXT: and %s0, %s0, (32)0 ; CHECK-NEXT: or %s11, 0, %s9 %2 = zext i32 %0 to i64 ret i64 %2 } -define float @ui2f(i32 %x) { +define float @ui2f(i32 zeroext %x) { ; CHECK-LABEL: ui2f: ; CHECK: .LBB{{[0-9]+}}_2: -; CHECK-NEXT: and %s0, %s0, (32)0 ; CHECK-NEXT: cvt.d.l %s0, %s0 ; CHECK-NEXT: cvt.s.d %s0, %s0 ; CHECK-NEXT: or %s11, 0, %s9 @@ -599,16 +782,25 @@ define float @ui2f(i32 %x) { ret float %r } -define double @ui2d(i32 %x) { +define double @ui2d(i32 zeroext %x) { ; CHECK-LABEL: ui2d: ; CHECK: .LBB{{[0-9]+}}_2: -; CHECK-NEXT: and %s0, %s0, (32)0 ; CHECK-NEXT: cvt.d.l %s0, %s0 ; CHECK-NEXT: or %s11, 0, %s9 %r = uitofp i32 %x to double ret double %r } +define fp128 @ui2q(i32 zeroext %0) { +; CHECK-LABEL: ui2q: +; CHECK: .LBB{{[0-9]+}}_2: +; CHECK-NEXT: cvt.d.l %s0, %s0 +; CHECK-NEXT: cvt.q.d %s0, %s0 +; CHECK-NEXT: or %s11, 0, %s9 + %2 = uitofp i32 %0 to fp128 + ret fp128 %2 +} + define signext i8 @s2c(i16 signext %0) { ; CHECK-LABEL: s2c: ; CHECK: .LBB{{[0-9]+}}_2: @@ -643,7 +835,7 @@ define zeroext i16 @s2us(i16 returned signext %0) { ret i16 %0 } -define i32 @s2i(i16 signext %0) { +define signext i32 @s2i(i16 signext %0) { ; CHECK-LABEL: s2i: ; CHECK: .LBB{{[0-9]+}}_2: ; CHECK-NEXT: or %s11, 0, %s9 @@ -651,9 +843,10 @@ define i32 @s2i(i16 signext %0) { ret i32 %2 } -define i32 @s2ui(i16 signext %0) { +define zeroext i32 @s2ui(i16 signext %0) { ; CHECK-LABEL: s2ui: ; CHECK: .LBB{{[0-9]+}}_2: +; CHECK-NEXT: and %s0, %s0, (32)0 ; CHECK-NEXT: or %s11, 0, %s9 %2 = sext i16 %0 to i32 ret i32 %2 @@ -693,6 +886,16 @@ define double @s2d(i16 signext %x) { ret double %r } +define fp128 @s2q(i16 signext) { +; CHECK-LABEL: s2q: +; CHECK: .LBB{{[0-9]+}}_2: +; CHECK-NEXT: cvt.d.w %s0, %s0 +; CHECK-NEXT: cvt.q.d %s0, %s0 +; CHECK-NEXT: or %s11, 0, %s9 + %2 = sitofp i16 %0 to fp128 + ret fp128 %2 +} + define signext i8 @us2c(i16 zeroext %0) { ; CHECK-LABEL: us2c: ; CHECK: .LBB{{[0-9]+}}_2: @@ -728,7 +931,7 @@ define zeroext i16 @us2us(i16 returned zeroext %0) { ret i16 %0 } -define i32 @us2i(i16 zeroext %0) { +define signext i32 @us2i(i16 zeroext %0) { ; CHECK-LABEL: us2i: ; CHECK: .LBB{{[0-9]+}}_2: ; CHECK-NEXT: or %s11, 0, %s9 @@ -736,7 +939,7 @@ define i32 @us2i(i16 zeroext %0) { ret i32 %2 } -define i32 @us2ui(i16 zeroext %0) { +define zeroext i32 @us2ui(i16 zeroext %0) { ; CHECK-LABEL: us2ui: ; CHECK: .LBB{{[0-9]+}}_2: ; CHECK-NEXT: or %s11, 0, %s9 @@ -778,6 +981,16 @@ define double @us2d(i16 zeroext %x) { ret double %r } +define fp128 @us2q(i16 zeroext) { +; CHECK-LABEL: us2q: +; CHECK: .LBB{{[0-9]+}}_2: +; CHECK-NEXT: cvt.d.w %s0, %s0 +; CHECK-NEXT: cvt.q.d %s0, %s0 +; CHECK-NEXT: or %s11, 0, %s9 + %2 = uitofp i16 %0 to fp128 + ret fp128 %2 +} + define signext i8 @c2c(i8 returned signext %0) { ; CHECK-LABEL: c2c: ; CHECK: .LBB{{[0-9]+}}_2: @@ -810,7 +1023,7 @@ define zeroext i16 @c2us(i8 signext %0) { ret i16 %2 } -define i32 @c2i(i8 signext %0) { +define signext i32 @c2i(i8 signext %0) { ; CHECK-LABEL: c2i: ; CHECK: .LBB{{[0-9]+}}_2: ; CHECK-NEXT: or %s11, 0, %s9 @@ -818,9 +1031,10 @@ define i32 @c2i(i8 signext %0) { ret i32 %2 } -define i32 @c2ui(i8 signext %0) { +define zeroext i32 @c2ui(i8 signext %0) { ; CHECK-LABEL: c2ui: ; CHECK: .LBB{{[0-9]+}}_2: +; CHECK-NEXT: and %s0, %s0, (32)0 ; CHECK-NEXT: or %s11, 0, %s9 %2 = sext i8 %0 to i32 ret i32 %2 @@ -860,6 +1074,16 @@ define double @c2d(i8 signext %x) { ret double %r } +define fp128 @c2q(i8 signext) { +; CHECK-LABEL: c2q: +; CHECK: .LBB{{[0-9]+}}_2: +; CHECK-NEXT: cvt.d.w %s0, %s0 +; CHECK-NEXT: cvt.q.d %s0, %s0 +; CHECK-NEXT: or %s11, 0, %s9 + %2 = sitofp i8 %0 to fp128 + ret fp128 %2 +} + define signext i8 @uc2c(i8 returned zeroext %0) { ; CHECK-LABEL: uc2c: ; CHECK: .LBB{{[0-9]+}}_2: @@ -892,7 +1116,7 @@ define zeroext i16 @uc2us(i8 zeroext %0) { ret i16 %2 } -define i32 @uc2i(i8 zeroext %0) { +define signext i32 @uc2i(i8 zeroext %0) { ; CHECK-LABEL: uc2i: ; CHECK: .LBB{{[0-9]+}}_2: ; CHECK-NEXT: or %s11, 0, %s9 @@ -900,7 +1124,7 @@ define i32 @uc2i(i8 zeroext %0) { ret i32 %2 } -define i32 @uc2ui(i8 zeroext %0) { +define zeroext i32 @uc2ui(i8 zeroext %0) { ; CHECK-LABEL: uc2ui: ; CHECK: .LBB{{[0-9]+}}_2: ; CHECK-NEXT: or %s11, 0, %s9 @@ -942,6 +1166,16 @@ define double @uc2d(i8 zeroext %x) { ret double %r } +define fp128 @uc2q(i8 zeroext) { +; CHECK-LABEL: uc2q: +; CHECK: .LBB{{[0-9]+}}_2: +; CHECK-NEXT: cvt.d.w %s0, %s0 +; CHECK-NEXT: cvt.q.d %s0, %s0 +; CHECK-NEXT: or %s11, 0, %s9 + %2 = uitofp i8 %0 to fp128 + ret fp128 %2 +} + ; Function Attrs: norecurse nounwind readnone define i128 @i128() { ; CHECK-LABEL: i128: @@ -1047,36 +1281,40 @@ define zeroext i16 @ui1282us(i128 %0) { } ; Function Attrs: norecurse nounwind readnone -define i32 @i1282i(i128 %0) { +define signext i32 @i1282i(i128 %0) { ; CHECK-LABEL: i1282i: ; CHECK: .LBB{{[0-9]+}}_2: +; CHECK-NEXT: adds.w.sx %s0, %s0, (0)1 ; CHECK-NEXT: or %s11, 0, %s9 %2 = trunc i128 %0 to i32 ret i32 %2 } ; Function Attrs: norecurse nounwind readnone -define i32 @ui1282i(i128 %0) { +define signext i32 @ui1282i(i128 %0) { ; CHECK-LABEL: ui1282i: ; CHECK: .LBB{{[0-9]+}}_2: +; CHECK-NEXT: adds.w.sx %s0, %s0, (0)1 ; CHECK-NEXT: or %s11, 0, %s9 %2 = trunc i128 %0 to i32 ret i32 %2 } ; Function Attrs: norecurse nounwind readnone -define i32 @i1282ui(i128 %0) { +define zeroext i32 @i1282ui(i128 %0) { ; CHECK-LABEL: i1282ui: ; CHECK: .LBB{{[0-9]+}}_2: +; CHECK-NEXT: and %s0, %s0, (32)0 ; CHECK-NEXT: or %s11, 0, %s9 %2 = trunc i128 %0 to i32 ret i32 %2 } ; Function Attrs: norecurse nounwind readnone -define i32 @ui1282ui(i128 %0) { +define zeroext i32 @ui1282ui(i128 %0) { ; CHECK-LABEL: ui1282ui: ; CHECK: .LBB{{[0-9]+}}_2: +; CHECK-NEXT: and %s0, %s0, (32)0 ; CHECK-NEXT: or %s11, 0, %s9 %2 = trunc i128 %0 to i32 ret i32 %2 @@ -1134,6 +1372,110 @@ define i128 @ui1282i128(i128 returned %0) { ret i128 %0 } +; Function Attrs: norecurse nounwind readnone +define float @i1282f(i128) { +; CHECK-LABEL: i1282f: +; CHECK: .LBB{{[0-9]+}}_2: +; CHECK-NEXT: lea %s2, __floattisf@lo +; CHECK-NEXT: and %s2, %s2, (32)0 +; CHECK-NEXT: lea.sl %s12, __floattisf@hi(, %s2) +; CHECK-NEXT: bsic %s10, (, %s12) +; CHECK-NEXT: or %s11, 0, %s9 + %2 = sitofp i128 %0 to float + ret float %2 +} + +; Function Attrs: norecurse nounwind readnone +define float @ui1282f(i128) { +; CHECK-LABEL: ui1282f: +; CHECK: .LBB{{[0-9]+}}_2: +; CHECK-NEXT: lea %s2, __floatuntisf@lo +; CHECK-NEXT: and %s2, %s2, (32)0 +; CHECK-NEXT: lea.sl %s12, __floatuntisf@hi(, %s2) +; CHECK-NEXT: bsic %s10, (, %s12) +; CHECK-NEXT: or %s11, 0, %s9 + %2 = uitofp i128 %0 to float + ret float %2 +} + +; Function Attrs: norecurse nounwind readnone +define double @i1282d(i128) { +; CHECK-LABEL: i1282d: +; CHECK: .LBB{{[0-9]+}}_2: +; CHECK-NEXT: lea %s2, __floattidf@lo +; CHECK-NEXT: and %s2, %s2, (32)0 +; CHECK-NEXT: lea.sl %s12, __floattidf@hi(, %s2) +; CHECK-NEXT: bsic %s10, (, %s12) +; CHECK-NEXT: or %s11, 0, %s9 + %2 = sitofp i128 %0 to double + ret double %2 +} + +; Function Attrs: norecurse nounwind readnone +define double @ui1282d(i128) { +; CHECK-LABEL: ui1282d: +; CHECK: .LBB{{[0-9]+}}_2: +; CHECK-NEXT: lea %s2, __floatuntidf@lo +; CHECK-NEXT: and %s2, %s2, (32)0 +; CHECK-NEXT: lea.sl %s12, __floatuntidf@hi(, %s2) +; CHECK-NEXT: bsic %s10, (, %s12) +; CHECK-NEXT: or %s11, 0, %s9 + %2 = uitofp i128 %0 to double + ret double %2 +} + +; Function Attrs: norecurse nounwind readnone +define i128 @d2i128(double) { +; CHECK-LABEL: d2i128: +; CHECK: .LBB{{[0-9]+}}_2: +; CHECK-NEXT: lea %s1, __fixdfti@lo +; CHECK-NEXT: and %s1, %s1, (32)0 +; CHECK-NEXT: lea.sl %s12, __fixdfti@hi(, %s1) +; CHECK-NEXT: bsic %s10, (, %s12) +; CHECK-NEXT: or %s11, 0, %s9 + %2 = fptosi double %0 to i128 + ret i128 %2 +} + +; Function Attrs: norecurse nounwind readnone +define i128 @d2ui128(double) { +; CHECK-LABEL: d2ui128: +; CHECK: .LBB{{[0-9]+}}_2: +; CHECK-NEXT: lea %s1, __fixunsdfti@lo +; CHECK-NEXT: and %s1, %s1, (32)0 +; CHECK-NEXT: lea.sl %s12, __fixunsdfti@hi(, %s1) +; CHECK-NEXT: bsic %s10, (, %s12) +; CHECK-NEXT: or %s11, 0, %s9 + %2 = fptoui double %0 to i128 + ret i128 %2 +} + +; Function Attrs: norecurse nounwind readnone +define i128 @f2i128(float) { +; CHECK-LABEL: f2i128: +; CHECK: .LBB{{[0-9]+}}_2: +; CHECK-NEXT: lea %s1, __fixsfti@lo +; CHECK-NEXT: and %s1, %s1, (32)0 +; CHECK-NEXT: lea.sl %s12, __fixsfti@hi(, %s1) +; CHECK-NEXT: bsic %s10, (, %s12) +; CHECK-NEXT: or %s11, 0, %s9 + %2 = fptosi float %0 to i128 + ret i128 %2 +} + +; Function Attrs: norecurse nounwind readnone +define i128 @f2ui128(float) { +; CHECK-LABEL: f2ui128: +; CHECK: .LBB{{[0-9]+}}_2: +; CHECK-NEXT: lea %s1, __fixunssfti@lo +; CHECK-NEXT: and %s1, %s1, (32)0 +; CHECK-NEXT: lea.sl %s12, __fixunssfti@hi(, %s1) +; CHECK-NEXT: bsic %s10, (, %s12) +; CHECK-NEXT: or %s11, 0, %s9 + %2 = fptoui float %0 to i128 + ret i128 %2 +} + ; Function Attrs: norecurse nounwind readnone define i128 @ll2i128(i64 %0) { ; CHECK-LABEL: ll2i128: @@ -1175,10 +1517,9 @@ define i128 @ull2ui128(i64 %0) { } ; Function Attrs: norecurse nounwind readnone -define i128 @i2i128(i32 %0) { +define i128 @i2i128(i32 signext %0) { ; CHECK-LABEL: i2i128: ; CHECK: .LBB{{[0-9]+}}_2: -; CHECK-NEXT: adds.w.sx %s0, %s0, (0)1 ; CHECK-NEXT: sra.l %s1, %s0, 63 ; CHECK-NEXT: or %s11, 0, %s9 %2 = sext i32 %0 to i128 @@ -1186,10 +1527,9 @@ define i128 @i2i128(i32 %0) { } ; Function Attrs: norecurse nounwind readnone -define i128 @i2ui128(i32 %0) { +define i128 @i2ui128(i32 signext %0) { ; CHECK-LABEL: i2ui128: ; CHECK: .LBB{{[0-9]+}}_2: -; CHECK-NEXT: adds.w.sx %s0, %s0, (0)1 ; CHECK-NEXT: sra.l %s1, %s0, 63 ; CHECK-NEXT: or %s11, 0, %s9 %2 = sext i32 %0 to i128 @@ -1197,10 +1537,9 @@ define i128 @i2ui128(i32 %0) { } ; Function Attrs: norecurse nounwind readnone -define i128 @ui2i128(i32 %0) { +define i128 @ui2i128(i32 zeroext %0) { ; CHECK-LABEL: ui2i128: ; CHECK: .LBB{{[0-9]+}}_2: -; CHECK-NEXT: and %s0, %s0, (32)0 ; CHECK-NEXT: or %s1, 0, (0)1 ; CHECK-NEXT: or %s11, 0, %s9 %2 = zext i32 %0 to i128 @@ -1208,10 +1547,9 @@ define i128 @ui2i128(i32 %0) { } ; Function Attrs: norecurse nounwind readnone -define i128 @ui2ui128(i32 %0) { +define i128 @ui2ui128(i32 zeroext %0) { ; CHECK-LABEL: ui2ui128: ; CHECK: .LBB{{[0-9]+}}_2: -; CHECK-NEXT: and %s0, %s0, (32)0 ; CHECK-NEXT: or %s1, 0, (0)1 ; CHECK-NEXT: or %s11, 0, %s9 %2 = zext i32 %0 to i128