forked from OSchip/llvm-project
parent
9dbe4d15ec
commit
fb2573554c
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@ -5303,17 +5303,16 @@ void SelectionDAGISel::ComputeLiveOutVRegInfo(SelectionDAG &DAG) {
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}
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}
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void SelectionDAGISel::CodeGenAndEmitDAG(SelectionDAG &DAG) {
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void SelectionDAGISel::CodeGenAndEmitDAG(SelectionDAG &DAG) {
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NamedRegionTimer *RegionTimer = 0;
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DOUT << "Lowered selection DAG:\n";
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DOUT << "Lowered selection DAG:\n";
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DEBUG(DAG.dump());
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DEBUG(DAG.dump());
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// Run the DAG combiner in pre-legalize mode.
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// Run the DAG combiner in pre-legalize mode.
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if (TimePassesIsEnabled)
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if (TimePassesIsEnabled) {
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RegionTimer = new NamedRegionTimer("DAG Combining 1");
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NamedRegionTimer T("DAG Combining 1");
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DAG.Combine(false, *AA);
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DAG.Combine(false, *AA);
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if (TimePassesIsEnabled)
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} else {
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delete RegionTimer;
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DAG.Combine(false, *AA);
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}
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DOUT << "Optimized lowered selection DAG:\n";
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DOUT << "Optimized lowered selection DAG:\n";
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DEBUG(DAG.dump());
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DEBUG(DAG.dump());
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@ -5324,21 +5323,23 @@ void SelectionDAGISel::CodeGenAndEmitDAG(SelectionDAG &DAG) {
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DAG.LegalizeTypes();
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DAG.LegalizeTypes();
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// Someday even later, enable a dag combine pass here.
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// Someday even later, enable a dag combine pass here.
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#endif
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#endif
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if (TimePassesIsEnabled)
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if (TimePassesIsEnabled) {
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RegionTimer = new NamedRegionTimer("DAG Legalization");
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NamedRegionTimer T("DAG Legalization");
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DAG.Legalize();
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DAG.Legalize();
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if (TimePassesIsEnabled)
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} else {
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delete RegionTimer;
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DAG.Legalize();
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}
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DOUT << "Legalized selection DAG:\n";
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DOUT << "Legalized selection DAG:\n";
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DEBUG(DAG.dump());
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DEBUG(DAG.dump());
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// Run the DAG combiner in post-legalize mode.
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// Run the DAG combiner in post-legalize mode.
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if (TimePassesIsEnabled)
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if (TimePassesIsEnabled) {
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RegionTimer = new NamedRegionTimer("DAG Combining 2");
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NamedRegionTimer T("DAG Combining 2");
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DAG.Combine(true, *AA);
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DAG.Combine(true, *AA);
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if (TimePassesIsEnabled)
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} else {
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delete RegionTimer;
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DAG.Combine(true, *AA);
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}
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DOUT << "Optimized legalized selection DAG:\n";
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DOUT << "Optimized legalized selection DAG:\n";
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DEBUG(DAG.dump());
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DEBUG(DAG.dump());
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@ -5350,26 +5351,29 @@ void SelectionDAGISel::CodeGenAndEmitDAG(SelectionDAG &DAG) {
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// Third, instruction select all of the operations to machine code, adding the
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// Third, instruction select all of the operations to machine code, adding the
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// code to the MachineBasicBlock.
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// code to the MachineBasicBlock.
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if (TimePassesIsEnabled)
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if (TimePassesIsEnabled) {
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RegionTimer = new NamedRegionTimer("Instruction Selection");
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NamedRegionTimer T("Instruction Selection");
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InstructionSelect(DAG);
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InstructionSelect(DAG);
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if (TimePassesIsEnabled)
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} else {
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delete RegionTimer;
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InstructionSelect(DAG);
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}
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// Emit machine code to BB. This can change 'BB' to the last block being
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// Emit machine code to BB. This can change 'BB' to the last block being
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// inserted into.
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// inserted into.
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if (TimePassesIsEnabled)
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if (TimePassesIsEnabled) {
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RegionTimer = new NamedRegionTimer("Instruction Scheduling");
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NamedRegionTimer T("Instruction Scheduling");
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ScheduleAndEmitDAG(DAG);
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ScheduleAndEmitDAG(DAG);
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if (TimePassesIsEnabled)
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} else {
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delete RegionTimer;
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ScheduleAndEmitDAG(DAG);
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}
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// Perform target specific isel post processing.
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// Perform target specific isel post processing.
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if (TimePassesIsEnabled)
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if (TimePassesIsEnabled) {
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RegionTimer = new NamedRegionTimer("Instruction Selection Post Processing");
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NamedRegionTimer T("Instruction Selection Post Processing");
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InstructionSelectPostProcessing(DAG);
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InstructionSelectPostProcessing(DAG);
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if (TimePassesIsEnabled)
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} else {
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delete RegionTimer;
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InstructionSelectPostProcessing(DAG);
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}
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DOUT << "Selected machine code:\n";
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DOUT << "Selected machine code:\n";
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DEBUG(BB->dump());
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DEBUG(BB->dump());
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