forked from OSchip/llvm-project
[CodeGen] Fix FoldConstantVectorArithmetic for scalable vectors
For now I have changed FoldConstantVectorArithmetic to return early if we encounter a scalable vector, since the subsequent code assumes you can perform lane-wise constant folds. However, in future work we should be able to extend this to look at splats of a constant value and fold those if possible. I have also added the same code to FoldConstantArithmetic, since that deals with vectors too. The warnings I fixed in this patch were being generated by this existing test: CodeGen/AArch64/sve-int-arith.ll Differential Revision: https://reviews.llvm.org/D79421
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@ -4915,8 +4915,14 @@ SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, const SDLoc &DL,
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if (GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(N2))
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return FoldSymbolOffset(Opcode, VT, GA, N1);
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// For vectors, extract each constant element and fold them individually.
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// Either input may be an undef value.
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// TODO: All the folds below are performed lane-by-lane and assume a fixed
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// vector width, however we should be able to do constant folds involving
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// splat vector nodes too.
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if (VT.isScalableVector())
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return SDValue();
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// For fixed width vectors, extract each constant element and fold them
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// individually. Either input may be an undef value.
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auto *BV1 = dyn_cast<BuildVectorSDNode>(N1);
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if (!BV1 && !N1->isUndef())
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return SDValue();
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@ -4992,6 +4998,13 @@ SDValue SelectionDAG::FoldConstantVectorArithmetic(unsigned Opcode,
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if (!VT.isVector())
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return SDValue();
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// TODO: All the folds below are performed lane-by-lane and assume a fixed
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// vector width, however we should be able to do constant folds involving
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// splat vector nodes too.
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if (VT.isScalableVector())
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return SDValue();
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// From this point onwards all vectors are assumed to be fixed width.
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unsigned NumElts = VT.getVectorNumElements();
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auto IsScalarOrSameVectorSize = [&](const SDValue &Op) {
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