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[AMDGPU] Fix ROCm unit test memref initialization

This commit is contained in:
jerryyin 2020-09-17 08:47:33 -07:00
parent e09107ab80
commit fb18202836
3 changed files with 19 additions and 0 deletions
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8
mlir/test/mlir-rocm-runner/vecadd.mlir
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@ -17,12 +17,20 @@ func @vecadd(%arg0 : memref<?xf32>, %arg1 : memref<?xf32>, %arg2 : memref<?xf32>
// CHECK: [2.46, 2.46, 2.46, 2.46, 2.46]
func @main() {
%c0 = constant 0 : index
%c1 = constant 1 : index
%c5 = constant 5 : index
%cf1dot23 = constant 1.23 : f32
%0 = alloc() : memref<5xf32>
%1 = alloc() : memref<5xf32>
%2 = alloc() : memref<5xf32>
%3 = memref_cast %0 : memref<5xf32> to memref<?xf32>
%4 = memref_cast %1 : memref<5xf32> to memref<?xf32>
%5 = memref_cast %2 : memref<5xf32> to memref<?xf32>
scf.for %i = %c0 to %c5 step %c1 {
store %cf1dot23, %3[%i] : memref<?xf32>
store %cf1dot23, %4[%i] : memref<?xf32>
}
%6 = memref_cast %3 : memref<?xf32> to memref<*xf32>
%7 = memref_cast %4 : memref<?xf32> to memref<*xf32>
%8 = memref_cast %5 : memref<?xf32> to memref<*xf32>

9
mlir/test/mlir-rocm-runner/vector-transferops.mlir
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@ -44,7 +44,11 @@ func @vectransferx4(%arg0 : memref<?xf32>, %arg1 : memref<?xf32>) {
}
func @main() {
%c0 = constant 0 : index
%c1 = constant 1 : index
%c4 = constant 4 : index
%cf1 = constant 1.0 : f32
%cf1dot23 = constant 1.23 : f32
%arg0 = alloc() : memref<4xf32>
%arg1 = alloc() : memref<4xf32>
@ -52,6 +56,11 @@ func @main() {
%22 = memref_cast %arg0 : memref<4xf32> to memref<?xf32>
%23 = memref_cast %arg1 : memref<4xf32> to memref<?xf32>
scf.for %i = %c0 to %c4 step %c1 {
store %cf1dot23, %22[%i] : memref<?xf32>
store %cf1dot23, %23[%i] : memref<?xf32>
}
%cast0 = memref_cast %22 : memref<?xf32> to memref<*xf32>
%cast1 = memref_cast %23 : memref<?xf32> to memref<*xf32>

2
mlir/tools/mlir-rocm-runner/mlir-rocm-runner.cpp
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@ -16,6 +16,7 @@
#include "mlir/Conversion/GPUCommon/GPUCommonPass.h"
#include "mlir/Conversion/GPUToROCDL/GPUToROCDLPass.h"
#include "mlir/Conversion/SCFToStandard/SCFToStandard.h"
#include "mlir/Conversion/StandardToLLVM/ConvertStandardToLLVM.h"
#include "mlir/Conversion/StandardToLLVM/ConvertStandardToLLVMPass.h"
#include "mlir/Dialect/GPU/GPUDialect.h"
@ -302,6 +303,7 @@ static LogicalResult runMLIRPasses(ModuleOp m) {
configTargetFeatures();
const char gpuBinaryAnnotation[] = "rocdl.hsaco";
pm.addPass(createLowerToCFGPass());
pm.addPass(createGpuKernelOutliningPass());
auto &kernelPm = pm.nest<gpu::GPUModuleOp>();
kernelPm.addPass(createStripDebugInfoPass());