forked from OSchip/llvm-project
[X86] Add -LABEL to some FileCheck checks. NFC
llvm-svn: 345407
This commit is contained in:
Craig Topper
parent
117360cc24
commit
faf423ca74
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@ -4,9 +4,9 @@
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%shifttype = type <2 x i16>
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define %shifttype @shift2i16(%shifttype %a, %shifttype %b) {
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entry:
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; SSE2: shift2i16
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; SSE2-LABEL: shift2i16
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; SSE2: cost of 12 {{.*}} ashr
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; SSE2-CODEGEN: shift2i16
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; SSE2-CODEGEN-LABEL: shift2i16
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; SSE2-CODEGEN: psrlq
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%0 = ashr %shifttype %a , %b
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@ -16,9 +16,9 @@ entry:
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%shifttype4i16 = type <4 x i16>
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define %shifttype4i16 @shift4i16(%shifttype4i16 %a, %shifttype4i16 %b) {
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entry:
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; SSE2: shift4i16
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; SSE2-LABEL: shift4i16
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; SSE2: cost of 16 {{.*}} ashr
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; SSE2-CODEGEN: shift4i16
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; SSE2-CODEGEN-LABEL: shift4i16
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; SSE2-CODEGEN: psrad
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%0 = ashr %shifttype4i16 %a , %b
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@ -28,9 +28,9 @@ entry:
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%shifttype8i16 = type <8 x i16>
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define %shifttype8i16 @shift8i16(%shifttype8i16 %a, %shifttype8i16 %b) {
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entry:
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; SSE2: shift8i16
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; SSE2-LABEL: shift8i16
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; SSE2: cost of 32 {{.*}} ashr
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; SSE2-CODEGEN: shift8i16
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; SSE2-CODEGEN-LABEL: shift8i16
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; SSE2-CODEGEN: psraw
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%0 = ashr %shifttype8i16 %a , %b
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@ -40,9 +40,9 @@ entry:
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%shifttype16i16 = type <16 x i16>
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define %shifttype16i16 @shift16i16(%shifttype16i16 %a, %shifttype16i16 %b) {
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entry:
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; SSE2: shift16i16
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; SSE2-LABEL: shift16i16
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; SSE2: cost of 64 {{.*}} ashr
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; SSE2-CODEGEN: shift16i16
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; SSE2-CODEGEN-LABEL: shift16i16
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; SSE2-CODEGEN: psraw
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%0 = ashr %shifttype16i16 %a , %b
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@ -52,9 +52,9 @@ entry:
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%shifttype32i16 = type <32 x i16>
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define %shifttype32i16 @shift32i16(%shifttype32i16 %a, %shifttype32i16 %b) {
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entry:
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; SSE2: shift32i16
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; SSE2-LABEL: shift32i16
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; SSE2: cost of 128 {{.*}} ashr
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; SSE2-CODEGEN: shift32i16
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; SSE2-CODEGEN-LABEL: shift32i16
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; SSE2-CODEGEN: psraw
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%0 = ashr %shifttype32i16 %a , %b
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@ -64,9 +64,9 @@ entry:
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%shifttype2i32 = type <2 x i32>
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define %shifttype2i32 @shift2i32(%shifttype2i32 %a, %shifttype2i32 %b) {
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entry:
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; SSE2: shift2i32
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; SSE2-LABEL: shift2i32
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; SSE2: cost of 12 {{.*}} ashr
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; SSE2-CODEGEN: shift2i32
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; SSE2-CODEGEN-LABEL: shift2i32
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; SSE2-CODEGEN: psrlq
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%0 = ashr %shifttype2i32 %a , %b
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@ -76,9 +76,9 @@ entry:
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%shifttype4i32 = type <4 x i32>
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define %shifttype4i32 @shift4i32(%shifttype4i32 %a, %shifttype4i32 %b) {
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entry:
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; SSE2: shift4i32
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; SSE2-LABEL: shift4i32
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; SSE2: cost of 16 {{.*}} ashr
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; SSE2-CODEGEN: shift4i32
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; SSE2-CODEGEN-LABEL: shift4i32
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; SSE2-CODEGEN: psrad
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%0 = ashr %shifttype4i32 %a , %b
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@ -88,9 +88,9 @@ entry:
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%shifttype8i32 = type <8 x i32>
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define %shifttype8i32 @shift8i32(%shifttype8i32 %a, %shifttype8i32 %b) {
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entry:
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; SSE2: shift8i32
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; SSE2-LABEL: shift8i32
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; SSE2: cost of 32 {{.*}} ashr
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; SSE2-CODEGEN: shift8i32
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; SSE2-CODEGEN-LABEL: shift8i32
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; SSE2-CODEGEN: psrad
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%0 = ashr %shifttype8i32 %a , %b
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@ -100,9 +100,9 @@ entry:
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%shifttype16i32 = type <16 x i32>
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define %shifttype16i32 @shift16i32(%shifttype16i32 %a, %shifttype16i32 %b) {
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entry:
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; SSE2: shift16i32
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; SSE2-LABEL: shift16i32
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; SSE2: cost of 64 {{.*}} ashr
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; SSE2-CODEGEN: shift16i32
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; SSE2-CODEGEN-LABEL: shift16i32
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; SSE2-CODEGEN: psrad
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%0 = ashr %shifttype16i32 %a , %b
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@ -112,9 +112,9 @@ entry:
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%shifttype32i32 = type <32 x i32>
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define %shifttype32i32 @shift32i32(%shifttype32i32 %a, %shifttype32i32 %b) {
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entry:
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; SSE2: shift32i32
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; SSE2-LABEL: shift32i32
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; SSE2: cost of 128 {{.*}} ashr
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; SSE2-CODEGEN: shift32i32
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; SSE2-CODEGEN-LABEL: shift32i32
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; SSE2-CODEGEN: psrad
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%0 = ashr %shifttype32i32 %a , %b
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@ -124,9 +124,9 @@ entry:
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%shifttype2i64 = type <2 x i64>
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define %shifttype2i64 @shift2i64(%shifttype2i64 %a, %shifttype2i64 %b) {
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entry:
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; SSE2: shift2i64
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; SSE2-LABEL: shift2i64
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; SSE2: cost of 12 {{.*}} ashr
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; SSE2-CODEGEN: shift2i64
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; SSE2-CODEGEN-LABEL: shift2i64
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; SSE2-CODEGEN: psrlq
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%0 = ashr %shifttype2i64 %a , %b
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@ -136,9 +136,9 @@ entry:
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%shifttype4i64 = type <4 x i64>
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define %shifttype4i64 @shift4i64(%shifttype4i64 %a, %shifttype4i64 %b) {
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entry:
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; SSE2: shift4i64
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; SSE2-LABEL: shift4i64
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; SSE2: cost of 24 {{.*}} ashr
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; SSE2-CODEGEN: shift4i64
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; SSE2-CODEGEN-LABEL: shift4i64
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; SSE2-CODEGEN: psrlq
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%0 = ashr %shifttype4i64 %a , %b
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@ -148,9 +148,9 @@ entry:
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%shifttype8i64 = type <8 x i64>
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define %shifttype8i64 @shift8i64(%shifttype8i64 %a, %shifttype8i64 %b) {
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entry:
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; SSE2: shift8i64
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; SSE2-LABEL: shift8i64
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; SSE2: cost of 48 {{.*}} ashr
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; SSE2-CODEGEN: shift8i64
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; SSE2-CODEGEN-LABEL: shift8i64
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; SSE2-CODEGEN: psrlq
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%0 = ashr %shifttype8i64 %a , %b
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@ -160,9 +160,9 @@ entry:
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%shifttype16i64 = type <16 x i64>
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define %shifttype16i64 @shift16i64(%shifttype16i64 %a, %shifttype16i64 %b) {
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entry:
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; SSE2: shift16i64
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; SSE2-LABEL: shift16i64
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; SSE2: cost of 96 {{.*}} ashr
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; SSE2-CODEGEN: shift16i64
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; SSE2-CODEGEN-LABEL: shift16i64
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; SSE2-CODEGEN: psrlq
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%0 = ashr %shifttype16i64 %a , %b
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@ -172,9 +172,9 @@ entry:
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%shifttype32i64 = type <32 x i64>
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define %shifttype32i64 @shift32i64(%shifttype32i64 %a, %shifttype32i64 %b) {
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entry:
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; SSE2: shift32i64
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; SSE2-LABEL: shift32i64
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; SSE2: cost of 192 {{.*}} ashr
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; SSE2-CODEGEN: shift32i64
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; SSE2-CODEGEN-LABEL: shift32i64
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; SSE2-CODEGEN: psrlq
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%0 = ashr %shifttype32i64 %a , %b
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@ -184,9 +184,9 @@ entry:
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%shifttype2i8 = type <2 x i8>
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define %shifttype2i8 @shift2i8(%shifttype2i8 %a, %shifttype2i8 %b) {
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entry:
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; SSE2: shift2i8
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; SSE2-LABEL: shift2i8
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; SSE2: cost of 12 {{.*}} ashr
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; SSE2-CODEGEN: shift2i8
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; SSE2-CODEGEN-LABEL: shift2i8
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; SSE2-CODEGEN: psrlq
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%0 = ashr %shifttype2i8 %a , %b
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@ -196,9 +196,9 @@ entry:
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%shifttype4i8 = type <4 x i8>
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define %shifttype4i8 @shift4i8(%shifttype4i8 %a, %shifttype4i8 %b) {
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entry:
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; SSE2: shift4i8
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; SSE2-LABEL: shift4i8
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; SSE2: cost of 16 {{.*}} ashr
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; SSE2-CODEGEN: shift4i8
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; SSE2-CODEGEN-LABEL: shift4i8
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; SSE2-CODEGEN: psrad
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%0 = ashr %shifttype4i8 %a , %b
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@ -208,9 +208,9 @@ entry:
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%shifttype8i8 = type <8 x i8>
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define %shifttype8i8 @shift8i8(%shifttype8i8 %a, %shifttype8i8 %b) {
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entry:
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; SSE2: shift8i8
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; SSE2-LABEL: shift8i8
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; SSE2: cost of 32 {{.*}} ashr
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; SSE2-CODEGEN: shift8i8
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; SSE2-CODEGEN-LABEL: shift8i8
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; SSE2-CODEGEN: psraw
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%0 = ashr %shifttype8i8 %a , %b
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@ -220,9 +220,9 @@ entry:
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%shifttype16i8 = type <16 x i8>
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define %shifttype16i8 @shift16i8(%shifttype16i8 %a, %shifttype16i8 %b) {
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entry:
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; SSE2: shift16i8
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; SSE2-LABEL: shift16i8
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; SSE2: cost of 54 {{.*}} ashr
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; SSE2-CODEGEN: shift16i8
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; SSE2-CODEGEN-LABEL: shift16i8
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; SSE2-CODEGEN: psraw
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%0 = ashr %shifttype16i8 %a , %b
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@ -232,9 +232,9 @@ entry:
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%shifttype32i8 = type <32 x i8>
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define %shifttype32i8 @shift32i8(%shifttype32i8 %a, %shifttype32i8 %b) {
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entry:
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; SSE2: shift32i8
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; SSE2-LABEL: shift32i8
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; SSE2: cost of 108 {{.*}} ashr
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; SSE2-CODEGEN: shift32i8
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; SSE2-CODEGEN-LABEL: shift32i8
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; SSE2-CODEGEN: psraw
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%0 = ashr %shifttype32i8 %a , %b
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@ -246,9 +246,9 @@ entry:
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%shifttypec = type <2 x i16>
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define %shifttypec @shift2i16const(%shifttypec %a, %shifttypec %b) {
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entry:
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; SSE2: shift2i16const
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; SSE2-LABEL: shift2i16const
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; SSE2: cost of 4 {{.*}} ashr
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; SSE2-CODEGEN: shift2i16const
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; SSE2-CODEGEN-LABEL: shift2i16const
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; SSE2-CODEGEN: psrad $3
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%0 = ashr %shifttypec %a , <i16 3, i16 3>
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@ -258,9 +258,9 @@ entry:
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%shifttypec4i16 = type <4 x i16>
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define %shifttypec4i16 @shift4i16const(%shifttypec4i16 %a, %shifttypec4i16 %b) {
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entry:
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; SSE2: shift4i16const
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; SSE2-LABEL: shift4i16const
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; SSE2: cost of 1 {{.*}} ashr
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; SSE2-CODEGEN: shift4i16const
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; SSE2-CODEGEN-LABEL: shift4i16const
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; SSE2-CODEGEN: psrad $3
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%0 = ashr %shifttypec4i16 %a , <i16 3, i16 3, i16 3, i16 3>
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@ -270,9 +270,9 @@ entry:
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%shifttypec8i16 = type <8 x i16>
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define %shifttypec8i16 @shift8i16const(%shifttypec8i16 %a, %shifttypec8i16 %b) {
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entry:
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; SSE2: shift8i16const
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; SSE2-LABEL: shift8i16const
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; SSE2: cost of 1 {{.*}} ashr
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; SSE2-CODEGEN: shift8i16const
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; SSE2-CODEGEN-LABEL: shift8i16const
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; SSE2-CODEGEN: psraw $3
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%0 = ashr %shifttypec8i16 %a , <i16 3, i16 3, i16 3, i16 3,
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@ -284,9 +284,9 @@ entry:
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define %shifttypec16i16 @shift16i16const(%shifttypec16i16 %a,
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%shifttypec16i16 %b) {
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entry:
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; SSE2: shift16i16const
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; SSE2-LABEL: shift16i16const
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; SSE2: cost of 2 {{.*}} ashr
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; SSE2-CODEGEN: shift16i16const
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; SSE2-CODEGEN-LABEL: shift16i16const
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; SSE2-CODEGEN: psraw $3
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%0 = ashr %shifttypec16i16 %a , <i16 3, i16 3, i16 3, i16 3,
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@ -300,9 +300,9 @@ entry:
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define %shifttypec32i16 @shift32i16const(%shifttypec32i16 %a,
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%shifttypec32i16 %b) {
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entry:
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; SSE2: shift32i16const
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; SSE2-LABEL: shift32i16const
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; SSE2: cost of 4 {{.*}} ashr
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; SSE2-CODEGEN: shift32i16const
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; SSE2-CODEGEN-LABEL: shift32i16const
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; SSE2-CODEGEN: psraw $3
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%0 = ashr %shifttypec32i16 %a , <i16 3, i16 3, i16 3, i16 3,
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@ -319,9 +319,9 @@ entry:
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%shifttypec2i32 = type <2 x i32>
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define %shifttypec2i32 @shift2i32c(%shifttypec2i32 %a, %shifttypec2i32 %b) {
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entry:
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; SSE2: shift2i32c
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; SSE2-LABEL: shift2i32c
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; SSE2: cost of 4 {{.*}} ashr
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; SSE2-CODEGEN: shift2i32c
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; SSE2-CODEGEN-LABEL: shift2i32c
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; SSE2-CODEGEN: psrad $3
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%0 = ashr %shifttypec2i32 %a , <i32 3, i32 3>
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@ -331,9 +331,9 @@ entry:
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%shifttypec4i32 = type <4 x i32>
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define %shifttypec4i32 @shift4i32c(%shifttypec4i32 %a, %shifttypec4i32 %b) {
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entry:
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; SSE2: shift4i32c
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; SSE2-LABEL: shift4i32c
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; SSE2: cost of 1 {{.*}} ashr
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; SSE2-CODEGEN: shift4i32c
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; SSE2-CODEGEN-LABEL: shift4i32c
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; SSE2-CODEGEN: psrad $3
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%0 = ashr %shifttypec4i32 %a , <i32 3, i32 3, i32 3, i32 3>
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@ -343,9 +343,9 @@ entry:
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%shifttypec8i32 = type <8 x i32>
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define %shifttypec8i32 @shift8i32c(%shifttypec8i32 %a, %shifttypec8i32 %b) {
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entry:
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; SSE2: shift8i32c
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; SSE2-LABEL: shift8i32c
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; SSE2: cost of 2 {{.*}} ashr
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; SSE2-CODEGEN: shift8i32c
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; SSE2-CODEGEN-LABEL: shift8i32c
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; SSE2-CODEGEN: psrad $3
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%0 = ashr %shifttypec8i32 %a , <i32 3, i32 3, i32 3, i32 3,
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@ -356,9 +356,9 @@ entry:
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%shifttypec16i32 = type <16 x i32>
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define %shifttypec16i32 @shift16i32c(%shifttypec16i32 %a, %shifttypec16i32 %b) {
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entry:
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; SSE2: shift16i32c
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; SSE2-LABEL: shift16i32c
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; SSE2: cost of 4 {{.*}} ashr
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; SSE2-CODEGEN: shift16i32c
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; SSE2-CODEGEN-LABEL: shift16i32c
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; SSE2-CODEGEN: psrad $3
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%0 = ashr %shifttypec16i32 %a , <i32 3, i32 3, i32 3, i32 3,
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@ -371,10 +371,10 @@ entry:
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%shifttypec32i32 = type <32 x i32>
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define %shifttypec32i32 @shift32i32c(%shifttypec32i32 %a, %shifttypec32i32 %b) {
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entry:
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; SSE2: shift32i32c
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; SSE2-LABEL: shift32i32c
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; getTypeConversion fails here and promotes this to a i64.
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; SSE2: cost of 8 {{.*}} ashr
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; SSE2-CODEGEN: shift32i32c
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; SSE2-CODEGEN-LABEL: shift32i32c
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; SSE2-CODEGEN: psrad $3
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%0 = ashr %shifttypec32i32 %a , <i32 3, i32 3, i32 3, i32 3,
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i32 3, i32 3, i32 3, i32 3,
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@ -390,9 +390,9 @@ entry:
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%shifttypec2i64 = type <2 x i64>
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define %shifttypec2i64 @shift2i64c(%shifttypec2i64 %a, %shifttypec2i64 %b) {
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entry:
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; SSE2: shift2i64c
|
||||
; SSE2-LABEL: shift2i64c
|
||||
; SSE2: cost of 4 {{.*}} ashr
|
||||
; SSE2-CODEGEN: shift2i64c
|
||||
; SSE2-CODEGEN-LABEL: shift2i64c
|
||||
; SSE2-CODEGEN: psrad $3
|
||||
|
||||
%0 = ashr %shifttypec2i64 %a , <i64 3, i64 3>
|
||||
|
|
@ -402,9 +402,9 @@ entry:
|
|||
%shifttypec4i64 = type <4 x i64>
|
||||
define %shifttypec4i64 @shift4i64c(%shifttypec4i64 %a, %shifttypec4i64 %b) {
|
||||
entry:
|
||||
; SSE2: shift4i64c
|
||||
; SSE2-LABEL: shift4i64c
|
||||
; SSE2: cost of 8 {{.*}} ashr
|
||||
; SSE2-CODEGEN: shift4i64c
|
||||
; SSE2-CODEGEN-LABEL: shift4i64c
|
||||
; SSE2-CODEGEN: psrad $3
|
||||
|
||||
%0 = ashr %shifttypec4i64 %a , <i64 3, i64 3, i64 3, i64 3>
|
||||
|
|
@ -414,9 +414,9 @@ entry:
|
|||
%shifttypec8i64 = type <8 x i64>
|
||||
define %shifttypec8i64 @shift8i64c(%shifttypec8i64 %a, %shifttypec8i64 %b) {
|
||||
entry:
|
||||
; SSE2: shift8i64c
|
||||
; SSE2-LABEL: shift8i64c
|
||||
; SSE2: cost of 16 {{.*}} ashr
|
||||
; SSE2-CODEGEN: shift8i64c
|
||||
; SSE2-CODEGEN-LABEL: shift8i64c
|
||||
; SSE2-CODEGEN: psrad $3
|
||||
|
||||
%0 = ashr %shifttypec8i64 %a , <i64 3, i64 3, i64 3, i64 3,
|
||||
|
|
@ -427,9 +427,9 @@ entry:
|
|||
%shifttypec16i64 = type <16 x i64>
|
||||
define %shifttypec16i64 @shift16i64c(%shifttypec16i64 %a, %shifttypec16i64 %b) {
|
||||
entry:
|
||||
; SSE2: shift16i64c
|
||||
; SSE2-LABEL: shift16i64c
|
||||
; SSE2: cost of 32 {{.*}} ashr
|
||||
; SSE2-CODEGEN: shift16i64c
|
||||
; SSE2-CODEGEN-LABEL: shift16i64c
|
||||
; SSE2-CODEGEN: psrad $3
|
||||
|
||||
%0 = ashr %shifttypec16i64 %a , <i64 3, i64 3, i64 3, i64 3,
|
||||
|
|
@ -442,9 +442,9 @@ entry:
|
|||
%shifttypec32i64 = type <32 x i64>
|
||||
define %shifttypec32i64 @shift32i64c(%shifttypec32i64 %a, %shifttypec32i64 %b) {
|
||||
entry:
|
||||
; SSE2: shift32i64c
|
||||
; SSE2-LABEL: shift32i64c
|
||||
; SSE2: cost of 64 {{.*}} ashr
|
||||
; SSE2-CODEGEN: shift32i64c
|
||||
; SSE2-CODEGEN-LABEL: shift32i64c
|
||||
; SSE2-CODEGEN: psrad $3
|
||||
|
||||
%0 = ashr %shifttypec32i64 %a ,<i64 3, i64 3, i64 3, i64 3,
|
||||
|
|
@ -461,9 +461,9 @@ entry:
|
|||
%shifttypec2i8 = type <2 x i8>
|
||||
define %shifttypec2i8 @shift2i8c(%shifttypec2i8 %a, %shifttypec2i8 %b) {
|
||||
entry:
|
||||
; SSE2: shift2i8c
|
||||
; SSE2-LABEL: shift2i8c
|
||||
; SSE2: cost of 4 {{.*}} ashr
|
||||
; SSE2-CODEGEN: shift2i8c
|
||||
; SSE2-CODEGEN-LABEL: shift2i8c
|
||||
; SSE2-CODEGEN: psrad $3
|
||||
|
||||
%0 = ashr %shifttypec2i8 %a , <i8 3, i8 3>
|
||||
|
|
@ -473,9 +473,9 @@ entry:
|
|||
%shifttypec4i8 = type <4 x i8>
|
||||
define %shifttypec4i8 @shift4i8c(%shifttypec4i8 %a, %shifttypec4i8 %b) {
|
||||
entry:
|
||||
; SSE2: shift4i8c
|
||||
; SSE2-LABEL: shift4i8c
|
||||
; SSE2: cost of 1 {{.*}} ashr
|
||||
; SSE2-CODEGEN: shift4i8c
|
||||
; SSE2-CODEGEN-LABEL: shift4i8c
|
||||
; SSE2-CODEGEN: psrad $3
|
||||
|
||||
%0 = ashr %shifttypec4i8 %a , <i8 3, i8 3, i8 3, i8 3>
|
||||
|
|
@ -485,9 +485,9 @@ entry:
|
|||
%shifttypec8i8 = type <8 x i8>
|
||||
define %shifttypec8i8 @shift8i8c(%shifttypec8i8 %a, %shifttypec8i8 %b) {
|
||||
entry:
|
||||
; SSE2: shift8i8c
|
||||
; SSE2-LABEL: shift8i8c
|
||||
; SSE2: cost of 1 {{.*}} ashr
|
||||
; SSE2-CODEGEN: shift8i8c
|
||||
; SSE2-CODEGEN-LABEL: shift8i8c
|
||||
; SSE2-CODEGEN: psraw $3
|
||||
|
||||
%0 = ashr %shifttypec8i8 %a , <i8 3, i8 3, i8 3, i8 3,
|
||||
|
|
@ -498,9 +498,9 @@ entry:
|
|||
%shifttypec16i8 = type <16 x i8>
|
||||
define %shifttypec16i8 @shift16i8c(%shifttypec16i8 %a, %shifttypec16i8 %b) {
|
||||
entry:
|
||||
; SSE2: shift16i8c
|
||||
; SSE2-LABEL: shift16i8c
|
||||
; SSE2: cost of 4 {{.*}} ashr
|
||||
; SSE2-CODEGEN: shift16i8c
|
||||
; SSE2-CODEGEN-LABEL: shift16i8c
|
||||
; SSE2-CODEGEN: psrlw $3
|
||||
|
||||
%0 = ashr %shifttypec16i8 %a , <i8 3, i8 3, i8 3, i8 3,
|
||||
|
|
@ -513,9 +513,9 @@ entry:
|
|||
%shifttypec32i8 = type <32 x i8>
|
||||
define %shifttypec32i8 @shift32i8c(%shifttypec32i8 %a, %shifttypec32i8 %b) {
|
||||
entry:
|
||||
; SSE2: shift32i8c
|
||||
; SSE2-LABEL: shift32i8c
|
||||
; SSE2: cost of 8 {{.*}} ashr
|
||||
; SSE2-CODEGEN: shift32i8c
|
||||
; SSE2-CODEGEN-LABEL: shift32i8c
|
||||
; SSE2-CODEGEN: psrlw $3
|
||||
|
||||
%0 = ashr %shifttypec32i8 %a , <i8 3, i8 3, i8 3, i8 3,
|
||||
|
|
|
|||
|
|
@ -4,9 +4,9 @@
|
|||
%shifttype = type <2 x i16>
|
||||
define %shifttype @shift2i16(%shifttype %a, %shifttype %b) {
|
||||
entry:
|
||||
; SSE2: shift2i16
|
||||
; SSE2-LABEL: shift2i16
|
||||
; SSE2: cost of 4 {{.*}} lshr
|
||||
; SSE2-CODEGEN: shift2i16
|
||||
; SSE2-CODEGEN-LABEL: shift2i16
|
||||
; SSE2-CODEGEN: psrlq
|
||||
|
||||
%0 = lshr %shifttype %a , %b
|
||||
|
|
@ -16,9 +16,9 @@ entry:
|
|||
%shifttype4i16 = type <4 x i16>
|
||||
define %shifttype4i16 @shift4i16(%shifttype4i16 %a, %shifttype4i16 %b) {
|
||||
entry:
|
||||
; SSE2: shift4i16
|
||||
; SSE2-LABEL: shift4i16
|
||||
; SSE2: cost of 16 {{.*}} lshr
|
||||
; SSE2-CODEGEN: shift4i16
|
||||
; SSE2-CODEGEN-LABEL: shift4i16
|
||||
; SSE2-CODEGEN: psrld
|
||||
|
||||
%0 = lshr %shifttype4i16 %a , %b
|
||||
|
|
@ -28,9 +28,9 @@ entry:
|
|||
%shifttype8i16 = type <8 x i16>
|
||||
define %shifttype8i16 @shift8i16(%shifttype8i16 %a, %shifttype8i16 %b) {
|
||||
entry:
|
||||
; SSE2: shift8i16
|
||||
; SSE2-LABEL: shift8i16
|
||||
; SSE2: cost of 32 {{.*}} lshr
|
||||
; SSE2-CODEGEN: shift8i16
|
||||
; SSE2-CODEGEN-LABEL: shift8i16
|
||||
; SSE2-CODEGEN: psrlw
|
||||
|
||||
%0 = lshr %shifttype8i16 %a , %b
|
||||
|
|
@ -40,9 +40,9 @@ entry:
|
|||
%shifttype16i16 = type <16 x i16>
|
||||
define %shifttype16i16 @shift16i16(%shifttype16i16 %a, %shifttype16i16 %b) {
|
||||
entry:
|
||||
; SSE2: shift16i16
|
||||
; SSE2-LABEL: shift16i16
|
||||
; SSE2: cost of 64 {{.*}} lshr
|
||||
; SSE2-CODEGEN: shift16i16
|
||||
; SSE2-CODEGEN-LABEL: shift16i16
|
||||
; SSE2-CODEGEN: psrlw
|
||||
|
||||
%0 = lshr %shifttype16i16 %a , %b
|
||||
|
|
@ -52,9 +52,9 @@ entry:
|
|||
%shifttype32i16 = type <32 x i16>
|
||||
define %shifttype32i16 @shift32i16(%shifttype32i16 %a, %shifttype32i16 %b) {
|
||||
entry:
|
||||
; SSE2: shift32i16
|
||||
; SSE2-LABEL: shift32i16
|
||||
; SSE2: cost of 128 {{.*}} lshr
|
||||
; SSE2-CODEGEN: shift32i16
|
||||
; SSE2-CODEGEN-LABEL: shift32i16
|
||||
; SSE2-CODEGEN: psrlw
|
||||
|
||||
%0 = lshr %shifttype32i16 %a , %b
|
||||
|
|
@ -64,9 +64,9 @@ entry:
|
|||
%shifttype2i32 = type <2 x i32>
|
||||
define %shifttype2i32 @shift2i32(%shifttype2i32 %a, %shifttype2i32 %b) {
|
||||
entry:
|
||||
; SSE2: shift2i32
|
||||
; SSE2-LABEL: shift2i32
|
||||
; SSE2: cost of 4 {{.*}} lshr
|
||||
; SSE2-CODEGEN: shift2i32
|
||||
; SSE2-CODEGEN-LABEL: shift2i32
|
||||
; SSE2-CODEGEN: psrlq
|
||||
|
||||
%0 = lshr %shifttype2i32 %a , %b
|
||||
|
|
@ -76,9 +76,9 @@ entry:
|
|||
%shifttype4i32 = type <4 x i32>
|
||||
define %shifttype4i32 @shift4i32(%shifttype4i32 %a, %shifttype4i32 %b) {
|
||||
entry:
|
||||
; SSE2: shift4i32
|
||||
; SSE2-LABEL: shift4i32
|
||||
; SSE2: cost of 16 {{.*}} lshr
|
||||
; SSE2-CODEGEN: shift4i32
|
||||
; SSE2-CODEGEN-LABEL: shift4i32
|
||||
; SSE2-CODEGEN: psrld
|
||||
|
||||
%0 = lshr %shifttype4i32 %a , %b
|
||||
|
|
@ -88,9 +88,9 @@ entry:
|
|||
%shifttype8i32 = type <8 x i32>
|
||||
define %shifttype8i32 @shift8i32(%shifttype8i32 %a, %shifttype8i32 %b) {
|
||||
entry:
|
||||
; SSE2: shift8i32
|
||||
; SSE2-LABEL: shift8i32
|
||||
; SSE2: cost of 32 {{.*}} lshr
|
||||
; SSE2-CODEGEN: shift8i32
|
||||
; SSE2-CODEGEN-LABEL: shift8i32
|
||||
; SSE2-CODEGEN: psrld
|
||||
|
||||
%0 = lshr %shifttype8i32 %a , %b
|
||||
|
|
@ -100,9 +100,9 @@ entry:
|
|||
%shifttype16i32 = type <16 x i32>
|
||||
define %shifttype16i32 @shift16i32(%shifttype16i32 %a, %shifttype16i32 %b) {
|
||||
entry:
|
||||
; SSE2: shift16i32
|
||||
; SSE2-LABEL: shift16i32
|
||||
; SSE2: cost of 64 {{.*}} lshr
|
||||
; SSE2-CODEGEN: shift16i32
|
||||
; SSE2-CODEGEN-LABEL: shift16i32
|
||||
; SSE2-CODEGEN: psrld
|
||||
|
||||
%0 = lshr %shifttype16i32 %a , %b
|
||||
|
|
@ -112,9 +112,9 @@ entry:
|
|||
%shifttype32i32 = type <32 x i32>
|
||||
define %shifttype32i32 @shift32i32(%shifttype32i32 %a, %shifttype32i32 %b) {
|
||||
entry:
|
||||
; SSE2: shift32i32
|
||||
; SSE2-LABEL: shift32i32
|
||||
; SSE2: cost of 128 {{.*}} lshr
|
||||
; SSE2-CODEGEN: shift32i32
|
||||
; SSE2-CODEGEN-LABEL: shift32i32
|
||||
; SSE2-CODEGEN: psrld
|
||||
|
||||
%0 = lshr %shifttype32i32 %a , %b
|
||||
|
|
@ -124,9 +124,9 @@ entry:
|
|||
%shifttype2i64 = type <2 x i64>
|
||||
define %shifttype2i64 @shift2i64(%shifttype2i64 %a, %shifttype2i64 %b) {
|
||||
entry:
|
||||
; SSE2: shift2i64
|
||||
; SSE2-LABEL: shift2i64
|
||||
; SSE2: cost of 4 {{.*}} lshr
|
||||
; SSE2-CODEGEN: shift2i64
|
||||
; SSE2-CODEGEN-LABEL: shift2i64
|
||||
; SSE2-CODEGEN: psrlq
|
||||
|
||||
%0 = lshr %shifttype2i64 %a , %b
|
||||
|
|
@ -136,9 +136,9 @@ entry:
|
|||
%shifttype4i64 = type <4 x i64>
|
||||
define %shifttype4i64 @shift4i64(%shifttype4i64 %a, %shifttype4i64 %b) {
|
||||
entry:
|
||||
; SSE2: shift4i64
|
||||
; SSE2-LABEL: shift4i64
|
||||
; SSE2: cost of 8 {{.*}} lshr
|
||||
; SSE2-CODEGEN: shift4i64
|
||||
; SSE2-CODEGEN-LABEL: shift4i64
|
||||
; SSE2-CODEGEN: psrlq
|
||||
|
||||
%0 = lshr %shifttype4i64 %a , %b
|
||||
|
|
@ -148,9 +148,9 @@ entry:
|
|||
%shifttype8i64 = type <8 x i64>
|
||||
define %shifttype8i64 @shift8i64(%shifttype8i64 %a, %shifttype8i64 %b) {
|
||||
entry:
|
||||
; SSE2: shift8i64
|
||||
; SSE2-LABEL: shift8i64
|
||||
; SSE2: cost of 16 {{.*}} lshr
|
||||
; SSE2-CODEGEN: shift8i64
|
||||
; SSE2-CODEGEN-LABEL: shift8i64
|
||||
; SSE2-CODEGEN: psrlq
|
||||
|
||||
%0 = lshr %shifttype8i64 %a , %b
|
||||
|
|
@ -160,9 +160,9 @@ entry:
|
|||
%shifttype16i64 = type <16 x i64>
|
||||
define %shifttype16i64 @shift16i64(%shifttype16i64 %a, %shifttype16i64 %b) {
|
||||
entry:
|
||||
; SSE2: shift16i64
|
||||
; SSE2-LABEL: shift16i64
|
||||
; SSE2: cost of 32 {{.*}} lshr
|
||||
; SSE2-CODEGEN: shift16i64
|
||||
; SSE2-CODEGEN-LABEL: shift16i64
|
||||
; SSE2-CODEGEN: psrlq
|
||||
|
||||
%0 = lshr %shifttype16i64 %a , %b
|
||||
|
|
@ -172,9 +172,9 @@ entry:
|
|||
%shifttype32i64 = type <32 x i64>
|
||||
define %shifttype32i64 @shift32i64(%shifttype32i64 %a, %shifttype32i64 %b) {
|
||||
entry:
|
||||
; SSE2: shift32i64
|
||||
; SSE2-LABEL: shift32i64
|
||||
; SSE2: cost of 64 {{.*}} lshr
|
||||
; SSE2-CODEGEN: shift32i64
|
||||
; SSE2-CODEGEN-LABEL: shift32i64
|
||||
; SSE2-CODEGEN: psrlq
|
||||
|
||||
%0 = lshr %shifttype32i64 %a , %b
|
||||
|
|
@ -184,9 +184,9 @@ entry:
|
|||
%shifttype2i8 = type <2 x i8>
|
||||
define %shifttype2i8 @shift2i8(%shifttype2i8 %a, %shifttype2i8 %b) {
|
||||
entry:
|
||||
; SSE2: shift2i8
|
||||
; SSE2-LABEL: shift2i8
|
||||
; SSE2: cost of 4 {{.*}} lshr
|
||||
; SSE2-CODEGEN: shift2i8
|
||||
; SSE2-CODEGEN-LABEL: shift2i8
|
||||
; SSE2-CODEGEN: psrlq
|
||||
|
||||
%0 = lshr %shifttype2i8 %a , %b
|
||||
|
|
@ -196,9 +196,9 @@ entry:
|
|||
%shifttype4i8 = type <4 x i8>
|
||||
define %shifttype4i8 @shift4i8(%shifttype4i8 %a, %shifttype4i8 %b) {
|
||||
entry:
|
||||
; SSE2: shift4i8
|
||||
; SSE2-LABEL: shift4i8
|
||||
; SSE2: cost of 16 {{.*}} lshr
|
||||
; SSE2-CODEGEN: shift4i8
|
||||
; SSE2-CODEGEN-LABEL: shift4i8
|
||||
; SSE2-CODEGEN: psrld
|
||||
|
||||
%0 = lshr %shifttype4i8 %a , %b
|
||||
|
|
@ -208,9 +208,9 @@ entry:
|
|||
%shifttype8i8 = type <8 x i8>
|
||||
define %shifttype8i8 @shift8i8(%shifttype8i8 %a, %shifttype8i8 %b) {
|
||||
entry:
|
||||
; SSE2: shift8i8
|
||||
; SSE2-LABEL: shift8i8
|
||||
; SSE2: cost of 32 {{.*}} lshr
|
||||
; SSE2-CODEGEN: shift8i8
|
||||
; SSE2-CODEGEN-LABEL: shift8i8
|
||||
; SSE2-CODEGEN: psrlw
|
||||
|
||||
%0 = lshr %shifttype8i8 %a , %b
|
||||
|
|
@ -220,9 +220,9 @@ entry:
|
|||
%shifttype16i8 = type <16 x i8>
|
||||
define %shifttype16i8 @shift16i8(%shifttype16i8 %a, %shifttype16i8 %b) {
|
||||
entry:
|
||||
; SSE2: shift16i8
|
||||
; SSE2-LABEL: shift16i8
|
||||
; SSE2: cost of 26 {{.*}} lshr
|
||||
; SSE2-CODEGEN: shift16i8
|
||||
; SSE2-CODEGEN-LABEL: shift16i8
|
||||
; SSE2-CODEGEN: psrlw
|
||||
|
||||
%0 = lshr %shifttype16i8 %a , %b
|
||||
|
|
@ -232,9 +232,9 @@ entry:
|
|||
%shifttype32i8 = type <32 x i8>
|
||||
define %shifttype32i8 @shift32i8(%shifttype32i8 %a, %shifttype32i8 %b) {
|
||||
entry:
|
||||
; SSE2: shift32i8
|
||||
; SSE2-LABEL: shift32i8
|
||||
; SSE2: cost of 52 {{.*}} lshr
|
||||
; SSE2-CODEGEN: shift32i8
|
||||
; SSE2-CODEGEN-LABEL: shift32i8
|
||||
; SSE2-CODEGEN: psrlw
|
||||
|
||||
%0 = lshr %shifttype32i8 %a , %b
|
||||
|
|
@ -246,9 +246,9 @@ entry:
|
|||
%shifttypec = type <2 x i16>
|
||||
define %shifttypec @shift2i16const(%shifttypec %a, %shifttypec %b) {
|
||||
entry:
|
||||
; SSE2: shift2i16const
|
||||
; SSE2-LABEL: shift2i16const
|
||||
; SSE2: cost of 1 {{.*}} lshr
|
||||
; SSE2-CODEGEN: shift2i16const
|
||||
; SSE2-CODEGEN-LABEL: shift2i16const
|
||||
; SSE2-CODEGEN: psrlq $3
|
||||
|
||||
%0 = lshr %shifttypec %a , <i16 3, i16 3>
|
||||
|
|
@ -258,9 +258,9 @@ entry:
|
|||
%shifttypec4i16 = type <4 x i16>
|
||||
define %shifttypec4i16 @shift4i16const(%shifttypec4i16 %a, %shifttypec4i16 %b) {
|
||||
entry:
|
||||
; SSE2: shift4i16const
|
||||
; SSE2-LABEL: shift4i16const
|
||||
; SSE2: cost of 1 {{.*}} lshr
|
||||
; SSE2-CODEGEN: shift4i16const
|
||||
; SSE2-CODEGEN-LABEL: shift4i16const
|
||||
; SSE2-CODEGEN: psrld $3
|
||||
|
||||
%0 = lshr %shifttypec4i16 %a , <i16 3, i16 3, i16 3, i16 3>
|
||||
|
|
@ -270,9 +270,9 @@ entry:
|
|||
%shifttypec8i16 = type <8 x i16>
|
||||
define %shifttypec8i16 @shift8i16const(%shifttypec8i16 %a, %shifttypec8i16 %b) {
|
||||
entry:
|
||||
; SSE2: shift8i16const
|
||||
; SSE2-LABEL: shift8i16const
|
||||
; SSE2: cost of 1 {{.*}} lshr
|
||||
; SSE2-CODEGEN: shift8i16const
|
||||
; SSE2-CODEGEN-LABEL: shift8i16const
|
||||
; SSE2-CODEGEN: psrlw $3
|
||||
|
||||
%0 = lshr %shifttypec8i16 %a , <i16 3, i16 3, i16 3, i16 3,
|
||||
|
|
@ -284,9 +284,9 @@ entry:
|
|||
define %shifttypec16i16 @shift16i16const(%shifttypec16i16 %a,
|
||||
%shifttypec16i16 %b) {
|
||||
entry:
|
||||
; SSE2: shift16i16const
|
||||
; SSE2-LABEL: shift16i16const
|
||||
; SSE2: cost of 2 {{.*}} lshr
|
||||
; SSE2-CODEGEN: shift16i16const
|
||||
; SSE2-CODEGEN-LABEL: shift16i16const
|
||||
; SSE2-CODEGEN: psrlw $3
|
||||
|
||||
%0 = lshr %shifttypec16i16 %a , <i16 3, i16 3, i16 3, i16 3,
|
||||
|
|
@ -300,9 +300,9 @@ entry:
|
|||
define %shifttypec32i16 @shift32i16const(%shifttypec32i16 %a,
|
||||
%shifttypec32i16 %b) {
|
||||
entry:
|
||||
; SSE2: shift32i16const
|
||||
; SSE2-LABEL: shift32i16const
|
||||
; SSE2: cost of 4 {{.*}} lshr
|
||||
; SSE2-CODEGEN: shift32i16const
|
||||
; SSE2-CODEGEN-LABEL: shift32i16const
|
||||
; SSE2-CODEGEN: psrlw $3
|
||||
|
||||
%0 = lshr %shifttypec32i16 %a , <i16 3, i16 3, i16 3, i16 3,
|
||||
|
|
@ -319,9 +319,9 @@ entry:
|
|||
%shifttypec2i32 = type <2 x i32>
|
||||
define %shifttypec2i32 @shift2i32c(%shifttypec2i32 %a, %shifttypec2i32 %b) {
|
||||
entry:
|
||||
; SSE2: shift2i32c
|
||||
; SSE2-LABEL: shift2i32c
|
||||
; SSE2: cost of 1 {{.*}} lshr
|
||||
; SSE2-CODEGEN: shift2i32c
|
||||
; SSE2-CODEGEN-LABEL: shift2i32c
|
||||
; SSE2-CODEGEN: psrlq $3
|
||||
|
||||
%0 = lshr %shifttypec2i32 %a , <i32 3, i32 3>
|
||||
|
|
@ -331,9 +331,9 @@ entry:
|
|||
%shifttypec4i32 = type <4 x i32>
|
||||
define %shifttypec4i32 @shift4i32c(%shifttypec4i32 %a, %shifttypec4i32 %b) {
|
||||
entry:
|
||||
; SSE2: shift4i32c
|
||||
; SSE2-LABEL: shift4i32c
|
||||
; SSE2: cost of 1 {{.*}} lshr
|
||||
; SSE2-CODEGEN: shift4i32c
|
||||
; SSE2-CODEGEN-LABEL: shift4i32c
|
||||
; SSE2-CODEGEN: psrld $3
|
||||
|
||||
%0 = lshr %shifttypec4i32 %a , <i32 3, i32 3, i32 3, i32 3>
|
||||
|
|
@ -343,9 +343,9 @@ entry:
|
|||
%shifttypec8i32 = type <8 x i32>
|
||||
define %shifttypec8i32 @shift8i32c(%shifttypec8i32 %a, %shifttypec8i32 %b) {
|
||||
entry:
|
||||
; SSE2: shift8i32c
|
||||
; SSE2-LABEL: shift8i32c
|
||||
; SSE2: cost of 2 {{.*}} lshr
|
||||
; SSE2-CODEGEN: shift8i32c
|
||||
; SSE2-CODEGEN-LABEL: shift8i32c
|
||||
; SSE2-CODEGEN: psrld $3
|
||||
|
||||
%0 = lshr %shifttypec8i32 %a , <i32 3, i32 3, i32 3, i32 3,
|
||||
|
|
@ -356,9 +356,9 @@ entry:
|
|||
%shifttypec16i32 = type <16 x i32>
|
||||
define %shifttypec16i32 @shift16i32c(%shifttypec16i32 %a, %shifttypec16i32 %b) {
|
||||
entry:
|
||||
; SSE2: shift16i32c
|
||||
; SSE2-LABEL: shift16i32c
|
||||
; SSE2: cost of 4 {{.*}} lshr
|
||||
; SSE2-CODEGEN: shift16i32c
|
||||
; SSE2-CODEGEN-LABEL: shift16i32c
|
||||
; SSE2-CODEGEN: psrld $3
|
||||
|
||||
%0 = lshr %shifttypec16i32 %a , <i32 3, i32 3, i32 3, i32 3,
|
||||
|
|
@ -371,9 +371,9 @@ entry:
|
|||
%shifttypec32i32 = type <32 x i32>
|
||||
define %shifttypec32i32 @shift32i32c(%shifttypec32i32 %a, %shifttypec32i32 %b) {
|
||||
entry:
|
||||
; SSE2: shift32i32c
|
||||
; SSE2-LABEL: shift32i32c
|
||||
; SSE2: cost of 8 {{.*}} lshr
|
||||
; SSE2-CODEGEN: shift32i32c
|
||||
; SSE2-CODEGEN-LABEL: shift32i32c
|
||||
; SSE2-CODEGEN: psrld $3
|
||||
%0 = lshr %shifttypec32i32 %a , <i32 3, i32 3, i32 3, i32 3,
|
||||
i32 3, i32 3, i32 3, i32 3,
|
||||
|
|
@ -389,9 +389,9 @@ entry:
|
|||
%shifttypec2i64 = type <2 x i64>
|
||||
define %shifttypec2i64 @shift2i64c(%shifttypec2i64 %a, %shifttypec2i64 %b) {
|
||||
entry:
|
||||
; SSE2: shift2i64c
|
||||
; SSE2-LABEL: shift2i64c
|
||||
; SSE2: cost of 1 {{.*}} lshr
|
||||
; SSE2-CODEGEN: shift2i64c
|
||||
; SSE2-CODEGEN-LABEL: shift2i64c
|
||||
; SSE2-CODEGEN: psrlq $3
|
||||
|
||||
%0 = lshr %shifttypec2i64 %a , <i64 3, i64 3>
|
||||
|
|
@ -401,9 +401,9 @@ entry:
|
|||
%shifttypec4i64 = type <4 x i64>
|
||||
define %shifttypec4i64 @shift4i64c(%shifttypec4i64 %a, %shifttypec4i64 %b) {
|
||||
entry:
|
||||
; SSE2: shift4i64c
|
||||
; SSE2-LABEL: shift4i64c
|
||||
; SSE2: cost of 2 {{.*}} lshr
|
||||
; SSE2-CODEGEN: shift4i64c
|
||||
; SSE2-CODEGEN-LABEL: shift4i64c
|
||||
; SSE2-CODEGEN: psrlq $3
|
||||
|
||||
%0 = lshr %shifttypec4i64 %a , <i64 3, i64 3, i64 3, i64 3>
|
||||
|
|
@ -413,9 +413,9 @@ entry:
|
|||
%shifttypec8i64 = type <8 x i64>
|
||||
define %shifttypec8i64 @shift8i64c(%shifttypec8i64 %a, %shifttypec8i64 %b) {
|
||||
entry:
|
||||
; SSE2: shift8i64c
|
||||
; SSE2-LABEL: shift8i64c
|
||||
; SSE2: cost of 4 {{.*}} lshr
|
||||
; SSE2-CODEGEN: shift8i64c
|
||||
; SSE2-CODEGEN-LABEL: shift8i64c
|
||||
; SSE2-CODEGEN: psrlq $3
|
||||
|
||||
%0 = lshr %shifttypec8i64 %a , <i64 3, i64 3, i64 3, i64 3,
|
||||
|
|
@ -426,9 +426,9 @@ entry:
|
|||
%shifttypec16i64 = type <16 x i64>
|
||||
define %shifttypec16i64 @shift16i64c(%shifttypec16i64 %a, %shifttypec16i64 %b) {
|
||||
entry:
|
||||
; SSE2: shift16i64c
|
||||
; SSE2-LABEL: shift16i64c
|
||||
; SSE2: cost of 8 {{.*}} lshr
|
||||
; SSE2-CODEGEN: shift16i64c
|
||||
; SSE2-CODEGEN-LABEL: shift16i64c
|
||||
; SSE2-CODEGEN: psrlq $3
|
||||
|
||||
%0 = lshr %shifttypec16i64 %a , <i64 3, i64 3, i64 3, i64 3,
|
||||
|
|
@ -441,9 +441,9 @@ entry:
|
|||
%shifttypec32i64 = type <32 x i64>
|
||||
define %shifttypec32i64 @shift32i64c(%shifttypec32i64 %a, %shifttypec32i64 %b) {
|
||||
entry:
|
||||
; SSE2: shift32i64c
|
||||
; SSE2-LABEL: shift32i64c
|
||||
; SSE2: cost of 16 {{.*}} lshr
|
||||
; SSE2-CODEGEN: shift32i64c
|
||||
; SSE2-CODEGEN-LABEL: shift32i64c
|
||||
; SSE2-CODEGEN: psrlq $3
|
||||
|
||||
%0 = lshr %shifttypec32i64 %a ,<i64 3, i64 3, i64 3, i64 3,
|
||||
|
|
@ -460,9 +460,9 @@ entry:
|
|||
%shifttypec2i8 = type <2 x i8>
|
||||
define %shifttypec2i8 @shift2i8c(%shifttypec2i8 %a, %shifttypec2i8 %b) {
|
||||
entry:
|
||||
; SSE2: shift2i8c
|
||||
; SSE2-LABEL: shift2i8c
|
||||
; SSE2: cost of 1 {{.*}} lshr
|
||||
; SSE2-CODEGEN: shift2i8c
|
||||
; SSE2-CODEGEN-LABEL: shift2i8c
|
||||
; SSE2-CODEGEN: psrlq $3
|
||||
|
||||
%0 = lshr %shifttypec2i8 %a , <i8 3, i8 3>
|
||||
|
|
@ -472,9 +472,9 @@ entry:
|
|||
%shifttypec4i8 = type <4 x i8>
|
||||
define %shifttypec4i8 @shift4i8c(%shifttypec4i8 %a, %shifttypec4i8 %b) {
|
||||
entry:
|
||||
; SSE2: shift4i8c
|
||||
; SSE2-LABEL: shift4i8c
|
||||
; SSE2: cost of 1 {{.*}} lshr
|
||||
; SSE2-CODEGEN: shift4i8c
|
||||
; SSE2-CODEGEN-LABEL: shift4i8c
|
||||
; SSE2-CODEGEN: psrld $3
|
||||
|
||||
%0 = lshr %shifttypec4i8 %a , <i8 3, i8 3, i8 3, i8 3>
|
||||
|
|
@ -484,9 +484,9 @@ entry:
|
|||
%shifttypec8i8 = type <8 x i8>
|
||||
define %shifttypec8i8 @shift8i8c(%shifttypec8i8 %a, %shifttypec8i8 %b) {
|
||||
entry:
|
||||
; SSE2: shift8i8c
|
||||
; SSE2-LABEL: shift8i8c
|
||||
; SSE2: cost of 1 {{.*}} lshr
|
||||
; SSE2-CODEGEN: shift8i8c
|
||||
; SSE2-CODEGEN-LABEL: shift8i8c
|
||||
; SSE2-CODEGEN: psrlw $3
|
||||
|
||||
%0 = lshr %shifttypec8i8 %a , <i8 3, i8 3, i8 3, i8 3,
|
||||
|
|
@ -497,9 +497,9 @@ entry:
|
|||
%shifttypec16i8 = type <16 x i8>
|
||||
define %shifttypec16i8 @shift16i8c(%shifttypec16i8 %a, %shifttypec16i8 %b) {
|
||||
entry:
|
||||
; SSE2: shift16i8c
|
||||
; SSE2-LABEL: shift16i8c
|
||||
; SSE2: cost of 2 {{.*}} lshr
|
||||
; SSE2-CODEGEN: shift16i8c
|
||||
; SSE2-CODEGEN-LABEL: shift16i8c
|
||||
; SSE2-CODEGEN: psrlw $3
|
||||
|
||||
%0 = lshr %shifttypec16i8 %a , <i8 3, i8 3, i8 3, i8 3,
|
||||
|
|
@ -512,9 +512,9 @@ entry:
|
|||
%shifttypec32i8 = type <32 x i8>
|
||||
define %shifttypec32i8 @shift32i8c(%shifttypec32i8 %a, %shifttypec32i8 %b) {
|
||||
entry:
|
||||
; SSE2: shift32i8c
|
||||
; SSE2-LABEL: shift32i8c
|
||||
; SSE2: cost of 4 {{.*}} lshr
|
||||
; SSE2-CODEGEN: shift32i8c
|
||||
; SSE2-CODEGEN-LABEL: shift32i8c
|
||||
; SSE2-CODEGEN: psrlw $3
|
||||
|
||||
%0 = lshr %shifttypec32i8 %a , <i8 3, i8 3, i8 3, i8 3,
|
||||
|
|
|
|||
|
|
@ -4,9 +4,9 @@
|
|||
%shifttype = type <2 x i16>
|
||||
define %shifttype @shift2i16(%shifttype %a, %shifttype %b) {
|
||||
entry:
|
||||
; SSE2: shift2i16
|
||||
; SSE2-LABEL: shift2i16
|
||||
; SSE2: cost of 4 {{.*}} shl
|
||||
; SSE2-CODEGEN: shift2i16
|
||||
; SSE2-CODEGEN-LABEL: shift2i16
|
||||
; SSE2-CODEGEN: psllq
|
||||
|
||||
%0 = shl %shifttype %a , %b
|
||||
|
|
@ -16,9 +16,9 @@ entry:
|
|||
%shifttype4i16 = type <4 x i16>
|
||||
define %shifttype4i16 @shift4i16(%shifttype4i16 %a, %shifttype4i16 %b) {
|
||||
entry:
|
||||
; SSE2: shift4i16
|
||||
; SSE2-LABEL: shift4i16
|
||||
; SSE2: cost of 10 {{.*}} shl
|
||||
; SSE2-CODEGEN: shift4i16
|
||||
; SSE2-CODEGEN-LABEL: shift4i16
|
||||
; SSE2-CODEGEN: pmuludq
|
||||
|
||||
%0 = shl %shifttype4i16 %a , %b
|
||||
|
|
@ -28,9 +28,9 @@ entry:
|
|||
%shifttype8i16 = type <8 x i16>
|
||||
define %shifttype8i16 @shift8i16(%shifttype8i16 %a, %shifttype8i16 %b) {
|
||||
entry:
|
||||
; SSE2: shift8i16
|
||||
; SSE2-LABEL: shift8i16
|
||||
; SSE2: cost of 32 {{.*}} shl
|
||||
; SSE2-CODEGEN: shift8i16
|
||||
; SSE2-CODEGEN-LABEL: shift8i16
|
||||
; SSE2-CODEGEN: pmullw
|
||||
|
||||
%0 = shl %shifttype8i16 %a , %b
|
||||
|
|
@ -40,9 +40,9 @@ entry:
|
|||
%shifttype16i16 = type <16 x i16>
|
||||
define %shifttype16i16 @shift16i16(%shifttype16i16 %a, %shifttype16i16 %b) {
|
||||
entry:
|
||||
; SSE2: shift16i16
|
||||
; SSE2-LABEL: shift16i16
|
||||
; SSE2: cost of 64 {{.*}} shl
|
||||
; SSE2-CODEGEN: shift16i16
|
||||
; SSE2-CODEGEN-LABEL: shift16i16
|
||||
; SSE2-CODEGEN: pmullw
|
||||
|
||||
%0 = shl %shifttype16i16 %a , %b
|
||||
|
|
@ -52,9 +52,9 @@ entry:
|
|||
%shifttype32i16 = type <32 x i16>
|
||||
define %shifttype32i16 @shift32i16(%shifttype32i16 %a, %shifttype32i16 %b) {
|
||||
entry:
|
||||
; SSE2: shift32i16
|
||||
; SSE2-LABEL: shift32i16
|
||||
; SSE2: cost of 128 {{.*}} shl
|
||||
; SSE2-CODEGEN: shift32i16
|
||||
; SSE2-CODEGEN-LABEL: shift32i16
|
||||
; SSE2-CODEGEN: pmullw
|
||||
|
||||
%0 = shl %shifttype32i16 %a , %b
|
||||
|
|
@ -64,9 +64,9 @@ entry:
|
|||
%shifttype2i32 = type <2 x i32>
|
||||
define %shifttype2i32 @shift2i32(%shifttype2i32 %a, %shifttype2i32 %b) {
|
||||
entry:
|
||||
; SSE2: shift2i32
|
||||
; SSE2-LABEL: shift2i32
|
||||
; SSE2: cost of 4 {{.*}} shl
|
||||
; SSE2-CODEGEN: shift2i32
|
||||
; SSE2-CODEGEN-LABEL: shift2i32
|
||||
; SSE2-CODEGEN: psllq
|
||||
|
||||
%0 = shl %shifttype2i32 %a , %b
|
||||
|
|
@ -76,9 +76,9 @@ entry:
|
|||
%shifttype4i32 = type <4 x i32>
|
||||
define %shifttype4i32 @shift4i32(%shifttype4i32 %a, %shifttype4i32 %b) {
|
||||
entry:
|
||||
; SSE2: shift4i32
|
||||
; SSE2-LABEL: shift4i32
|
||||
; SSE2: cost of 10 {{.*}} shl
|
||||
; SSE2-CODEGEN: shift4i32
|
||||
; SSE2-CODEGEN-LABEL: shift4i32
|
||||
; SSE2-CODEGEN: pmuludq
|
||||
|
||||
%0 = shl %shifttype4i32 %a , %b
|
||||
|
|
@ -88,9 +88,9 @@ entry:
|
|||
%shifttype8i32 = type <8 x i32>
|
||||
define %shifttype8i32 @shift8i32(%shifttype8i32 %a, %shifttype8i32 %b) {
|
||||
entry:
|
||||
; SSE2: shift8i32
|
||||
; SSE2-LABEL: shift8i32
|
||||
; SSE2: cost of 20 {{.*}} shl
|
||||
; SSE2-CODEGEN: shift8i32
|
||||
; SSE2-CODEGEN-LABEL: shift8i32
|
||||
; SSE2-CODEGEN: pmuludq
|
||||
|
||||
%0 = shl %shifttype8i32 %a , %b
|
||||
|
|
@ -100,9 +100,9 @@ entry:
|
|||
%shifttype16i32 = type <16 x i32>
|
||||
define %shifttype16i32 @shift16i32(%shifttype16i32 %a, %shifttype16i32 %b) {
|
||||
entry:
|
||||
; SSE2: shift16i32
|
||||
; SSE2-LABEL: shift16i32
|
||||
; SSE2: cost of 40 {{.*}} shl
|
||||
; SSE2-CODEGEN: shift16i32
|
||||
; SSE2-CODEGEN-LABEL: shift16i32
|
||||
; SSE2-CODEGEN: pmuludq
|
||||
|
||||
%0 = shl %shifttype16i32 %a , %b
|
||||
|
|
@ -112,9 +112,9 @@ entry:
|
|||
%shifttype32i32 = type <32 x i32>
|
||||
define %shifttype32i32 @shift32i32(%shifttype32i32 %a, %shifttype32i32 %b) {
|
||||
entry:
|
||||
; SSE2: shift32i32
|
||||
; SSE2-LABEL: shift32i32
|
||||
; SSE2: cost of 80 {{.*}} shl
|
||||
; SSE2-CODEGEN: shift32i32
|
||||
; SSE2-CODEGEN-LABEL: shift32i32
|
||||
; SSE2-CODEGEN: pmuludq
|
||||
|
||||
%0 = shl %shifttype32i32 %a , %b
|
||||
|
|
@ -124,9 +124,9 @@ entry:
|
|||
%shifttype2i64 = type <2 x i64>
|
||||
define %shifttype2i64 @shift2i64(%shifttype2i64 %a, %shifttype2i64 %b) {
|
||||
entry:
|
||||
; SSE2: shift2i64
|
||||
; SSE2-LABEL: shift2i64
|
||||
; SSE2: cost of 4 {{.*}} shl
|
||||
; SSE2-CODEGEN: shift2i64
|
||||
; SSE2-CODEGEN-LABEL: shift2i64
|
||||
; SSE2-CODEGEN: psllq
|
||||
|
||||
%0 = shl %shifttype2i64 %a , %b
|
||||
|
|
@ -136,9 +136,9 @@ entry:
|
|||
%shifttype4i64 = type <4 x i64>
|
||||
define %shifttype4i64 @shift4i64(%shifttype4i64 %a, %shifttype4i64 %b) {
|
||||
entry:
|
||||
; SSE2: shift4i64
|
||||
; SSE2-LABEL: shift4i64
|
||||
; SSE2: cost of 8 {{.*}} shl
|
||||
; SSE2-CODEGEN: shift4i64
|
||||
; SSE2-CODEGEN-LABEL: shift4i64
|
||||
; SSE2-CODEGEN: psllq
|
||||
|
||||
%0 = shl %shifttype4i64 %a , %b
|
||||
|
|
@ -148,9 +148,9 @@ entry:
|
|||
%shifttype8i64 = type <8 x i64>
|
||||
define %shifttype8i64 @shift8i64(%shifttype8i64 %a, %shifttype8i64 %b) {
|
||||
entry:
|
||||
; SSE2: shift8i64
|
||||
; SSE2-LABEL: shift8i64
|
||||
; SSE2: cost of 16 {{.*}} shl
|
||||
; SSE2-CODEGEN: shift8i64
|
||||
; SSE2-CODEGEN-LABEL: shift8i64
|
||||
; SSE2-CODEGEN: psllq
|
||||
|
||||
%0 = shl %shifttype8i64 %a , %b
|
||||
|
|
@ -160,9 +160,9 @@ entry:
|
|||
%shifttype16i64 = type <16 x i64>
|
||||
define %shifttype16i64 @shift16i64(%shifttype16i64 %a, %shifttype16i64 %b) {
|
||||
entry:
|
||||
; SSE2: shift16i64
|
||||
; SSE2-LABEL: shift16i64
|
||||
; SSE2: cost of 32 {{.*}} shl
|
||||
; SSE2-CODEGEN: shift16i64
|
||||
; SSE2-CODEGEN-LABEL: shift16i64
|
||||
; SSE2-CODEGEN: psllq
|
||||
|
||||
%0 = shl %shifttype16i64 %a , %b
|
||||
|
|
@ -172,9 +172,9 @@ entry:
|
|||
%shifttype32i64 = type <32 x i64>
|
||||
define %shifttype32i64 @shift32i64(%shifttype32i64 %a, %shifttype32i64 %b) {
|
||||
entry:
|
||||
; SSE2: shift32i64
|
||||
; SSE2-LABEL: shift32i64
|
||||
; SSE2: cost of 64 {{.*}} shl
|
||||
; SSE2-CODEGEN: shift32i64
|
||||
; SSE2-CODEGEN-LABEL: shift32i64
|
||||
; SSE2-CODEGEN: psllq
|
||||
|
||||
%0 = shl %shifttype32i64 %a , %b
|
||||
|
|
@ -184,9 +184,9 @@ entry:
|
|||
%shifttype2i8 = type <2 x i8>
|
||||
define %shifttype2i8 @shift2i8(%shifttype2i8 %a, %shifttype2i8 %b) {
|
||||
entry:
|
||||
; SSE2: shift2i8
|
||||
; SSE2-LABEL: shift2i8
|
||||
; SSE2: cost of 4 {{.*}} shl
|
||||
; SSE2-CODEGEN: shift2i8
|
||||
; SSE2-CODEGEN-LABEL: shift2i8
|
||||
; SSE2-CODEGEN: psllq
|
||||
|
||||
%0 = shl %shifttype2i8 %a , %b
|
||||
|
|
@ -196,9 +196,9 @@ entry:
|
|||
%shifttype4i8 = type <4 x i8>
|
||||
define %shifttype4i8 @shift4i8(%shifttype4i8 %a, %shifttype4i8 %b) {
|
||||
entry:
|
||||
; SSE2: shift4i8
|
||||
; SSE2-LABEL: shift4i8
|
||||
; SSE2: cost of 10 {{.*}} shl
|
||||
; SSE2-CODEGEN: shift4i8
|
||||
; SSE2-CODEGEN-LABEL: shift4i8
|
||||
; SSE2-CODEGEN: pmuludq
|
||||
|
||||
%0 = shl %shifttype4i8 %a , %b
|
||||
|
|
@ -208,9 +208,9 @@ entry:
|
|||
%shifttype8i8 = type <8 x i8>
|
||||
define %shifttype8i8 @shift8i8(%shifttype8i8 %a, %shifttype8i8 %b) {
|
||||
entry:
|
||||
; SSE2: shift8i8
|
||||
; SSE2-LABEL: shift8i8
|
||||
; SSE2: cost of 32 {{.*}} shl
|
||||
; SSE2-CODEGEN: shift8i8
|
||||
; SSE2-CODEGEN-LABEL: shift8i8
|
||||
; SSE2-CODEGEN: pmullw
|
||||
|
||||
%0 = shl %shifttype8i8 %a , %b
|
||||
|
|
@ -220,9 +220,9 @@ entry:
|
|||
%shifttype16i8 = type <16 x i8>
|
||||
define %shifttype16i8 @shift16i8(%shifttype16i8 %a, %shifttype16i8 %b) {
|
||||
entry:
|
||||
; SSE2: shift16i8
|
||||
; SSE2-LABEL: shift16i8
|
||||
; SSE2: cost of 26 {{.*}} shl
|
||||
; SSE2-CODEGEN: shift16i8
|
||||
; SSE2-CODEGEN-LABEL: shift16i8
|
||||
; SSE2-CODEGEN: psllw
|
||||
|
||||
%0 = shl %shifttype16i8 %a , %b
|
||||
|
|
@ -232,9 +232,9 @@ entry:
|
|||
%shifttype32i8 = type <32 x i8>
|
||||
define %shifttype32i8 @shift32i8(%shifttype32i8 %a, %shifttype32i8 %b) {
|
||||
entry:
|
||||
; SSE2: shift32i8
|
||||
; SSE2-LABEL: shift32i8
|
||||
; SSE2: cost of 52 {{.*}} shl
|
||||
; SSE2-CODEGEN: shift32i8
|
||||
; SSE2-CODEGEN-LABEL: shift32i8
|
||||
; SSE2-CODEGEN: psllw
|
||||
|
||||
%0 = shl %shifttype32i8 %a , %b
|
||||
|
|
@ -246,9 +246,9 @@ entry:
|
|||
%shifttypec = type <2 x i16>
|
||||
define %shifttypec @shift2i16const(%shifttypec %a, %shifttypec %b) {
|
||||
entry:
|
||||
; SSE2: shift2i16const
|
||||
; SSE2-LABEL: shift2i16const
|
||||
; SSE2: cost of 1 {{.*}} shl
|
||||
; SSE2-CODEGEN: shift2i16const
|
||||
; SSE2-CODEGEN-LABEL: shift2i16const
|
||||
; SSE2-CODEGEN: psllq $3
|
||||
|
||||
%0 = shl %shifttypec %a , <i16 3, i16 3>
|
||||
|
|
@ -258,9 +258,9 @@ entry:
|
|||
%shifttypec4i16 = type <4 x i16>
|
||||
define %shifttypec4i16 @shift4i16const(%shifttypec4i16 %a, %shifttypec4i16 %b) {
|
||||
entry:
|
||||
; SSE2: shift4i16const
|
||||
; SSE2-LABEL: shift4i16const
|
||||
; SSE2: cost of 1 {{.*}} shl
|
||||
; SSE2-CODEGEN: shift4i16const
|
||||
; SSE2-CODEGEN-LABEL: shift4i16const
|
||||
; SSE2-CODEGEN: pslld $3
|
||||
|
||||
%0 = shl %shifttypec4i16 %a , <i16 3, i16 3, i16 3, i16 3>
|
||||
|
|
@ -270,9 +270,9 @@ entry:
|
|||
%shifttypec8i16 = type <8 x i16>
|
||||
define %shifttypec8i16 @shift8i16const(%shifttypec8i16 %a, %shifttypec8i16 %b) {
|
||||
entry:
|
||||
; SSE2: shift8i16const
|
||||
; SSE2-LABEL: shift8i16const
|
||||
; SSE2: cost of 1 {{.*}} shl
|
||||
; SSE2-CODEGEN: shift8i16const
|
||||
; SSE2-CODEGEN-LABEL: shift8i16const
|
||||
; SSE2-CODEGEN: psllw $3
|
||||
|
||||
%0 = shl %shifttypec8i16 %a , <i16 3, i16 3, i16 3, i16 3,
|
||||
|
|
@ -284,9 +284,9 @@ entry:
|
|||
define %shifttypec16i16 @shift16i16const(%shifttypec16i16 %a,
|
||||
%shifttypec16i16 %b) {
|
||||
entry:
|
||||
; SSE2: shift16i16const
|
||||
; SSE2-LABEL: shift16i16const
|
||||
; SSE2: cost of 2 {{.*}} shl
|
||||
; SSE2-CODEGEN: shift16i16const
|
||||
; SSE2-CODEGEN-LABEL: shift16i16const
|
||||
; SSE2-CODEGEN: psllw $3
|
||||
|
||||
%0 = shl %shifttypec16i16 %a , <i16 3, i16 3, i16 3, i16 3,
|
||||
|
|
@ -300,9 +300,9 @@ entry:
|
|||
define %shifttypec32i16 @shift32i16const(%shifttypec32i16 %a,
|
||||
%shifttypec32i16 %b) {
|
||||
entry:
|
||||
; SSE2: shift32i16const
|
||||
; SSE2-LABEL: shift32i16const
|
||||
; SSE2: cost of 4 {{.*}} shl
|
||||
; SSE2-CODEGEN: shift32i16const
|
||||
; SSE2-CODEGEN-LABEL: shift32i16const
|
||||
; SSE2-CODEGEN: psllw $3
|
||||
|
||||
%0 = shl %shifttypec32i16 %a , <i16 3, i16 3, i16 3, i16 3,
|
||||
|
|
@ -319,9 +319,9 @@ entry:
|
|||
%shifttypec2i32 = type <2 x i32>
|
||||
define %shifttypec2i32 @shift2i32c(%shifttypec2i32 %a, %shifttypec2i32 %b) {
|
||||
entry:
|
||||
; SSE2: shift2i32c
|
||||
; SSE2-LABEL: shift2i32c
|
||||
; SSE2: cost of 1 {{.*}} shl
|
||||
; SSE2-CODEGEN: shift2i32c
|
||||
; SSE2-CODEGEN-LABEL: shift2i32c
|
||||
; SSE2-CODEGEN: psllq $3
|
||||
|
||||
%0 = shl %shifttypec2i32 %a , <i32 3, i32 3>
|
||||
|
|
@ -331,9 +331,9 @@ entry:
|
|||
%shifttypec4i32 = type <4 x i32>
|
||||
define %shifttypec4i32 @shift4i32c(%shifttypec4i32 %a, %shifttypec4i32 %b) {
|
||||
entry:
|
||||
; SSE2: shift4i32c
|
||||
; SSE2-LABEL: shift4i32c
|
||||
; SSE2: cost of 1 {{.*}} shl
|
||||
; SSE2-CODEGEN: shift4i32c
|
||||
; SSE2-CODEGEN-LABEL: shift4i32c
|
||||
; SSE2-CODEGEN: pslld $3
|
||||
|
||||
%0 = shl %shifttypec4i32 %a , <i32 3, i32 3, i32 3, i32 3>
|
||||
|
|
@ -343,9 +343,9 @@ entry:
|
|||
%shifttypec8i32 = type <8 x i32>
|
||||
define %shifttypec8i32 @shift8i32c(%shifttypec8i32 %a, %shifttypec8i32 %b) {
|
||||
entry:
|
||||
; SSE2: shift8i32c
|
||||
; SSE2-LABEL: shift8i32c
|
||||
; SSE2: cost of 2 {{.*}} shl
|
||||
; SSE2-CODEGEN: shift8i32c
|
||||
; SSE2-CODEGEN-LABEL: shift8i32c
|
||||
; SSE2-CODEGEN: pslld $3
|
||||
|
||||
%0 = shl %shifttypec8i32 %a , <i32 3, i32 3, i32 3, i32 3,
|
||||
|
|
@ -356,9 +356,9 @@ entry:
|
|||
%shifttypec16i32 = type <16 x i32>
|
||||
define %shifttypec16i32 @shift16i32c(%shifttypec16i32 %a, %shifttypec16i32 %b) {
|
||||
entry:
|
||||
; SSE2: shift16i32c
|
||||
; SSE2-LABEL: shift16i32c
|
||||
; SSE2: cost of 4 {{.*}} shl
|
||||
; SSE2-CODEGEN: shift16i32c
|
||||
; SSE2-CODEGEN-LABEL: shift16i32c
|
||||
; SSE2-CODEGEN: pslld $3
|
||||
|
||||
%0 = shl %shifttypec16i32 %a , <i32 3, i32 3, i32 3, i32 3,
|
||||
|
|
@ -371,9 +371,9 @@ entry:
|
|||
%shifttypec32i32 = type <32 x i32>
|
||||
define %shifttypec32i32 @shift32i32c(%shifttypec32i32 %a, %shifttypec32i32 %b) {
|
||||
entry:
|
||||
; SSE2: shift32i32c
|
||||
; SSE2-LABEL: shift32i32c
|
||||
; SSE2: cost of 8 {{.*}} shl
|
||||
; SSE2-CODEGEN: shift32i32c
|
||||
; SSE2-CODEGEN-LABEL: shift32i32c
|
||||
; SSE2-CODEGEN: pslld $3
|
||||
%0 = shl %shifttypec32i32 %a , <i32 3, i32 3, i32 3, i32 3,
|
||||
i32 3, i32 3, i32 3, i32 3,
|
||||
|
|
@ -389,9 +389,9 @@ entry:
|
|||
%shifttypec2i64 = type <2 x i64>
|
||||
define %shifttypec2i64 @shift2i64c(%shifttypec2i64 %a, %shifttypec2i64 %b) {
|
||||
entry:
|
||||
; SSE2: shift2i64c
|
||||
; SSE2-LABEL: shift2i64c
|
||||
; SSE2: cost of 1 {{.*}} shl
|
||||
; SSE2-CODEGEN: shift2i64c
|
||||
; SSE2-CODEGEN-LABEL: shift2i64c
|
||||
; SSE2-CODEGEN: psllq $3
|
||||
|
||||
%0 = shl %shifttypec2i64 %a , <i64 3, i64 3>
|
||||
|
|
@ -401,9 +401,9 @@ entry:
|
|||
%shifttypec4i64 = type <4 x i64>
|
||||
define %shifttypec4i64 @shift4i64c(%shifttypec4i64 %a, %shifttypec4i64 %b) {
|
||||
entry:
|
||||
; SSE2: shift4i64c
|
||||
; SSE2-LABEL: shift4i64c
|
||||
; SSE2: cost of 2 {{.*}} shl
|
||||
; SSE2-CODEGEN: shift4i64c
|
||||
; SSE2-CODEGEN-LABEL: shift4i64c
|
||||
; SSE2-CODEGEN: psllq $3
|
||||
|
||||
%0 = shl %shifttypec4i64 %a , <i64 3, i64 3, i64 3, i64 3>
|
||||
|
|
@ -413,9 +413,9 @@ entry:
|
|||
%shifttypec8i64 = type <8 x i64>
|
||||
define %shifttypec8i64 @shift8i64c(%shifttypec8i64 %a, %shifttypec8i64 %b) {
|
||||
entry:
|
||||
; SSE2: shift8i64c
|
||||
; SSE2-LABEL: shift8i64c
|
||||
; SSE2: cost of 4 {{.*}} shl
|
||||
; SSE2-CODEGEN: shift8i64c
|
||||
; SSE2-CODEGEN-LABEL: shift8i64c
|
||||
; SSE2-CODEGEN: psllq $3
|
||||
|
||||
%0 = shl %shifttypec8i64 %a , <i64 3, i64 3, i64 3, i64 3,
|
||||
|
|
@ -426,9 +426,9 @@ entry:
|
|||
%shifttypec16i64 = type <16 x i64>
|
||||
define %shifttypec16i64 @shift16i64c(%shifttypec16i64 %a, %shifttypec16i64 %b) {
|
||||
entry:
|
||||
; SSE2: shift16i64c
|
||||
; SSE2-LABEL: shift16i64c
|
||||
; SSE2: cost of 8 {{.*}} shl
|
||||
; SSE2-CODEGEN: shift16i64c
|
||||
; SSE2-CODEGEN-LABEL: shift16i64c
|
||||
; SSE2-CODEGEN: psllq $3
|
||||
|
||||
%0 = shl %shifttypec16i64 %a , <i64 3, i64 3, i64 3, i64 3,
|
||||
|
|
@ -441,9 +441,9 @@ entry:
|
|||
%shifttypec32i64 = type <32 x i64>
|
||||
define %shifttypec32i64 @shift32i64c(%shifttypec32i64 %a, %shifttypec32i64 %b) {
|
||||
entry:
|
||||
; SSE2: shift32i64c
|
||||
; SSE2-LABEL: shift32i64c
|
||||
; SSE2: cost of 16 {{.*}} shl
|
||||
; SSE2-CODEGEN: shift32i64c
|
||||
; SSE2-CODEGEN-LABEL: shift32i64c
|
||||
; SSE2-CODEGEN: psllq $3
|
||||
|
||||
%0 = shl %shifttypec32i64 %a ,<i64 3, i64 3, i64 3, i64 3,
|
||||
|
|
@ -460,9 +460,9 @@ entry:
|
|||
%shifttypec2i8 = type <2 x i8>
|
||||
define %shifttypec2i8 @shift2i8c(%shifttypec2i8 %a, %shifttypec2i8 %b) {
|
||||
entry:
|
||||
; SSE2: shift2i8c
|
||||
; SSE2-LABEL: shift2i8c
|
||||
; SSE2: cost of 1 {{.*}} shl
|
||||
; SSE2-CODEGEN: shift2i8c
|
||||
; SSE2-CODEGEN-LABEL: shift2i8c
|
||||
; SSE2-CODEGEN: psllq $3
|
||||
|
||||
%0 = shl %shifttypec2i8 %a , <i8 3, i8 3>
|
||||
|
|
@ -472,9 +472,9 @@ entry:
|
|||
%shifttypec4i8 = type <4 x i8>
|
||||
define %shifttypec4i8 @shift4i8c(%shifttypec4i8 %a, %shifttypec4i8 %b) {
|
||||
entry:
|
||||
; SSE2: shift4i8c
|
||||
; SSE2-LABEL: shift4i8c
|
||||
; SSE2: cost of 1 {{.*}} shl
|
||||
; SSE2-CODEGEN: shift4i8c
|
||||
; SSE2-CODEGEN-LABEL: shift4i8c
|
||||
; SSE2-CODEGEN: pslld $3
|
||||
|
||||
%0 = shl %shifttypec4i8 %a , <i8 3, i8 3, i8 3, i8 3>
|
||||
|
|
@ -484,9 +484,9 @@ entry:
|
|||
%shifttypec8i8 = type <8 x i8>
|
||||
define %shifttypec8i8 @shift8i8c(%shifttypec8i8 %a, %shifttypec8i8 %b) {
|
||||
entry:
|
||||
; SSE2: shift8i8c
|
||||
; SSE2-LABEL: shift8i8c
|
||||
; SSE2: cost of 1 {{.*}} shl
|
||||
; SSE2-CODEGEN: shift8i8c
|
||||
; SSE2-CODEGEN-LABEL: shift8i8c
|
||||
; SSE2-CODEGEN: psllw $3
|
||||
|
||||
%0 = shl %shifttypec8i8 %a , <i8 3, i8 3, i8 3, i8 3,
|
||||
|
|
@ -497,9 +497,9 @@ entry:
|
|||
%shifttypec16i8 = type <16 x i8>
|
||||
define %shifttypec16i8 @shift16i8c(%shifttypec16i8 %a, %shifttypec16i8 %b) {
|
||||
entry:
|
||||
; SSE2: shift16i8c
|
||||
; SSE2-LABEL: shift16i8c
|
||||
; SSE2: cost of 2 {{.*}} shl
|
||||
; SSE2-CODEGEN: shift16i8c
|
||||
; SSE2-CODEGEN-LABEL: shift16i8c
|
||||
; SSE2-CODEGEN: psllw $3
|
||||
|
||||
%0 = shl %shifttypec16i8 %a , <i8 3, i8 3, i8 3, i8 3,
|
||||
|
|
@ -512,9 +512,9 @@ entry:
|
|||
%shifttypec32i8 = type <32 x i8>
|
||||
define %shifttypec32i8 @shift32i8c(%shifttypec32i8 %a, %shifttypec32i8 %b) {
|
||||
entry:
|
||||
; SSE2: shift32i8c
|
||||
; SSE2-LABEL: shift32i8c
|
||||
; SSE2: cost of 4 {{.*}} shl
|
||||
; SSE2-CODEGEN: shift32i8c
|
||||
; SSE2-CODEGEN-LABEL: shift32i8c
|
||||
; SSE2-CODEGEN: psllw $3
|
||||
|
||||
%0 = shl %shifttypec32i8 %a , <i8 3, i8 3, i8 3, i8 3,
|
||||
|
|
|
|||
Loading…
Reference in New Issue