forked from OSchip/llvm-project
Add MIPS DSP register classes. Set actions of DSP vector operations and override
TargetLowering's callback functions. llvm-svn: 164431
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@ -129,6 +129,22 @@ MipsTargetLowering(MipsTargetMachine &TM)
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addRegisterClass(MVT::i32, &Mips::CPU16RegsRegClass);
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}
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if (Subtarget->hasDSP()) {
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MVT::SimpleValueType VecTys[2] = {MVT::v2i16, MVT::v4i8};
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for (unsigned i = 0; i < array_lengthof(VecTys); ++i) {
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addRegisterClass(VecTys[i], &Mips::DSPRegsRegClass);
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// Expand all builtin opcodes.
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for (unsigned Opc = 0; Opc < ISD::BUILTIN_OP_END; ++Opc)
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setOperationAction(Opc, VecTys[i], Expand);
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setOperationAction(ISD::LOAD, VecTys[i], Legal);
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setOperationAction(ISD::STORE, VecTys[i], Legal);
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setOperationAction(ISD::BITCAST, VecTys[i], Legal);
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}
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}
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if (!TM.Options.UseSoftFloat) {
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addRegisterClass(MVT::f32, &Mips::FGR32RegClass);
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@ -269,6 +285,9 @@ MipsTargetLowering(MipsTargetMachine &TM)
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setOperationAction(ISD::VACOPY, MVT::Other, Expand);
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setOperationAction(ISD::VAEND, MVT::Other, Expand);
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setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::i64, Custom);
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setOperationAction(ISD::INTRINSIC_W_CHAIN, MVT::i64, Custom);
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// Use the default for now
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setOperationAction(ISD::STACKSAVE, MVT::Other, Expand);
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setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand);
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@ -803,6 +822,26 @@ SDValue MipsTargetLowering::PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI)
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return SDValue();
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}
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void
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MipsTargetLowering::LowerOperationWrapper(SDNode *N,
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SmallVectorImpl<SDValue> &Results,
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SelectionDAG &DAG) const {
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SDValue Res = LowerOperation(SDValue(N, 0), DAG);
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for (unsigned I = 0, E = Res->getNumValues(); I != E; ++I)
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Results.push_back(Res.getValue(I));
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}
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void
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MipsTargetLowering::ReplaceNodeResults(SDNode *N,
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SmallVectorImpl<SDValue> &Results,
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SelectionDAG &DAG) const {
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SDValue Res = LowerOperation(SDValue(N, 0), DAG);
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for (unsigned I = 0, E = Res->getNumValues(); I != E; ++I)
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Results.push_back(Res.getValue(I));
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}
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SDValue MipsTargetLowering::
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LowerOperation(SDValue Op, SelectionDAG &DAG) const
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{
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@ -146,9 +146,19 @@ namespace llvm {
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virtual bool allowsUnalignedMemoryAccesses (EVT VT) const;
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virtual void LowerOperationWrapper(SDNode *N,
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SmallVectorImpl<SDValue> &Results,
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SelectionDAG &DAG) const;
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/// LowerOperation - Provide custom lowering hooks for some operations.
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virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
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/// ReplaceNodeResults - Replace the results of node with an illegal result
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/// type with new values built out of custom code.
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///
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virtual void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue>&Results,
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SelectionDAG &DAG) const;
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/// getTargetNodeName - This method returns the name of a target specific
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// DAG node.
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virtual const char *getTargetNodeName(unsigned Opcode) const;
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