Move the code that creates instances of MipsInstrInfo and MipsFrameLowering out

of MipsTargetMachine.cpp.

llvm-svn: 161191

llvm/lib/Target/Mips/Mips16FrameLowering.cpp

@@ -80,3 +80,8 @@ void Mips16FrameLowering::
 processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
                                      RegScavenger *RS) const {
 }
+
+const MipsFrameLowering *
+llvm::createMips16FrameLowering(const MipsSubtarget &ST) {
+  return new Mips16FrameLowering(ST);
+}

llvm/lib/Target/Mips/Mips16InstrInfo.cpp

@@ -126,3 +126,7 @@ void Mips16InstrInfo::ExpandRetRA16(MachineBasicBlock &MBB,
                                   unsigned Opc) const {
   BuildMI(MBB, I, I->getDebugLoc(), get(Opc));
 }
+
+const MipsInstrInfo *llvm::createMips16InstrInfo(MipsTargetMachine &TM) {
+  return new Mips16InstrInfo(TM);
+}

llvm/lib/Target/Mips/MipsFrameLowering.cpp

@@ -15,6 +15,7 @@
 #include "MipsAnalyzeImmediate.h"
 #include "MipsInstrInfo.h"
 #include "MipsMachineFunction.h"
+#include "MipsTargetMachine.h"
 #include "MCTargetDesc/MipsBaseInfo.h"
 #include "llvm/Function.h"
 #include "llvm/CodeGen/MachineFrameInfo.h"
@@ -81,6 +82,14 @@ using namespace llvm;
 //
 //===----------------------------------------------------------------------===//
 
+const MipsFrameLowering *MipsFrameLowering::create(MipsTargetMachine &TM,
+                                                   const MipsSubtarget &ST) {
+  if (TM.getSubtargetImpl()->inMips16Mode())
+    return llvm::createMips16FrameLowering(ST);
+
+  return llvm::createMipsSEFrameLowering(ST);
+}
+
 // hasFP - Return true if the specified function should have a dedicated frame
 // pointer register.  This is true if the function has variable sized allocas or
 // if frame pointer elimination is disabled.

llvm/lib/Target/Mips/MipsFrameLowering.h

@@ -30,9 +30,16 @@ public:
     : TargetFrameLowering(StackGrowsDown, sti.hasMips64() ? 16 : 8, 0,
                           sti.hasMips64() ? 16 : 8), STI(sti) {}
 
+  static const MipsFrameLowering *create(MipsTargetMachine &TM,
+                                         const MipsSubtarget &ST);
+
   bool hasFP(const MachineFunction &MF) const;
 };
 
+/// Create MipsInstrInfo objects.
+const MipsFrameLowering *createMips16FrameLowering(const MipsSubtarget &ST);
+const MipsFrameLowering *createMipsSEFrameLowering(const MipsSubtarget &ST);
+
 } // End llvm namespace
 
 #endif

llvm/lib/Target/Mips/MipsInstrInfo.cpp

@@ -31,6 +31,13 @@ MipsInstrInfo::MipsInstrInfo(MipsTargetMachine &tm, unsigned UncondBr)
   : MipsGenInstrInfo(Mips::ADJCALLSTACKDOWN, Mips::ADJCALLSTACKUP),
     TM(tm), UncondBrOpc(UncondBr) {}
 
+const MipsInstrInfo *MipsInstrInfo::create(MipsTargetMachine &TM) {
+  if (TM.getSubtargetImpl()->inMips16Mode())
+    return llvm::createMips16InstrInfo(TM);
+
+  return llvm::createMipsSEInstrInfo(TM);
+}
+
 bool MipsInstrInfo::isZeroImm(const MachineOperand &op) const {
   return op.isImm() && op.getImm() == 0;
 }

llvm/lib/Target/Mips/MipsInstrInfo.h

@@ -33,6 +33,8 @@ protected:
 public:
   explicit MipsInstrInfo(MipsTargetMachine &TM, unsigned UncondBrOpc);
 
+  static const MipsInstrInfo *create(MipsTargetMachine &TM);
+
   /// Branch Analysis
   virtual bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
                              MachineBasicBlock *&FBB,
@@ -98,6 +100,10 @@ namespace Mips {
                 MipsAnalyzeImmediate::Inst *LastInst);
 }
 
+/// Create MipsInstrInfo objects.
+const MipsInstrInfo *createMips16InstrInfo(MipsTargetMachine &TM);
+const MipsInstrInfo *createMipsSEInstrInfo(MipsTargetMachine &TM);
+
 }
 
 #endif

llvm/lib/Target/Mips/MipsSEFrameLowering.cpp

@@ -203,3 +203,8 @@ processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
   if (hasFP(MF))
     MRI.setPhysRegUsed(FP);
 }
+
+const MipsFrameLowering *
+llvm::createMipsSEFrameLowering(const MipsSubtarget &ST) {
+  return new MipsSEFrameLowering(ST);
+}

llvm/lib/Target/Mips/MipsSEInstrInfo.cpp

@@ -314,3 +314,7 @@ void MipsSEInstrInfo::ExpandBuildPairF64(MachineBasicBlock &MBB,
   BuildMI(MBB, I, dl, Mtc1Tdd, TRI.getSubReg(DstReg, Mips::sub_fpodd))
     .addReg(HiReg);
 }
+
+const MipsInstrInfo *llvm::createMipsSEInstrInfo(MipsTargetMachine &TM) {
+  return new MipsSEInstrInfo(TM);
+}

llvm/lib/Target/Mips/MipsTargetMachine.cpp

@@ -13,10 +13,8 @@
 
 #include "MipsTargetMachine.h"
 #include "Mips.h"
-#include "Mips16FrameLowering.h"
+#include "MipsFrameLowering.h"
-#include "Mips16InstrInfo.h"
+#include "MipsInstrInfo.h"
-#include "MipsSEFrameLowering.h"
-#include "MipsSEInstrInfo.h"
 #include "llvm/PassManager.h"
 #include "llvm/CodeGen/Passes.h"
 #include "llvm/Support/TargetRegistry.h"
@@ -30,29 +28,6 @@ extern "C" void LLVMInitializeMipsTarget() {
   RegisterTargetMachine<MipselTargetMachine> B(TheMips64elTarget);
 }
 
-static const MipsInstrInfo *genInstrInfo(MipsTargetMachine &TM) {
-  const MipsInstrInfo *II;
-
-  if (TM.getSubtargetImpl()->inMips16Mode())
-    II = new Mips16InstrInfo(TM);
-  else
-    II = new MipsSEInstrInfo(TM);
-
-  return II;
-}
-
-static const MipsFrameLowering *genFrameLowering(MipsTargetMachine &TM,
-                                                 const MipsSubtarget &ST) {
-  const MipsFrameLowering *FL;
-
-  if (TM.getSubtargetImpl()->inMips16Mode())
-    FL = new Mips16FrameLowering(ST);
-  else
-    FL = new MipsSEFrameLowering(ST);
-
-  return FL;
-}
-
 // DataLayout --> Big-endian, 32-bit pointer/ABI/alignment
 // The stack is always 8 byte aligned
 // On function prologue, the stack is created by decrementing
@@ -75,8 +50,8 @@ MipsTargetMachine(const Target &T, StringRef TT,
                (Subtarget.isABI_N64() ?
                 "E-p:64:64:64-i8:8:32-i16:16:32-i64:64:64-f128:128:128-n32" :
                 "E-p:32:32:32-i8:8:32-i16:16:32-i64:64:64-n32")),
-    InstrInfo(genInstrInfo(*this)),
+    InstrInfo(MipsInstrInfo::create(*this)),
-    FrameLowering(genFrameLowering(*this, Subtarget)),
+    FrameLowering(MipsFrameLowering::create(*this, Subtarget)),
     TLInfo(*this), TSInfo(*this), JITInfo() {
 }