forked from OSchip/llvm-project
[mlir] Tighten strided layout specification.
Clarify that the strided layout specification is represented by a single semi-affine map. Differential Revision: https://reviews.llvm.org/D110921
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@ -319,7 +319,7 @@ inline bool TensorType::classof(Type type) {
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//===----------------------------------------------------------------------===//
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/// Returns the strides of the MemRef if the layout map is in strided form.
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/// MemRefs with layout maps in strided form include:
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/// MemRefs with a layout map in strided form include:
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/// 1. empty or identity layout map, in which case the stride information is
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/// the canonical form computed from sizes;
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/// 2. single affine map layout of the form `K + k0 * d0 + ... kn * dn`,
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@ -328,14 +328,13 @@ inline bool TensorType::classof(Type type) {
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/// A stride specification is a list of integer values that are either static
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/// or dynamic (encoded with getDynamicStrideOrOffset()). Strides encode the
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/// distance in the number of elements between successive entries along a
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/// particular dimension. For example, `memref<42x16xf32, (64 * d0 + d1)>`
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/// specifies a view into a non-contiguous memory region of `42` by `16` `f32`
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/// elements in which the distance between two consecutive elements along the
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/// outer dimension is `1` and the distance between two consecutive elements
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/// along the inner dimension is `64`.
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/// particular dimension.
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///
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/// Returns whether a simple strided form can be extracted from the composition
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/// of the layout map.
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/// For example, `memref<42x16xf32, (64 * d0 + d1)>` specifies a view into a
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/// non-contiguous memory region of `42` by `16` `f32` elements in which the
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/// distance between two consecutive elements along the outer dimension is `1`
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/// and the distance between two consecutive elements along the inner dimension
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/// is `64`.
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///
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/// The convention is that the strides for dimensions d0, .. dn appear in
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/// order to make indexing intuitive into the result.
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@ -509,14 +509,16 @@ def Builtin_MemRef : Builtin_Type<"MemRef", [
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##### Strided MemRef
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A memref may specify strides as part of its type. A stride specification is
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a list of integer values that are either static or `?` (dynamic case).
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A memref may specify a strided layout as part of its type. A stride
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specification is a list of integer values that are either static or `?`
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(dynamic case).
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Strides encode the distance, in number of elements, in (linear) memory
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between successive entries along a particular dimension. A stride
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specification is syntactic sugar for an equivalent strided memref
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representation using semi-affine maps. For example,
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`memref<42x16xf32, offset: 33, strides: [1, 64]>` specifies a non-contiguous
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memory region of `42` by `16` `f32` elements such that:
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representation with a *single* semi-affine map.
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For example, `memref<42x16xf32, offset: 33, strides: [1, 64]>` specifies a
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non-contiguous memory region of `42` by `16` `f32` elements such that:
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1. the minimal size of the enclosing memory region must be
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`33 + 42 * 1 + 16 * 64 = 1066` elements;
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@ -773,16 +773,13 @@ LogicalResult mlir::getStridesAndOffset(MemRefType t,
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AffineExpr &offset) {
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auto affineMaps = t.getAffineMaps();
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if (affineMaps.size() > 1)
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return failure();
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if (!affineMaps.empty() && affineMaps.back().getNumResults() != 1)
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return failure();
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AffineMap m;
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if (!affineMaps.empty()) {
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m = affineMaps.back();
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for (size_t i = affineMaps.size() - 1; i > 0; --i)
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m = m.compose(affineMaps[i - 1]);
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assert(!m.isIdentity() && "unexpected identity map");
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}
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AffineMap m = affineMaps.empty() ? AffineMap() : affineMaps.back();
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auto zero = getAffineConstantExpr(0, t.getContext());
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auto one = getAffineConstantExpr(1, t.getContext());
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@ -790,7 +787,7 @@ LogicalResult mlir::getStridesAndOffset(MemRefType t,
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strides.assign(t.getRank(), zero);
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// Canonical case for empty map.
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if (!m) {
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if (!m || m.isIdentity()) {
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// 0-D corner case, offset is already 0.
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if (t.getRank() == 0)
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return success();
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@ -59,9 +59,6 @@ func @f(%0: index) {
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%30 = memref.alloc()[%0] : memref<f32, affine_map<()[M]->(123)>>
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// CHECK: MemRefType offset: 123 strides:
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%100 = memref.alloc(%0, %0)[%0, %0] : memref<?x?x16xf32, affine_map<(i, j, k)[M, N]->(i + j, j, k)>, affine_map<(i, j, k)[M, N]->(M * i + N * j + k + 1)>>
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// CHECK: MemRefType offset: 1 strides: ?, ?, 1
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%101 = memref.alloc() : memref<3x4x5xf32, affine_map<(i, j, k)->(i floordiv 4 + j + k)>>
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// CHECK: MemRefType memref<3x4x5xf32, affine_map<(d0, d1, d2) -> (d0 floordiv 4 + d1 + d2)>> cannot be converted to strided form
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%102 = memref.alloc() : memref<3x4x5xf32, affine_map<(i, j, k)->(i ceildiv 4 + j + k)>>
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@ -2,7 +2,6 @@ add_mlir_unittest(MLIRIRTests
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AttributeTest.cpp
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DialectTest.cpp
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InterfaceAttachmentTest.cpp
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MemRefTypeTest.cpp
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OperationSupportTest.cpp
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ShapedTypeTest.cpp
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SubElementInterfaceTest.cpp
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@ -1,50 +0,0 @@
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//===- MemRefTypeTest.cpp - MemRefType unit tests -------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "mlir/IR/AffineMap.h"
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#include "mlir/IR/BuiltinTypes.h"
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#include "gtest/gtest.h"
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using namespace mlir;
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using namespace mlir::detail;
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namespace {
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TEST(MemRefTypeTest, GetStridesAndOffset) {
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MLIRContext context;
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SmallVector<int64_t> shape({2, 3, 4});
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Type f32 = FloatType::getF32(&context);
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AffineMap map1 = makeStridedLinearLayoutMap({12, 4, 1}, 5, &context);
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MemRefType type1 = MemRefType::get(shape, f32, {map1});
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SmallVector<int64_t> strides1;
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int64_t offset1 = -1;
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LogicalResult res1 = getStridesAndOffset(type1, strides1, offset1);
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ASSERT_TRUE(res1.succeeded());
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ASSERT_EQ(3u, strides1.size());
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EXPECT_EQ(12, strides1[0]);
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EXPECT_EQ(4, strides1[1]);
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EXPECT_EQ(1, strides1[2]);
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ASSERT_EQ(5, offset1);
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AffineMap map2 = AffineMap::getPermutationMap({1, 2, 0}, &context);
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AffineMap map3 = makeStridedLinearLayoutMap({8, 2, 1}, 0, &context);
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MemRefType type2 = MemRefType::get(shape, f32, {map2, map3});
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SmallVector<int64_t> strides2;
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int64_t offset2 = -1;
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LogicalResult res2 = getStridesAndOffset(type2, strides2, offset2);
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ASSERT_TRUE(res2.succeeded());
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ASSERT_EQ(3u, strides2.size());
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EXPECT_EQ(1, strides2[0]);
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EXPECT_EQ(8, strides2[1]);
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EXPECT_EQ(2, strides2[2]);
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ASSERT_EQ(0, offset2);
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}
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} // end namespace
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