[mlir] Tighten strided layout specification.

Clarify that the strided layout specification is represented by a single semi-affine map.

Differential Revision: https://reviews.llvm.org/D110921
This commit is contained in:
Nicolas Vasilache 2021-10-01 11:54:29 +00:00
parent 566690b067
commit fab634b4e2
6 changed files with 19 additions and 75 deletions

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@ -319,7 +319,7 @@ inline bool TensorType::classof(Type type) {
//===----------------------------------------------------------------------===//
/// Returns the strides of the MemRef if the layout map is in strided form.
/// MemRefs with layout maps in strided form include:
/// MemRefs with a layout map in strided form include:
/// 1. empty or identity layout map, in which case the stride information is
/// the canonical form computed from sizes;
/// 2. single affine map layout of the form `K + k0 * d0 + ... kn * dn`,
@ -328,14 +328,13 @@ inline bool TensorType::classof(Type type) {
/// A stride specification is a list of integer values that are either static
/// or dynamic (encoded with getDynamicStrideOrOffset()). Strides encode the
/// distance in the number of elements between successive entries along a
/// particular dimension. For example, `memref<42x16xf32, (64 * d0 + d1)>`
/// specifies a view into a non-contiguous memory region of `42` by `16` `f32`
/// elements in which the distance between two consecutive elements along the
/// outer dimension is `1` and the distance between two consecutive elements
/// along the inner dimension is `64`.
/// particular dimension.
///
/// Returns whether a simple strided form can be extracted from the composition
/// of the layout map.
/// For example, `memref<42x16xf32, (64 * d0 + d1)>` specifies a view into a
/// non-contiguous memory region of `42` by `16` `f32` elements in which the
/// distance between two consecutive elements along the outer dimension is `1`
/// and the distance between two consecutive elements along the inner dimension
/// is `64`.
///
/// The convention is that the strides for dimensions d0, .. dn appear in
/// order to make indexing intuitive into the result.

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@ -509,14 +509,16 @@ def Builtin_MemRef : Builtin_Type<"MemRef", [
##### Strided MemRef
A memref may specify strides as part of its type. A stride specification is
a list of integer values that are either static or `?` (dynamic case).
A memref may specify a strided layout as part of its type. A stride
specification is a list of integer values that are either static or `?`
(dynamic case).
Strides encode the distance, in number of elements, in (linear) memory
between successive entries along a particular dimension. A stride
specification is syntactic sugar for an equivalent strided memref
representation using semi-affine maps. For example,
`memref<42x16xf32, offset: 33, strides: [1, 64]>` specifies a non-contiguous
memory region of `42` by `16` `f32` elements such that:
representation with a *single* semi-affine map.
For example, `memref<42x16xf32, offset: 33, strides: [1, 64]>` specifies a
non-contiguous memory region of `42` by `16` `f32` elements such that:
1. the minimal size of the enclosing memory region must be
`33 + 42 * 1 + 16 * 64 = 1066` elements;

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@ -773,16 +773,13 @@ LogicalResult mlir::getStridesAndOffset(MemRefType t,
AffineExpr &offset) {
auto affineMaps = t.getAffineMaps();
if (affineMaps.size() > 1)
return failure();
if (!affineMaps.empty() && affineMaps.back().getNumResults() != 1)
return failure();
AffineMap m;
if (!affineMaps.empty()) {
m = affineMaps.back();
for (size_t i = affineMaps.size() - 1; i > 0; --i)
m = m.compose(affineMaps[i - 1]);
assert(!m.isIdentity() && "unexpected identity map");
}
AffineMap m = affineMaps.empty() ? AffineMap() : affineMaps.back();
auto zero = getAffineConstantExpr(0, t.getContext());
auto one = getAffineConstantExpr(1, t.getContext());
@ -790,7 +787,7 @@ LogicalResult mlir::getStridesAndOffset(MemRefType t,
strides.assign(t.getRank(), zero);
// Canonical case for empty map.
if (!m) {
if (!m || m.isIdentity()) {
// 0-D corner case, offset is already 0.
if (t.getRank() == 0)
return success();

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@ -59,9 +59,6 @@ func @f(%0: index) {
%30 = memref.alloc()[%0] : memref<f32, affine_map<()[M]->(123)>>
// CHECK: MemRefType offset: 123 strides:
%100 = memref.alloc(%0, %0)[%0, %0] : memref<?x?x16xf32, affine_map<(i, j, k)[M, N]->(i + j, j, k)>, affine_map<(i, j, k)[M, N]->(M * i + N * j + k + 1)>>
// CHECK: MemRefType offset: 1 strides: ?, ?, 1
%101 = memref.alloc() : memref<3x4x5xf32, affine_map<(i, j, k)->(i floordiv 4 + j + k)>>
// CHECK: MemRefType memref<3x4x5xf32, affine_map<(d0, d1, d2) -> (d0 floordiv 4 + d1 + d2)>> cannot be converted to strided form
%102 = memref.alloc() : memref<3x4x5xf32, affine_map<(i, j, k)->(i ceildiv 4 + j + k)>>

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@ -2,7 +2,6 @@ add_mlir_unittest(MLIRIRTests
AttributeTest.cpp
DialectTest.cpp
InterfaceAttachmentTest.cpp
MemRefTypeTest.cpp
OperationSupportTest.cpp
ShapedTypeTest.cpp
SubElementInterfaceTest.cpp

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@ -1,50 +0,0 @@
//===- MemRefTypeTest.cpp - MemRefType unit tests -------------------------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#include "mlir/IR/AffineMap.h"
#include "mlir/IR/BuiltinTypes.h"
#include "gtest/gtest.h"
using namespace mlir;
using namespace mlir::detail;
namespace {
TEST(MemRefTypeTest, GetStridesAndOffset) {
MLIRContext context;
SmallVector<int64_t> shape({2, 3, 4});
Type f32 = FloatType::getF32(&context);
AffineMap map1 = makeStridedLinearLayoutMap({12, 4, 1}, 5, &context);
MemRefType type1 = MemRefType::get(shape, f32, {map1});
SmallVector<int64_t> strides1;
int64_t offset1 = -1;
LogicalResult res1 = getStridesAndOffset(type1, strides1, offset1);
ASSERT_TRUE(res1.succeeded());
ASSERT_EQ(3u, strides1.size());
EXPECT_EQ(12, strides1[0]);
EXPECT_EQ(4, strides1[1]);
EXPECT_EQ(1, strides1[2]);
ASSERT_EQ(5, offset1);
AffineMap map2 = AffineMap::getPermutationMap({1, 2, 0}, &context);
AffineMap map3 = makeStridedLinearLayoutMap({8, 2, 1}, 0, &context);
MemRefType type2 = MemRefType::get(shape, f32, {map2, map3});
SmallVector<int64_t> strides2;
int64_t offset2 = -1;
LogicalResult res2 = getStridesAndOffset(type2, strides2, offset2);
ASSERT_TRUE(res2.succeeded());
ASSERT_EQ(3u, strides2.size());
EXPECT_EQ(1, strides2[0]);
EXPECT_EQ(8, strides2[1]);
EXPECT_EQ(2, strides2[2]);
ASSERT_EQ(0, offset2);
}
} // end namespace