forked from OSchip/llvm-project
[SimplifyCFG] ReduceSwitchRange: Improve on the case where the SubThreshold doesn't trigger
llvm-svn: 361728
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@ -5552,18 +5552,6 @@ static bool ReduceSwitchRange(SwitchInst *SI, IRBuilder<> &Builder,
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BestDistance = Values[I] - Values[I - 1];
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}
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}
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uint64_t Base = 0;
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// Now transform the values such that they start at zero and ascend.
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if (Values[BestIndex] >= SubThreshold) {
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Base = Values[BestIndex];
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MadeChanges = true;
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for (auto &V : Values)
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V = (APInt(BitWidth, V) - Base).getLimitedValue();
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}
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// Now we have signed numbers that have been shifted so that, given enough
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// precision, there are no negative values. Since the rest of the transform
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// is bitwise only, we switch now to an unsigned representation.
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// This transform can be done speculatively because it is so cheap - it
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// results in a single rotate operation being inserted.
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@ -5575,8 +5563,10 @@ static bool ReduceSwitchRange(SwitchInst *SI, IRBuilder<> &Builder,
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// one element and LLVM disallows duplicate cases, Shift is guaranteed to be
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// less than 64.
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unsigned Shift = 64;
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// We need to store this from _before_ the transform
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uint64_t BestIndexXor = Values[BestIndex];
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for (auto &V : Values)
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Shift = std::min(Shift, countTrailingZeros(V));
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Shift = std::min(Shift, countTrailingZeros(V ^ BestIndexXor));
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assert(Shift < 64);
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if (Shift > 0) {
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MadeChanges = true;
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@ -5584,6 +5574,26 @@ static bool ReduceSwitchRange(SwitchInst *SI, IRBuilder<> &Builder,
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V >>= Shift;
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}
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// We Xor against Values[] (any element will do) because the if we do not
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// start at zero, but also don't meet the SubThreshold, then we still might
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// share common rights bits, and if this transform succeeds
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// then we should insert the subtraction anyways, because the rotate trick
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// below to avoid a branch needs the shifted away bits to be zero.
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// Now transform the values such that they start at zero and ascend. Do not
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// do this if the shift reduces the lowest value to less than SubThreshold,
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// or if the subtraction is less than SubThreshold and it does not enable a
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// rotate.
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uint64_t Base = 0;
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if ((BestIndexXor >= SubThreshold && Shift == 0) ||
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(Shift > countTrailingZeros(BestIndexXor) &&
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Values[BestIndex] >= SubThreshold)) {
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Base = BestIndexXor;
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MadeChanges = true;
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for (auto &V : Values)
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V = (APInt(BitWidth, V) - Base).getLimitedValue();
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}
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if (!MadeChanges)
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// We didn't do anything.
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return false;
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@ -5614,7 +5624,7 @@ static bool ReduceSwitchRange(SwitchInst *SI, IRBuilder<> &Builder,
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for (auto Case : SI->cases()) {
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auto *Orig = Case.getCaseValue();
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auto Sub = Orig->getValue() - APInt(Ty->getBitWidth(), Base);
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auto Sub = Orig->getValue() - Base;
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Case.setValue(cast<ConstantInt>(ConstantInt::get(Ty, Sub.lshr(Shift))));
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}
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return true;
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@ -234,10 +234,10 @@ three:
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define i8 @test7(i8 %a) optsize {
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; CHECK-LABEL: @test7(
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; CHECK-NEXT: [[TMP1:%.*]] = sub i8 [[A:%.*]], -36
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; CHECK-NEXT: [[TMP2:%.*]] = lshr i8 [[TMP1]], 2
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; CHECK-NEXT: [[TMP3:%.*]] = shl i8 [[TMP1]], 6
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; CHECK-NEXT: [[TMP4:%.*]] = or i8 [[TMP2]], [[TMP3]]
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; CHECK-NEXT: [[TMP1:%.*]] = lshr i8 [[A:%.*]], 2
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; CHECK-NEXT: [[TMP2:%.*]] = shl i8 [[A]], 6
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; CHECK-NEXT: [[TMP3:%.*]] = or i8 [[TMP1]], [[TMP2]]
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; CHECK-NEXT: [[TMP4:%.*]] = sub i8 [[TMP3]], 55
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; CHECK-NEXT: [[TMP5:%.*]] = icmp ult i8 [[TMP4]], 4
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; CHECK-NEXT: br i1 [[TMP5]], label [[SWITCH_LOOKUP:%.*]], label [[DEF:%.*]]
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; CHECK: switch.lookup:
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