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[X86][AVX2] Cleaned up test triple and regenerated tests. 

llvm-svn: 292946
This commit is contained in:
Simon Pilgrim 2017-01-24 16:53:09 +00:00
parent f7e822534e
commit fa6afd1bc6
1 changed files with 2 additions and 14 deletions
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16
llvm/test/CodeGen/X86/avx2-intrinsics-x86-upgrade.ll
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@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: llc < %s -mtriple=x86_64-apple-darwin -march=x86 -mattr=avx2 | FileCheck %s
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=avx2 | FileCheck %s
define <16 x i16> @test_x86_avx2_pblendw(<16 x i16> %a0, <16 x i16> %a1) {
; CHECK-LABEL: test_x86_avx2_pblendw:
@ -385,7 +385,6 @@ define <32 x i8> @mm256_max_epi8(<32 x i8> %a0, <32 x i8> %a1) {
; CHECK: ## BB#0:
; CHECK-NEXT: vpmaxsb %ymm1, %ymm0, %ymm0
; CHECK-NEXT: retl
;
%res = call <32 x i8> @llvm.x86.avx2.pmaxs.b(<32 x i8> %a0, <32 x i8> %a1)
ret <32 x i8> %res
}
@ -396,7 +395,6 @@ define <16 x i16> @mm256_max_epi16(<16 x i16> %a0, <16 x i16> %a1) {
; CHECK: ## BB#0:
; CHECK-NEXT: vpmaxsw %ymm1, %ymm0, %ymm0
; CHECK-NEXT: retl
;
%res = call <16 x i16> @llvm.x86.avx2.pmaxs.w(<16 x i16> %a0, <16 x i16> %a1)
ret <16 x i16> %res
}
@ -407,7 +405,6 @@ define <8 x i32> @mm256_max_epi32(<8 x i32> %a0, <8 x i32> %a1) {
; CHECK: ## BB#0:
; CHECK-NEXT: vpmaxsd %ymm1, %ymm0, %ymm0
; CHECK-NEXT: retl
;
%res = call <8 x i32> @llvm.x86.avx2.pmaxs.d(<8 x i32> %a0, <8 x i32> %a1)
ret <8 x i32> %res
}
@ -418,7 +415,6 @@ define <32 x i8> @mm256_max_epu8(<32 x i8> %a0, <32 x i8> %a1) {
; CHECK: ## BB#0:
; CHECK-NEXT: vpmaxub %ymm1, %ymm0, %ymm0
; CHECK-NEXT: retl
;
%res = call <32 x i8> @llvm.x86.avx2.pmaxu.b(<32 x i8> %a0, <32 x i8> %a1)
ret <32 x i8> %res
}
@ -429,7 +425,6 @@ define <16 x i16> @mm256_max_epu16(<16 x i16> %a0, <16 x i16> %a1) {
; CHECK: ## BB#0:
; CHECK-NEXT: vpmaxuw %ymm1, %ymm0, %ymm0
; CHECK-NEXT: retl
;
%res = call <16 x i16> @llvm.x86.avx2.pmaxu.w(<16 x i16> %a0, <16 x i16> %a1)
ret <16 x i16> %res
}
@ -440,7 +435,6 @@ define <8 x i32> @mm256_max_epu32(<8 x i32> %a0, <8 x i32> %a1) {
; CHECK: ## BB#0:
; CHECK-NEXT: vpmaxud %ymm1, %ymm0, %ymm0
; CHECK-NEXT: retl
;
%res = call <8 x i32> @llvm.x86.avx2.pmaxu.d(<8 x i32> %a0, <8 x i32> %a1)
ret <8 x i32> %res
}
@ -451,7 +445,6 @@ define <32 x i8> @mm256_min_epi8(<32 x i8> %a0, <32 x i8> %a1) {
; CHECK: ## BB#0:
; CHECK-NEXT: vpminsb %ymm1, %ymm0, %ymm0
; CHECK-NEXT: retl
;
%res = call <32 x i8> @llvm.x86.avx2.pmins.b(<32 x i8> %a0, <32 x i8> %a1)
ret <32 x i8> %res
}
@ -462,7 +455,6 @@ define <16 x i16> @mm256_min_epi16(<16 x i16> %a0, <16 x i16> %a1) {
; CHECK: ## BB#0:
; CHECK-NEXT: vpminsw %ymm1, %ymm0, %ymm0
; CHECK-NEXT: retl
;
%res = call <16 x i16> @llvm.x86.avx2.pmins.w(<16 x i16> %a0, <16 x i16> %a1)
ret <16 x i16> %res
}
@ -473,7 +465,6 @@ define <8 x i32> @mm256_min_epi32(<8 x i32> %a0, <8 x i32> %a1) {
; CHECK: ## BB#0:
; CHECK-NEXT: vpminsd %ymm1, %ymm0, %ymm0
; CHECK-NEXT: retl
;
%res = call <8 x i32> @llvm.x86.avx2.pmins.d(<8 x i32> %a0, <8 x i32> %a1)
ret <8 x i32> %res
}
@ -484,7 +475,6 @@ define <32 x i8> @mm256_min_epu8(<32 x i8> %a0, <32 x i8> %a1) {
; CHECK: ## BB#0:
; CHECK-NEXT: vpminub %ymm1, %ymm0, %ymm0
; CHECK-NEXT: retl
;
%res = call <32 x i8> @llvm.x86.avx2.pminu.b(<32 x i8> %a0, <32 x i8> %a1)
ret <32 x i8> %res
}
@ -495,7 +485,6 @@ define <16 x i16> @mm256_min_epu16(<16 x i16> %a0, <16 x i16> %a1) {
; CHECK: ## BB#0:
; CHECK-NEXT: vpminuw %ymm1, %ymm0, %ymm0
; CHECK-NEXT: retl
;
%res = call <16 x i16> @llvm.x86.avx2.pminu.w(<16 x i16> %a0, <16 x i16> %a1)
ret <16 x i16> %res
}
@ -506,7 +495,6 @@ define <8 x i32> @mm256_min_epu32(<8 x i32> %a0, <8 x i32> %a1) {
; CHECK: ## BB#0:
; CHECK-NEXT: vpminud %ymm1, %ymm0, %ymm0
; CHECK-NEXT: retl
;
%res = call <8 x i32> @llvm.x86.avx2.pminu.d(<8 x i32> %a0, <8 x i32> %a1)
ret <8 x i32> %res
}