forked from OSchip/llvm-project
[X86][SSE] Add test cases from PR44379
This commit is contained in:
Simon Pilgrim
parent
4b4fbae24a
commit
f9c28dc9a5
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@ -1773,6 +1773,39 @@ define <16 x i8> @shuffle_v16i8_zz_zz_zz_zz_zz_zz_zz_zz_zz_zz_01_02_03_04_05_06(
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ret <16 x i8> %shuffle
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}
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; PR44379
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define <16 x i8> @shuffle_v16i8_02_03_04_05_06_07_00_01_10_11_12_013_14_15_08_09(<16 x i8> %a) {
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; SSE-LABEL: shuffle_v16i8_02_03_04_05_06_07_00_01_10_11_12_013_14_15_08_09:
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; SSE: # %bb.0:
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; SSE-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[1,2,3,0,4,5,6,7]
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; SSE-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,5,6,7,4]
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; SSE-NEXT: retq
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;
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; AVX1-LABEL: shuffle_v16i8_02_03_04_05_06_07_00_01_10_11_12_013_14_15_08_09:
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; AVX1: # %bb.0:
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; AVX1-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[1,2,3,0,4,5,6,7]
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; AVX1-NEXT: vpshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,5,6,7,4]
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; AVX1-NEXT: retq
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;
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; AVX2-SLOW-LABEL: shuffle_v16i8_02_03_04_05_06_07_00_01_10_11_12_013_14_15_08_09:
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; AVX2-SLOW: # %bb.0:
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; AVX2-SLOW-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[1,2,3,0,4,5,6,7]
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; AVX2-SLOW-NEXT: vpshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,5,6,7,4]
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; AVX2-SLOW-NEXT: retq
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;
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; AVX2-FAST-LABEL: shuffle_v16i8_02_03_04_05_06_07_00_01_10_11_12_013_14_15_08_09:
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; AVX2-FAST: # %bb.0:
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; AVX2-FAST-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[2,3,4,5,6,7,0,1,10,11,12,13,14,15,8,9]
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; AVX2-FAST-NEXT: retq
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;
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; AVX512VL-LABEL: shuffle_v16i8_02_03_04_05_06_07_00_01_10_11_12_013_14_15_08_09:
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; AVX512VL: # %bb.0:
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; AVX512VL-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[2,3,4,5,6,7,0,1,10,11,12,13,14,15,8,9]
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; AVX512VL-NEXT: retq
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%shuffle = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 8, i32 9>
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ret <16 x i8> %shuffle
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}
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define <16 x i8> @PR12412(<16 x i8> %inval1, <16 x i8> %inval2) {
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; SSE2-LABEL: PR12412:
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; SSE2: # %bb.0: # %entry
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@ -3058,6 +3058,54 @@ define <32 x i8> @shuffle_v32i8_31_32_33_34_35_36_37_38_39_40_41_42_43_44_45_46_
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ret <32 x i8> %shuffle
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}
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; PR44379
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define <32 x i8> @shuffle_v32i8_02_03_04_05_06_07_00_01_10_11_12_13_14_15_08_09_18_19_20_21_22_23_16_17_26_27_28_29_30_31_24_25(<32 x i8> %a) {
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; AVX1-LABEL: shuffle_v32i8_02_03_04_05_06_07_00_01_10_11_12_13_14_15_08_09_18_19_20_21_22_23_16_17_26_27_28_29_30_31_24_25:
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; AVX1: # %bb.0:
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; AVX1-NEXT: vpshuflw {{.*#+}} xmm1 = xmm0[1,2,3,0,4,5,6,7]
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; AVX1-NEXT: vpshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,5,6,7,4]
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; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0
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; AVX1-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[1,2,3,0,4,5,6,7]
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; AVX1-NEXT: vpshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,5,6,7,4]
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; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
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; AVX1-NEXT: retq
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;
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; AVX2-SLOW-LABEL: shuffle_v32i8_02_03_04_05_06_07_00_01_10_11_12_13_14_15_08_09_18_19_20_21_22_23_16_17_26_27_28_29_30_31_24_25:
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; AVX2-SLOW: # %bb.0:
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; AVX2-SLOW-NEXT: vpshuflw {{.*#+}} ymm0 = ymm0[1,2,3,0,4,5,6,7,9,10,11,8,12,13,14,15]
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; AVX2-SLOW-NEXT: vpshufhw {{.*#+}} ymm0 = ymm0[0,1,2,3,5,6,7,4,8,9,10,11,13,14,15,12]
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; AVX2-SLOW-NEXT: retq
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;
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; AVX2-FAST-LABEL: shuffle_v32i8_02_03_04_05_06_07_00_01_10_11_12_13_14_15_08_09_18_19_20_21_22_23_16_17_26_27_28_29_30_31_24_25:
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; AVX2-FAST: # %bb.0:
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; AVX2-FAST-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[2,3,4,5,6,7,0,1,10,11,12,13,14,15,8,9,18,19,20,21,22,23,16,17,26,27,28,29,30,31,24,25]
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; AVX2-FAST-NEXT: retq
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;
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; AVX512VLBW-SLOW-LABEL: shuffle_v32i8_02_03_04_05_06_07_00_01_10_11_12_13_14_15_08_09_18_19_20_21_22_23_16_17_26_27_28_29_30_31_24_25:
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; AVX512VLBW-SLOW: # %bb.0:
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; AVX512VLBW-SLOW-NEXT: vpshuflw {{.*#+}} ymm0 = ymm0[1,2,3,0,4,5,6,7,9,10,11,8,12,13,14,15]
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; AVX512VLBW-SLOW-NEXT: vpshufhw {{.*#+}} ymm0 = ymm0[0,1,2,3,5,6,7,4,8,9,10,11,13,14,15,12]
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; AVX512VLBW-SLOW-NEXT: retq
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;
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; AVX512VLBW-FAST-LABEL: shuffle_v32i8_02_03_04_05_06_07_00_01_10_11_12_13_14_15_08_09_18_19_20_21_22_23_16_17_26_27_28_29_30_31_24_25:
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; AVX512VLBW-FAST: # %bb.0:
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; AVX512VLBW-FAST-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[2,3,4,5,6,7,0,1,10,11,12,13,14,15,8,9,18,19,20,21,22,23,16,17,26,27,28,29,30,31,24,25]
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; AVX512VLBW-FAST-NEXT: retq
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;
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; AVX512VLVBMI-SLOW-LABEL: shuffle_v32i8_02_03_04_05_06_07_00_01_10_11_12_13_14_15_08_09_18_19_20_21_22_23_16_17_26_27_28_29_30_31_24_25:
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; AVX512VLVBMI-SLOW: # %bb.0:
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; AVX512VLVBMI-SLOW-NEXT: vpshuflw {{.*#+}} ymm0 = ymm0[1,2,3,0,4,5,6,7,9,10,11,8,12,13,14,15]
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; AVX512VLVBMI-SLOW-NEXT: vpshufhw {{.*#+}} ymm0 = ymm0[0,1,2,3,5,6,7,4,8,9,10,11,13,14,15,12]
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; AVX512VLVBMI-SLOW-NEXT: retq
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;
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; AVX512VLVBMI-FAST-LABEL: shuffle_v32i8_02_03_04_05_06_07_00_01_10_11_12_13_14_15_08_09_18_19_20_21_22_23_16_17_26_27_28_29_30_31_24_25:
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; AVX512VLVBMI-FAST: # %bb.0:
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; AVX512VLVBMI-FAST-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[2,3,4,5,6,7,0,1,10,11,12,13,14,15,8,9,18,19,20,21,22,23,16,17,26,27,28,29,30,31,24,25]
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; AVX512VLVBMI-FAST-NEXT: retq
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%shuffle = shufflevector <32 x i8> %a, <32 x i8> undef, <32 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 8, i32 9, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 16, i32 17, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 24, i32 25>
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ret <32 x i8> %shuffle
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}
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define <32 x i8> @shuffle_v32i8_shift_00_02_04_06_08_10_12_14_16_18_20_22_24_26_28_30_32_34_36_38_40_42_44_46_48_50_52_54_56_58_60_62(<16 x i16> %a0, <16 x i16> %a1) {
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; AVX1-LABEL: shuffle_v32i8_shift_00_02_04_06_08_10_12_14_16_18_20_22_24_26_28_30_32_34_36_38_40_42_44_46_48_50_52_54_56_58_60_62:
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; AVX1: # %bb.0:
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@ -198,6 +198,43 @@ define <64 x i8> @shuffle_v64i8_63_62_61_60_59_58_57_56_55_54_53_52_51_50_49_48_
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ret <64 x i8> %shuffle
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}
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; PR44379
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define <64 x i8> @shuffle_v64i8_02_03_04_05_06_07_00_01_10_11_12_13_14_15_08_09_18_19_20_21_22_23_16_17_26_27_28_29_30_31_24_25_34_35_36_37_38_39_32_33_42_43_44_45_46_47_40_41_50_51_52_53_54_55_48_49_58_59_60_61_62_63_56_57(<64 x i8> %a) {
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; AVX512F-LABEL: shuffle_v64i8_02_03_04_05_06_07_00_01_10_11_12_13_14_15_08_09_18_19_20_21_22_23_16_17_26_27_28_29_30_31_24_25_34_35_36_37_38_39_32_33_42_43_44_45_46_47_40_41_50_51_52_53_54_55_48_49_58_59_60_61_62_63_56_57:
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; AVX512F: # %bb.0:
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; AVX512F-NEXT: vextracti64x4 $1, %zmm0, %ymm1
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; AVX512F-NEXT: vpshuflw {{.*#+}} ymm1 = ymm1[1,2,3,0,4,5,6,7,9,10,11,8,12,13,14,15]
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; AVX512F-NEXT: vpshufhw {{.*#+}} ymm1 = ymm1[0,1,2,3,5,6,7,4,8,9,10,11,13,14,15,12]
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; AVX512F-NEXT: vpshuflw {{.*#+}} ymm0 = ymm0[1,2,3,0,4,5,6,7,9,10,11,8,12,13,14,15]
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; AVX512F-NEXT: vpshufhw {{.*#+}} ymm0 = ymm0[0,1,2,3,5,6,7,4,8,9,10,11,13,14,15,12]
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; AVX512F-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0
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; AVX512F-NEXT: retq
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;
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; AVX512BW-LABEL: shuffle_v64i8_02_03_04_05_06_07_00_01_10_11_12_13_14_15_08_09_18_19_20_21_22_23_16_17_26_27_28_29_30_31_24_25_34_35_36_37_38_39_32_33_42_43_44_45_46_47_40_41_50_51_52_53_54_55_48_49_58_59_60_61_62_63_56_57:
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; AVX512BW: # %bb.0:
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; AVX512BW-NEXT: vpshuflw {{.*#+}} zmm0 = zmm0[1,2,3,0,4,5,6,7,9,10,11,8,12,13,14,15,17,18,19,16,20,21,22,23,25,26,27,24,28,29,30,31]
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; AVX512BW-NEXT: vpshufhw {{.*#+}} zmm0 = zmm0[0,1,2,3,5,6,7,4,8,9,10,11,13,14,15,12,16,17,18,19,21,22,23,20,24,25,26,27,29,30,31,28]
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; AVX512BW-NEXT: retq
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;
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; AVX512DQ-LABEL: shuffle_v64i8_02_03_04_05_06_07_00_01_10_11_12_13_14_15_08_09_18_19_20_21_22_23_16_17_26_27_28_29_30_31_24_25_34_35_36_37_38_39_32_33_42_43_44_45_46_47_40_41_50_51_52_53_54_55_48_49_58_59_60_61_62_63_56_57:
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; AVX512DQ: # %bb.0:
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; AVX512DQ-NEXT: vextracti64x4 $1, %zmm0, %ymm1
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; AVX512DQ-NEXT: vpshuflw {{.*#+}} ymm1 = ymm1[1,2,3,0,4,5,6,7,9,10,11,8,12,13,14,15]
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; AVX512DQ-NEXT: vpshufhw {{.*#+}} ymm1 = ymm1[0,1,2,3,5,6,7,4,8,9,10,11,13,14,15,12]
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; AVX512DQ-NEXT: vpshuflw {{.*#+}} ymm0 = ymm0[1,2,3,0,4,5,6,7,9,10,11,8,12,13,14,15]
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; AVX512DQ-NEXT: vpshufhw {{.*#+}} ymm0 = ymm0[0,1,2,3,5,6,7,4,8,9,10,11,13,14,15,12]
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; AVX512DQ-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0
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; AVX512DQ-NEXT: retq
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;
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; AVX512VBMI-LABEL: shuffle_v64i8_02_03_04_05_06_07_00_01_10_11_12_13_14_15_08_09_18_19_20_21_22_23_16_17_26_27_28_29_30_31_24_25_34_35_36_37_38_39_32_33_42_43_44_45_46_47_40_41_50_51_52_53_54_55_48_49_58_59_60_61_62_63_56_57:
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; AVX512VBMI: # %bb.0:
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; AVX512VBMI-NEXT: vpshuflw {{.*#+}} zmm0 = zmm0[1,2,3,0,4,5,6,7,9,10,11,8,12,13,14,15,17,18,19,16,20,21,22,23,25,26,27,24,28,29,30,31]
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; AVX512VBMI-NEXT: vpshufhw {{.*#+}} zmm0 = zmm0[0,1,2,3,5,6,7,4,8,9,10,11,13,14,15,12,16,17,18,19,21,22,23,20,24,25,26,27,29,30,31,28]
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; AVX512VBMI-NEXT: retq
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%shuffle = shufflevector <64 x i8> %a, <64 x i8> undef, <64 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 8, i32 9, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 16, i32 17, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 24, i32 25, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 32, i32 33, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 40, i32 41, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 48, i32 49, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 56, i32 57>
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ret <64 x i8> %shuffle
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}
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define <64 x i8> @insert_dup_mem_v64i8_i32(i32* %ptr) {
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; AVX512F-LABEL: insert_dup_mem_v64i8_i32:
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; AVX512F: # %bb.0:
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