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ARM64: accept ELF-relocated load/store insts without a #. 

E.g. we print "ldr x0, [x0, :lo12:symbol]" so we need to accept that syntax
too.

llvm-svn: 207639
This commit is contained in:
Tim Northover 2014-04-30 12:00:20 +00:00
parent 36c93db37a
commit f9941a9dc6
2 changed files with 22 additions and 21 deletions
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1
llvm/lib/Target/ARM64/AsmParser/ARM64AsmParser.cpp
View File

@ -2915,6 +2915,7 @@ bool ARM64AsmParser::parseMemory(OperandVector &Operands) {
// Immediate expressions.
} else if (Parser.getTok().is(AsmToken::Hash) ||
Parser.getTok().is(AsmToken::Colon) ||
Parser.getTok().is(AsmToken::Integer)) {
if (Parser.getTok().is(AsmToken::Hash))
Parser.Lex(); // Eat hash token.

42
llvm/test/MC/ARM64/elf-relocs.s
View File

@ -88,9 +88,9 @@ trickQuestion:
// CHECK: adrp x3, trickQuestion
// CHECK-OBJ: 5c R_AARCH64_ADR_PREL_PG_HI21 trickQuestion
ldrb w2, [x3, #:lo12:sym]
ldrb w2, [x3, :lo12:sym]
ldrsb w5, [x7, #:lo12:sym]
ldrsb x11, [x13, #:lo12:sym]
ldrsb x11, [x13, :lo12:sym]
ldr b17, [x19, #:lo12:sym]
// CHECK: ldrb w2, [x3, :lo12:sym]
// CHECK: ldrsb w5, [x7, :lo12:sym]
@ -103,7 +103,7 @@ trickQuestion:
ldrb w23, [x29, #:dtprel_lo12_nc:sym]
ldrsb w23, [x19, #:dtprel_lo12:sym]
ldrsb x17, [x13, #:dtprel_lo12_nc:sym]
ldrsb x17, [x13, :dtprel_lo12_nc:sym]
ldr b11, [x7, #:dtprel_lo12:sym]
// CHECK: ldrb w23, [x29, :dtprel_lo12_nc:sym]
// CHECK: ldrsb w23, [x19, :dtprel_lo12:sym]
@ -114,9 +114,9 @@ trickQuestion:
// CHECK-OBJ: R_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC sym
// CHECK-OBJ: R_AARCH64_TLSLD_LDST8_DTPREL_LO12 sym
ldrb w1, [x2, #:tprel_lo12:sym]
ldrb w1, [x2, :tprel_lo12:sym]
ldrsb w3, [x4, #:tprel_lo12_nc:sym]
ldrsb x5, [x6, #:tprel_lo12:sym]
ldrsb x5, [x6, :tprel_lo12:sym]
ldr b7, [x8, #:tprel_lo12_nc:sym]
// CHECK: ldrb w1, [x2, :tprel_lo12:sym]
// CHECK: ldrsb w3, [x4, :tprel_lo12_nc:sym]
@ -128,9 +128,9 @@ trickQuestion:
// CHECK-OBJ: R_AARCH64_TLSLE_LDST8_TPREL_LO12_NC sym
ldrh w2, [x3, #:lo12:sym]
ldrsh w5, [x7, #:lo12:sym]
ldrsh w5, [x7, :lo12:sym]
ldrsh x11, [x13, #:lo12:sym]
ldr h17, [x19, #:lo12:sym]
ldr h17, [x19, :lo12:sym]
// CHECK: ldrh w2, [x3, :lo12:sym]
// CHECK: ldrsh w5, [x7, :lo12:sym]
// CHECK: ldrsh x11, [x13, :lo12:sym]
@ -141,8 +141,8 @@ trickQuestion:
// CHECK-OBJ: R_AARCH64_LDST16_ABS_LO12_NC sym
ldrh w23, [x29, #:dtprel_lo12_nc:sym]
ldrsh w23, [x19, #:dtprel_lo12:sym]
ldrsh x17, [x13, #:dtprel_lo12_nc:sym]
ldrsh w23, [x19, :dtprel_lo12:sym]
ldrsh x17, [x13, :dtprel_lo12_nc:sym]
ldr h11, [x7, #:dtprel_lo12:sym]
// CHECK: ldrh w23, [x29, :dtprel_lo12_nc:sym]
// CHECK: ldrsh w23, [x19, :dtprel_lo12:sym]
@ -153,9 +153,9 @@ trickQuestion:
// CHECK-OBJ: R_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC sym
// CHECK-OBJ: R_AARCH64_TLSLD_LDST16_DTPREL_LO12 sym
ldrh w1, [x2, #:tprel_lo12:sym]
ldrh w1, [x2, :tprel_lo12:sym]
ldrsh w3, [x4, #:tprel_lo12_nc:sym]
ldrsh x5, [x6, #:tprel_lo12:sym]
ldrsh x5, [x6, :tprel_lo12:sym]
ldr h7, [x8, #:tprel_lo12_nc:sym]
// CHECK: ldrh w1, [x2, :tprel_lo12:sym]
// CHECK: ldrsh w3, [x4, :tprel_lo12_nc:sym]
@ -168,7 +168,7 @@ trickQuestion:
ldr w1, [x2, #:lo12:sym]
ldrsw x3, [x4, #:lo12:sym]
ldr s4, [x5, #:lo12:sym]
ldr s4, [x5, :lo12:sym]
// CHECK: ldr w1, [x2, :lo12:sym]
// CHECK: ldrsw x3, [x4, :lo12:sym]
// CHECK: ldr s4, [x5, :lo12:sym]
@ -176,7 +176,7 @@ trickQuestion:
// CHECK-OBJ: R_AARCH64_LDST32_ABS_LO12_NC sym
// CHECK-OBJ: R_AARCH64_LDST32_ABS_LO12_NC sym
ldr w1, [x2, #:dtprel_lo12:sym]
ldr w1, [x2, :dtprel_lo12:sym]
ldrsw x3, [x4, #:dtprel_lo12_nc:sym]
ldr s4, [x5, #:dtprel_lo12_nc:sym]
// CHECK: ldr w1, [x2, :dtprel_lo12:sym]
@ -188,8 +188,8 @@ trickQuestion:
ldr w1, [x2, #:tprel_lo12:sym]
ldrsw x3, [x4, #:tprel_lo12_nc:sym]
ldr s4, [x5, #:tprel_lo12_nc:sym]
ldrsw x3, [x4, :tprel_lo12_nc:sym]
ldr s4, [x5, :tprel_lo12_nc:sym]
// CHECK: ldr w1, [x2, :tprel_lo12:sym]
// CHECK: ldrsw x3, [x4, :tprel_lo12_nc:sym]
// CHECK: ldr s4, [x5, :tprel_lo12_nc:sym]
@ -197,7 +197,7 @@ trickQuestion:
// CHECK-OBJ: R_AARCH64_TLSLE_LDST32_TPREL_LO12_NC sym
// CHECK-OBJ: R_AARCH64_TLSLE_LDST32_TPREL_LO12_NC sym
ldr x28, [x27, #:lo12:sym]
ldr x28, [x27, :lo12:sym]
ldr d26, [x25, #:lo12:sym]
// CHECK: ldr x28, [x27, :lo12:sym]
// CHECK: ldr d26, [x25, :lo12:sym]
@ -205,13 +205,13 @@ trickQuestion:
// CHECK-OBJ: R_AARCH64_LDST64_ABS_LO12_NC sym
ldr x24, [x23, #:got_lo12:sym]
ldr d22, [x21, #:got_lo12:sym]
ldr d22, [x21, :got_lo12:sym]
// CHECK: ldr x24, [x23, :got_lo12:sym]
// CHECK: ldr d22, [x21, :got_lo12:sym]
// CHECK-OBJ: R_AARCH64_LD64_GOT_LO12_NC sym
// CHECK-OBJ: R_AARCH64_LD64_GOT_LO12_NC sym
ldr x24, [x23, #:dtprel_lo12_nc:sym]
ldr x24, [x23, :dtprel_lo12_nc:sym]
ldr d22, [x21, #:dtprel_lo12:sym]
// CHECK: ldr x24, [x23, :dtprel_lo12_nc:sym]
// CHECK: ldr d22, [x21, :dtprel_lo12:sym]
@ -219,13 +219,13 @@ trickQuestion:
// CHECK-OBJ: R_AARCH64_TLSLD_LDST64_DTPREL_LO12 sym
ldr x24, [x23, #:tprel_lo12:sym]
ldr d22, [x21, #:tprel_lo12_nc:sym]
ldr d22, [x21, :tprel_lo12_nc:sym]
// CHECK: ldr x24, [x23, :tprel_lo12:sym]
// CHECK: ldr d22, [x21, :tprel_lo12_nc:sym]
// CHECK-OBJ: R_AARCH64_TLSLE_LDST64_TPREL_LO12 sym
// CHECK-OBJ: R_AARCH64_TLSLE_LDST64_TPREL_LO12_NC sym
ldr x24, [x23, #:gottprel_lo12:sym]
ldr x24, [x23, :gottprel_lo12:sym]
ldr d22, [x21, #:gottprel_lo12:sym]
// CHECK: ldr x24, [x23, :gottprel_lo12:sym]
// CHECK: ldr d22, [x21, :gottprel_lo12:sym]
@ -233,7 +233,7 @@ trickQuestion:
// CHECK-OBJ: R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC sym
ldr x24, [x23, #:tlsdesc_lo12:sym]
ldr d22, [x21, #:tlsdesc_lo12:sym]
ldr d22, [x21, :tlsdesc_lo12:sym]
// CHECK: ldr x24, [x23, :tlsdesc_lo12:sym]
// CHECK: ldr d22, [x21, :tlsdesc_lo12:sym]
// CHECK-OBJ: R_AARCH64_TLSDESC_LD64_LO12_NC sym