forked from OSchip/llvm-project
[AArch64] Fix return type of Neon scalar comparison intrinsics
The following should have unsigned return types but were signed: vceqd_s64 vceqzd_s64 vcged_s64 vcgezd_s64 vcgtd_s64 vcgtzd_s64 vcled_s64 vclezd_s64 vcltd_s64 vcltzd_s64 vtstd_s64 See https://developer.arm.com/documentation/ihi0073/latest Reviewed By: efriedma Differential Revision: https://reviews.llvm.org/D88009
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@ -1419,19 +1419,19 @@ def SCALAR_FRSQRTE : IInst<"vrsqrte", "11", "SfSd">;
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////////////////////////////////////////////////////////////////////////////////
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// Scalar Integer Comparison
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def SCALAR_CMEQ : SInst<"vceq", "111", "SlSUl">;
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def SCALAR_CMEQZ : SInst<"vceqz", "11", "SlSUl">;
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def SCALAR_CMGE : SInst<"vcge", "111", "Sl">;
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def SCALAR_CMGEZ : SInst<"vcgez", "11", "Sl">;
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def SCALAR_CMHS : SInst<"vcge", "111", "SUl">;
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def SCALAR_CMLE : SInst<"vcle", "111", "SlSUl">;
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def SCALAR_CMLEZ : SInst<"vclez", "11", "Sl">;
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def SCALAR_CMLT : SInst<"vclt", "111", "SlSUl">;
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def SCALAR_CMLTZ : SInst<"vcltz", "11", "Sl">;
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def SCALAR_CMGT : SInst<"vcgt", "111", "Sl">;
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def SCALAR_CMGTZ : SInst<"vcgtz", "11", "Sl">;
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def SCALAR_CMHI : SInst<"vcgt", "111", "SUl">;
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def SCALAR_CMTST : SInst<"vtst", "111", "SlSUl">;
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def SCALAR_CMEQ : SInst<"vceq", "(U1)11", "SlSUl">;
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def SCALAR_CMEQZ : SInst<"vceqz", "(U1)1", "SlSUl">;
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def SCALAR_CMGE : SInst<"vcge", "(U1)11", "Sl">;
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def SCALAR_CMGEZ : SInst<"vcgez", "(U1)1", "Sl">;
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def SCALAR_CMHS : SInst<"vcge", "(U1)11", "SUl">;
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def SCALAR_CMLE : SInst<"vcle", "(U1)11", "SlSUl">;
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def SCALAR_CMLEZ : SInst<"vclez", "(U1)1", "Sl">;
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def SCALAR_CMLT : SInst<"vclt", "(U1)11", "SlSUl">;
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def SCALAR_CMLTZ : SInst<"vcltz", "(U1)1", "Sl">;
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def SCALAR_CMGT : SInst<"vcgt", "(U1)11", "Sl">;
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def SCALAR_CMGTZ : SInst<"vcgtz", "(U1)1", "Sl">;
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def SCALAR_CMHI : SInst<"vcgt", "(U1)11", "SUl">;
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def SCALAR_CMTST : SInst<"vtst", "(U1)11", "SlSUl">;
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////////////////////////////////////////////////////////////////////////////////
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// Scalar Floating-point Comparison
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@ -13746,8 +13746,8 @@ void test_vst1_p64_x4(poly64_t *a, poly64x1x4_t b) {
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// CHECK: [[TMP0:%.*]] = icmp eq i64 %a, %b
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// CHECK: [[VCEQD_I:%.*]] = sext i1 [[TMP0]] to i64
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// CHECK: ret i64 [[VCEQD_I]]
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int64_t test_vceqd_s64(int64_t a, int64_t b) {
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return (int64_t)vceqd_s64(a, b);
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uint64_t test_vceqd_s64(int64_t a, int64_t b) {
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return (uint64_t)vceqd_s64(a, b);
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}
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// CHECK-LABEL: @test_vceqd_u64(
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@ -13762,8 +13762,8 @@ uint64_t test_vceqd_u64(uint64_t a, uint64_t b) {
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// CHECK: [[TMP0:%.*]] = icmp eq i64 %a, 0
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// CHECK: [[VCEQZ_I:%.*]] = sext i1 [[TMP0]] to i64
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// CHECK: ret i64 [[VCEQZ_I]]
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int64_t test_vceqzd_s64(int64_t a) {
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return (int64_t)vceqzd_s64(a);
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uint64_t test_vceqzd_s64(int64_t a) {
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return (uint64_t)vceqzd_s64(a);
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}
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// CHECK-LABEL: @test_vceqzd_u64(
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@ -13778,8 +13778,8 @@ int64_t test_vceqzd_u64(int64_t a) {
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// CHECK: [[TMP0:%.*]] = icmp sge i64 %a, %b
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// CHECK: [[VCEQD_I:%.*]] = sext i1 [[TMP0]] to i64
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// CHECK: ret i64 [[VCEQD_I]]
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int64_t test_vcged_s64(int64_t a, int64_t b) {
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return (int64_t)vcged_s64(a, b);
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uint64_t test_vcged_s64(int64_t a, int64_t b) {
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return (uint64_t)vcged_s64(a, b);
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}
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// CHECK-LABEL: @test_vcged_u64(
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@ -13794,16 +13794,16 @@ uint64_t test_vcged_u64(uint64_t a, uint64_t b) {
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// CHECK: [[TMP0:%.*]] = icmp sge i64 %a, 0
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// CHECK: [[VCGEZ_I:%.*]] = sext i1 [[TMP0]] to i64
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// CHECK: ret i64 [[VCGEZ_I]]
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int64_t test_vcgezd_s64(int64_t a) {
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return (int64_t)vcgezd_s64(a);
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uint64_t test_vcgezd_s64(int64_t a) {
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return (uint64_t)vcgezd_s64(a);
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}
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// CHECK-LABEL: @test_vcgtd_s64(
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// CHECK: [[TMP0:%.*]] = icmp sgt i64 %a, %b
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// CHECK: [[VCEQD_I:%.*]] = sext i1 [[TMP0]] to i64
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// CHECK: ret i64 [[VCEQD_I]]
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int64_t test_vcgtd_s64(int64_t a, int64_t b) {
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return (int64_t)vcgtd_s64(a, b);
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uint64_t test_vcgtd_s64(int64_t a, int64_t b) {
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return (uint64_t)vcgtd_s64(a, b);
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}
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// CHECK-LABEL: @test_vcgtd_u64(
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@ -13818,16 +13818,16 @@ uint64_t test_vcgtd_u64(uint64_t a, uint64_t b) {
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// CHECK: [[TMP0:%.*]] = icmp sgt i64 %a, 0
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// CHECK: [[VCGTZ_I:%.*]] = sext i1 [[TMP0]] to i64
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// CHECK: ret i64 [[VCGTZ_I]]
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int64_t test_vcgtzd_s64(int64_t a) {
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return (int64_t)vcgtzd_s64(a);
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uint64_t test_vcgtzd_s64(int64_t a) {
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return (uint64_t)vcgtzd_s64(a);
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}
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// CHECK-LABEL: @test_vcled_s64(
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// CHECK: [[TMP0:%.*]] = icmp sle i64 %a, %b
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// CHECK: [[VCEQD_I:%.*]] = sext i1 [[TMP0]] to i64
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// CHECK: ret i64 [[VCEQD_I]]
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int64_t test_vcled_s64(int64_t a, int64_t b) {
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return (int64_t)vcled_s64(a, b);
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uint64_t test_vcled_s64(int64_t a, int64_t b) {
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return (uint64_t)vcled_s64(a, b);
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}
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// CHECK-LABEL: @test_vcled_u64(
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@ -13842,16 +13842,16 @@ uint64_t test_vcled_u64(uint64_t a, uint64_t b) {
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// CHECK: [[TMP0:%.*]] = icmp sle i64 %a, 0
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// CHECK: [[VCLEZ_I:%.*]] = sext i1 [[TMP0]] to i64
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// CHECK: ret i64 [[VCLEZ_I]]
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int64_t test_vclezd_s64(int64_t a) {
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return (int64_t)vclezd_s64(a);
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uint64_t test_vclezd_s64(int64_t a) {
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return (uint64_t)vclezd_s64(a);
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}
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// CHECK-LABEL: @test_vcltd_s64(
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// CHECK: [[TMP0:%.*]] = icmp slt i64 %a, %b
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// CHECK: [[VCEQD_I:%.*]] = sext i1 [[TMP0]] to i64
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// CHECK: ret i64 [[VCEQD_I]]
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int64_t test_vcltd_s64(int64_t a, int64_t b) {
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return (int64_t)vcltd_s64(a, b);
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uint64_t test_vcltd_s64(int64_t a, int64_t b) {
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return (uint64_t)vcltd_s64(a, b);
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}
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// CHECK-LABEL: @test_vcltd_u64(
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@ -13866,8 +13866,8 @@ uint64_t test_vcltd_u64(uint64_t a, uint64_t b) {
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// CHECK: [[TMP0:%.*]] = icmp slt i64 %a, 0
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// CHECK: [[VCLTZ_I:%.*]] = sext i1 [[TMP0]] to i64
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// CHECK: ret i64 [[VCLTZ_I]]
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int64_t test_vcltzd_s64(int64_t a) {
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return (int64_t)vcltzd_s64(a);
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uint64_t test_vcltzd_s64(int64_t a) {
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return (uint64_t)vcltzd_s64(a);
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}
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// CHECK-LABEL: @test_vtstd_s64(
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@ -13875,8 +13875,8 @@ int64_t test_vcltzd_s64(int64_t a) {
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// CHECK: [[TMP1:%.*]] = icmp ne i64 [[TMP0]], 0
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// CHECK: [[VTSTD_I:%.*]] = sext i1 [[TMP1]] to i64
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// CHECK: ret i64 [[VTSTD_I]]
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int64_t test_vtstd_s64(int64_t a, int64_t b) {
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return (int64_t)vtstd_s64(a, b);
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uint64_t test_vtstd_s64(int64_t a, int64_t b) {
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return (uint64_t)vtstd_s64(a, b);
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}
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// CHECK-LABEL: @test_vtstd_u64(
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