From f906c7286f4ef121074f21dd369ed0f4e5a9b1dc Mon Sep 17 00:00:00 2001
From: Dan Gohman <gohman@apple.com>
Date: Tue, 24 Jul 2007 22:55:08 +0000
Subject: [PATCH] Use movaps to load a v4f32 build_vector of all-constant
 values into a register instead of loading each element individually.

llvm-svn: 40478
---
 llvm/lib/Target/X86/X86ISelLowering.cpp  | 9 +++++++++
 llvm/test/CodeGen/X86/v4f32-immediate.ll | 5 +++++
 2 files changed, 14 insertions(+)
 create mode 100644 llvm/test/CodeGen/X86/v4f32-immediate.ll

diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index a25710ba5aab..23f9e9500c2d 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -2495,6 +2495,7 @@ X86TargetLowering::LowerBUILD_VECTOR(SDOperand Op, SelectionDAG &DAG) {
   unsigned NumZero  = 0;
   unsigned NumNonZero = 0;
   unsigned NonZeros = 0;
+  unsigned NumNonZeroImms = 0;
   std::set<SDOperand> Values;
   for (unsigned i = 0; i < NumElems; ++i) {
     SDOperand Elt = Op.getOperand(i);
@@ -2505,6 +2506,9 @@ X86TargetLowering::LowerBUILD_VECTOR(SDOperand Op, SelectionDAG &DAG) {
       else {
         NonZeros |= (1 << i);
         NumNonZero++;
+        if (Elt.getOpcode() == ISD::Constant ||
+            Elt.getOpcode() == ISD::ConstantFP)
+          NumNonZeroImms++;
       }
     }
   }
@@ -2548,6 +2552,11 @@ X86TargetLowering::LowerBUILD_VECTOR(SDOperand Op, SelectionDAG &DAG) {
     }
   }
 
+  // A vector full of immediates; various special cases are already
+  // handled, so this is best done with a single constant-pool load.
+  if (NumNonZero == NumNonZeroImms)
+    return SDOperand();
+
   // Let legalizer expand 2-wide build_vectors.
   if (EVTBits == 64)
     return SDOperand();
diff --git a/llvm/test/CodeGen/X86/v4f32-immediate.ll b/llvm/test/CodeGen/X86/v4f32-immediate.ll
new file mode 100644
index 000000000000..67b5e79df86c
--- /dev/null
+++ b/llvm/test/CodeGen/X86/v4f32-immediate.ll
@@ -0,0 +1,5 @@
+; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse | grep movaps
+
+define <4 x float> @foo() {
+  ret <4 x float> <float 3.223542354, float 2.3, float 1.2, float 0.1>
+}