forked from OSchip/llvm-project
[AArch64] Emit .cfi_negate_ra_state for PAC-auth instructions.
autiasp, autibsp instructions are the counterpart of paciasp/pacibsp instructions therefore let's emit .cfi_negate_ra_state for these too. In case of Armv8.3 instruction set the retaa/retbb will do the return and authentication in one step here we can't emit the . cfi_negate_ra_state because that would be point after the ret* instruction. Reviewed By: nickdesaulniers, MaskRay Differential Revision: https://reviews.llvm.org/D111780
This commit is contained in:
Daniel Kiss
parent
ec428f7b78
commit
f903c85055
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@ -1653,7 +1653,8 @@ static void InsertReturnAddressAuth(MachineFunction &MF,
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// The AUTIASP instruction assembles to a hint instruction before v8.3a so
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// this instruction can safely used for any v8a architecture.
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// From v8.3a onwards there are optimised authenticate LR and return
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// instructions, namely RETA{A,B}, that can be used instead.
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// instructions, namely RETA{A,B}, that can be used instead. In this case the
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// DW_CFA_AARCH64_negate_ra_state can't be emitted.
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if (Subtarget.hasPAuth() && MBBI != MBB.end() &&
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MBBI->getOpcode() == AArch64::RET_ReallyLR) {
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BuildMI(MBB, MBBI, DL,
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@ -1665,6 +1666,12 @@ static void InsertReturnAddressAuth(MachineFunction &MF,
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MBB, MBBI, DL,
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TII->get(MFI.shouldSignWithBKey() ? AArch64::AUTIBSP : AArch64::AUTIASP))
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.setMIFlag(MachineInstr::FrameDestroy);
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unsigned CFIIndex =
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MF.addFrameInst(MCCFIInstruction::createNegateRAState(nullptr));
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BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
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.addCFIIndex(CFIIndex)
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.setMIFlags(MachineInstr::FrameDestroy);
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}
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}
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@ -7161,7 +7161,8 @@ static void signOutlinedFunction(MachineFunction &MF, MachineBasicBlock &MBB,
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.setMIFlags(MachineInstr::FrameSetup);
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// If v8.3a features are available we can replace a RET instruction by
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// RETAA or RETAB and omit the AUT instructions
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// RETAA or RETAB and omit the AUT instructions. In this case the
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// DW_CFA_AARCH64_negate_ra_state can't be emitted.
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if (Subtarget.hasPAuth() && MBBAUT != MBB.end() &&
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MBBAUT->getOpcode() == AArch64::RET) {
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BuildMI(MBB, MBBAUT, DL,
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@ -7174,6 +7175,11 @@ static void signOutlinedFunction(MachineFunction &MF, MachineBasicBlock &MBB,
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TII->get(ShouldSignReturnAddrWithAKey ? AArch64::AUTIASP
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: AArch64::AUTIBSP))
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.setMIFlag(MachineInstr::FrameDestroy);
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unsigned CFIIndexAuth =
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MF.addFrameInst(MCCFIInstruction::createNegateRAState(nullptr));
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BuildMI(MBB, MBBAUT, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
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.addCFIIndex(CFIIndexAuth)
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.setMIFlags(MachineInstr::FrameDestroy);
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}
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}
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}
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@ -28,7 +28,8 @@ define void @a() "sign-return-address"="all" "sign-return-address-key"="b_key" {
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; CHECK-NOT: bl OUTLINED_FUNCTION_{{[0-9]+}}
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; V8A: hint #31
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; V83A: autibsp
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; CHECK-NEXT: ret
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; V8A-NEXT, V83A-NEXT: .cfi_negate_ra_state
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; V8A-NEXT, V83A-NEXT: ret
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ret void
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}
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@ -31,6 +31,7 @@
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# CHECK: BL @[[OUTLINED_FUNCTION]]
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# CHECK: bb.5:
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# CHECK: frame-destroy AUTIBSP
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# CHECK-NEXT: frame-destroy CFI_INSTRUCTION negate_ra_sign_state
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# CHECK-NEXT: RET
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name: foo
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tracksRegLiveness: true
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@ -81,6 +81,7 @@ body: |
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STRXui killed renamable $x9, killed renamable $x8, target-flags(aarch64-pageoff, aarch64-nc) @v :: (volatile store (s64) into @v)
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$sp = frame-destroy ADDXri $sp, 16, 0
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frame-destroy AUTIASP implicit-def $lr, implicit killed $lr, implicit $sp
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frame-destroy CFI_INSTRUCTION negate_ra_sign_state
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RET undef $lr
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# CHECK-LABEL: name: legal0
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@ -91,6 +92,7 @@ body: |
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# CHECK-NEXT: frame-setup CFI_INSTRUCTION negate_ra_sign_state
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# CHECK: BL @[[OUTLINED_FUNC:OUTLINED_FUNCTION_[0-9]+]]
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# CHECK: frame-destroy AUTIASP implicit-def $lr, implicit killed $lr, implicit $sp
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# CHECK-NEXT: frame-destroy CFI_INSTRUCTION negate_ra_sign_state
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# CHECK-NEXT: RET undef $lr
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...
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@ -114,6 +116,7 @@ body: |
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STRXui killed renamable $x9, killed renamable $x8, target-flags(aarch64-pageoff, aarch64-nc) @v :: (volatile store (s64) into @v)
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$sp = frame-destroy ADDXri $sp, 16, 0
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frame-destroy AUTIASP implicit-def $lr, implicit killed $lr, implicit $sp
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frame-destroy CFI_INSTRUCTION negate_ra_sign_state
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RET undef $lr
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# CHECK-LABEL: name: legal1
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@ -124,6 +127,7 @@ body: |
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# CHECK-NEXT: frame-setup CFI_INSTRUCTION negate_ra_sign_state
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# CHECK: BL @[[OUTLINED_FUNC]]
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# CHECK: frame-destroy AUTIASP implicit-def $lr, implicit killed $lr, implicit $sp
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# CHECK-NEXT: frame-destroy CFI_INSTRUCTION negate_ra_sign_state
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# CHECK-NEXT: RET undef $lr
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...
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@ -147,6 +151,7 @@ body: |
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STRXui killed renamable $x9, killed renamable $x8, target-flags(aarch64-pageoff, aarch64-nc) @v :: (volatile store (s64) into @v)
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$sp = frame-destroy ADDXri $sp, 12, 0
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frame-destroy AUTIASP implicit-def $lr, implicit killed $lr, implicit $sp
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frame-destroy CFI_INSTRUCTION negate_ra_sign_state
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RET undef $lr
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...
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@ -170,6 +175,7 @@ body: |
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STRXui killed renamable $x9, killed renamable $x8, target-flags(aarch64-pageoff, aarch64-nc) @v :: (volatile store (s64) into @v)
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$sp = frame-destroy ADDXri $sp, 12, 0
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frame-destroy AUTIASP implicit-def $lr, implicit killed $lr, implicit $sp
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frame-destroy CFI_INSTRUCTION negate_ra_sign_state
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RET undef $lr
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# CHECK-LABEL: name: illegal0
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@ -180,6 +186,7 @@ body: |
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# CHECK-NEXT: frame-setup CFI_INSTRUCTION negate_ra_sign_state
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# CHECK-NOT: BL @OUTLINED_FUNCTION_{{.*}}
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# CHECK: frame-destroy AUTIASP implicit-def $lr, implicit killed $lr, implicit $sp
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# CHECK-NEXT: frame-destroy CFI_INSTRUCTION negate_ra_sign_state
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# CHECK-NEXT: RET undef $lr
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# CHECK-LABEL: name: illegal1
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@ -190,6 +197,7 @@ body: |
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# CHECK-NEXT: frame-setup CFI_INSTRUCTION negate_ra_sign_state
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# CHECK-NOT: BL @OUTLINED_FUNCTION_{{.*}}
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# CHECK: frame-destroy AUTIASP implicit-def $lr, implicit killed $lr, implicit $sp
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# CHECK-NEXT: frame-destroy CFI_INSTRUCTION negate_ra_sign_state
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# CHECK-NEXT: RET undef $lr
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# Outlined function that contains only legal sp modifications
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@ -203,4 +211,5 @@ body: |
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# CHECK-NEXT: $sp = frame-setup SUBXri $sp, 16, 0
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# CHECK: $sp = frame-destroy ADDXri $sp, 16, 0
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# CHECK-NEXT: frame-destroy AUTIASP implicit-def $lr, implicit $lr, implicit $sp
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# CHECK-NEXT: frame-destroy CFI_INSTRUCTION negate_ra_sign_state
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# CHECK-NEXT: RET $lr
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@ -11,8 +11,10 @@ define i32 @a() #0 {
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; CHECK: // %bb.0: // %entry
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; V8A-NEXT: hint #25
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; V83A-NEXT: paciasp
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; CHECK-NEXT: .cfi_negate_ra_state
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; V8A: hint #29
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; V83A: autiasp
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; CHECK-NEXT: .cfi_negate_ra_state
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; CHECK-NEXT: ret
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entry:
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%call = tail call i32 @thunk_called_fn(i32 1, i32 2, i32 3, i32 4)
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@ -28,6 +30,7 @@ define i32 @b() #0 {
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; CHECK-NEXT: .cfi_negate_ra_state
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; V8A: hint #29
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; V83A: autiasp
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; CHECK-NEXT: .cfi_negate_ra_state
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; CHECK-NEXT: ret
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entry:
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%call = tail call i32 @thunk_called_fn(i32 1, i32 2, i32 3, i32 4)
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@ -43,6 +46,7 @@ define hidden i32 @c(i32 (i32, i32, i32, i32)* %fptr) #0 {
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; CHECK-NEXT: .cfi_negate_ra_state
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; V8A: hint #29
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; V83A: autiasp
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; CHECK-NEXT: .cfi_negate_ra_state
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; CHECK-NEXT: ret
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entry:
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%call = tail call i32 %fptr(i32 1, i32 2, i32 3, i32 4)
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@ -58,6 +62,7 @@ define hidden i32 @d(i32 (i32, i32, i32, i32)* %fptr) #0 {
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; CHECK-NEXT: .cfi_negate_ra_state
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; V8A: hint #29
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; V83A: autiasp
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; CHECK-NEXT: .cfi_negate_ra_state
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; CHECK-NEXT: ret
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entry:
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%call = tail call i32 %fptr(i32 1, i32 2, i32 3, i32 4)
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@ -24,7 +24,9 @@ define i32 @leaf_sign_non_leaf(i32 %x) "sign-return-address"="non-leaf" {
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; CHECK-LABEL: @leaf_sign_all
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; CHECK: hint #25
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; CHECK-NEXT: .cfi_negate_ra_state
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; CHECK: hint #29
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; CHECK-NEXT: .cfi_negate_ra_state
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; CHECK: ret
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; CHECK-V83A: pacia x30, sp
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; CHECK-V83A: retaa
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@ -34,10 +36,12 @@ define i32 @leaf_sign_all(i32 %x) "sign-return-address"="all" {
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; CHECK: @leaf_clobbers_lr
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; CHECK: hint #25
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; CHECK-NEXT: .cfi_negate_ra_state
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; CHECK-V83A: pacia x30, sp
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; CHECK, CHECK-V83A: str x30, [sp, #-16]!
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; CHECK, CHECK-V83A: ldr x30, [sp], #16
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; CHECK: hint #29
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; CHECK-NEXT: .cfi_negate_ra_state
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; CHECK: ret
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; CHECK-V32A-NEXT: retaa
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define i64 @leaf_clobbers_lr(i64 %x) "sign-return-address"="non-leaf" {
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@ -49,7 +53,9 @@ declare i32 @foo(i32)
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; CHECK: @non_leaf_sign_all
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; CHECK: hint #25
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; CHECK-NEXT: .cfi_negate_ra_state
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; CHECK: hint #29
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; CHECK-NEXT: .cfi_negate_ra_state
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; CHECK: ret
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; CHECK-V83A: pacia x30, sp
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; CHECK-V83A: retaa
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@ -60,10 +66,12 @@ define i32 @non_leaf_sign_all(i32 %x) "sign-return-address"="all" {
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; CHECK: @non_leaf_sign_non_leaf
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; CHECK: hint #25
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; CHECK-NEXT: .cfi_negate_ra_state
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; CHECK-V83A: pacia x30, sp
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; CHECK, CHECK-V83A: str x30, [sp, #-16]!
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; CHECK, CHECK-V83A: ldr x30, [sp], #16
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; CHECK: hint #29
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; CHECK-NEXT: .cfi_negate_ra_state
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; CHECK: ret
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; CHECK-V83A: retaa
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define i32 @non_leaf_sign_non_leaf(i32 %x) "sign-return-address"="non-leaf" {
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@ -72,10 +80,11 @@ define i32 @non_leaf_sign_non_leaf(i32 %x) "sign-return-address"="non-leaf" {
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}
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; CHECK-LABEL: @leaf_sign_all_v83
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; CHECK: pacia x30, sp
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; CHECK-NOT: ret
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; CHECK: retaa
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; CHECK-NOT: ret
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; CHECK: pacia x30, sp
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; CHECK-NEXT: .cfi_negate_ra_state
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; CHECK-NOT: ret
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; CHECK: retaa
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; CHECK-NOT: ret
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define i32 @leaf_sign_all_v83(i32 %x) "sign-return-address"="all" "target-features"="+v8.3a" {
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ret i32 %x
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}
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@ -84,11 +93,14 @@ declare fastcc i64 @bar(i64)
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; CHECK-LABEL: @spill_lr_and_tail_call
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; CHECK: hint #25
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; CHECK-NEXT: .cfi_negate_ra_state
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; CHECK-V83A: pacia x30, sp
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; CHECK-V83A-NEXT: .cfi_negate_ra_state
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; CHECK, CHECK-V83A: str x30, [sp, #-16]!
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; CHECK, CHECK-V83A: ldr x30, [sp], #16
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; CHECK-V83A: autiasp
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; CHECK: hint #29
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; CHECK-NEXT: .cfi_negate_ra_state
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; CHECK: b bar
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define fastcc void @spill_lr_and_tail_call(i64 %x) "sign-return-address"="all" {
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call void asm sideeffect "mov x30, $0", "r,~{lr}"(i64 %x) #1
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@ -97,57 +109,71 @@ define fastcc void @spill_lr_and_tail_call(i64 %x) "sign-return-address"="all" {
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}
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; CHECK-LABEL: @leaf_sign_all_a_key
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; CHECK: hint #25
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; CHECK: hint #29
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; CHECK-V83A: pacia x30, sp
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; CHECK-V83A: retaa
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; CHECK: hint #25
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; CHECK-NEXT: .cfi_negate_ra_state
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; CHECK: hint #29
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; CHECK-NEXT: .cfi_negate_ra_state
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; CHECK-V83A: pacia x30, sp
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; CHECK-V83A-NEXT: .cfi_negate_ra_state
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; CHECK-V83A: retaa
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define i32 @leaf_sign_all_a_key(i32 %x) "sign-return-address"="all" "sign-return-address-key"="a_key" {
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ret i32 %x
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}
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; CHECK-LABEL: @leaf_sign_all_b_key
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; CHECK: hint #27
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; CHECK: hint #31
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; CHECK-V83A: pacib x30, sp
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; CHECK-V83A: retab
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; CHECK: hint #27
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; CHECK-NEXT: .cfi_negate_ra_state
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; CHECK: hint #31
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; CHECK-NEXT: .cfi_negate_ra_state
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; CHECK-V83A: pacib x30, sp
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; CHECK-V83A-NEXT: .cfi_negate_ra_state
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; CHECK-V83A: retab
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define i32 @leaf_sign_all_b_key(i32 %x) "sign-return-address"="all" "sign-return-address-key"="b_key" {
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ret i32 %x
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}
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; CHECK-LABEL: @leaf_sign_all_v83_b_key
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; CHECK: pacib x30, sp
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; CHECK-NOT: ret
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; CHECK: retab
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; CHECK-NOT: ret
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; CHECK: pacib x30, sp
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; CHECK-NEXT: .cfi_negate_ra_state
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; CHECK-NOT: ret
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; CHECK: retab
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; CHECK-NOT: ret
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define i32 @leaf_sign_all_v83_b_key(i32 %x) "sign-return-address"="all" "target-features"="+v8.3a" "sign-return-address-key"="b_key" {
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ret i32 %x
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}
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; CHECK-LABEL: @leaf_sign_all_a_key_bti
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; CHECK-NOT: hint #34
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; CHECK: hint #25
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; CHECK: hint #29
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; CHECK-V83A: pacia x30, sp
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; CHECK-V83A: retaa
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; CHECK-NOT: hint #34
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; CHECK: hint #25
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; CHECK-NEXT: .cfi_negate_ra_state
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; CHECK: hint #29
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; CHECK-NEXT: .cfi_negate_ra_state
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; CHECK-V83A: pacia x30, sp
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; CHECK-V83A-NEXT: .cfi_negate_ra_state
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; CHECK-V83A: retaa
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define i32 @leaf_sign_all_a_key_bti(i32 %x) "sign-return-address"="all" "sign-return-address-key"="a_key" "branch-target-enforcement"="true"{
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ret i32 %x
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}
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; CHECK-LABEL: @leaf_sign_all_b_key_bti
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; CHECK-NOT: hint #34
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; CHECK: hint #27
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; CHECK: hint #31
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; CHECK-V83A: pacib x30, sp
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; CHECK-V83A: retab
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; CHECK-NOT: hint #34
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; CHECK: hint #27
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; CHECK-NEXT: .cfi_negate_ra_state
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; CHECK: hint #31
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; CHECK-NEXT: .cfi_negate_ra_state
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; CHECK-V83A: pacib x30, sp
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; CHECK-V83A-NEXT: .cfi_negate_ra_state
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; CHECK-V83A: retab
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define i32 @leaf_sign_all_b_key_bti(i32 %x) "sign-return-address"="all" "sign-return-address-key"="b_key" "branch-target-enforcement"="true"{
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ret i32 %x
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}
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; CHECK-LABEL: @leaf_sign_all_v83_b_key_bti
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; CHECK: pacib x30, sp
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; CHECK-NOT: ret
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; CHECK: retab
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; CHECK-NOT: ret
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; CHECK-NEXT: .cfi_negate_ra_state
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; CHECK-NOT: ret
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; CHECK: retab
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; CHECK-NOT: ret
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define i32 @leaf_sign_all_v83_b_key_bti(i32 %x) "sign-return-address"="all" "target-features"="+v8.3a" "sign-return-address-key"="b_key" "branch-target-enforcement"="true" {
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ret i32 %x
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}
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