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InstCombine: try to transform A-B < 0 into A < B 

We are allowed to move the 'B' to the right hand side if we an prove
there is no signed overflow and if the comparison itself is signed.

llvm-svn: 225034
This commit is contained in:
David Majnemer 2014-12-31 04:21:41 +00:00
parent 75f34af99c
commit f89dc3edc9
2 changed files with 56 additions and 0 deletions
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20
llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
View File

@ -2692,6 +2692,26 @@ Instruction *InstCombiner::visitICmpInst(ICmpInst &I) {
return new ICmpInst(I.getPredicate(), A, B); return new ICmpInst(I.getPredicate(), A, B);
} }
// (icmp sgt (sub nsw A B), -1) -> (icmp sge A, B)
if (I.getPredicate() == ICmpInst::ICMP_SGT && CI->isAllOnesValue() &&
match(Op0, m_NSWSub(m_Value(A), m_Value(B))))
return new ICmpInst(ICmpInst::ICMP_SGE, A, B);
// (icmp sgt (sub nsw A B), 0) -> (icmp sgt A, B)
if (I.getPredicate() == ICmpInst::ICMP_SGT && CI->isZero() &&
match(Op0, m_NSWSub(m_Value(A), m_Value(B))))
return new ICmpInst(ICmpInst::ICMP_SGT, A, B);
// (icmp slt (sub nsw A B), 0) -> (icmp slt A, B)
if (I.getPredicate() == ICmpInst::ICMP_SLT && CI->isZero() &&
match(Op0, m_NSWSub(m_Value(A), m_Value(B))))
return new ICmpInst(ICmpInst::ICMP_SLT, A, B);
// (icmp slt (sub nsw A B), 1) -> (icmp sle A, B)
if (I.getPredicate() == ICmpInst::ICMP_SLT && CI->isOne() &&
match(Op0, m_NSWSub(m_Value(A), m_Value(B))))
return new ICmpInst(ICmpInst::ICMP_SLE, A, B);
// If we have an icmp le or icmp ge instruction, turn it into the // If we have an icmp le or icmp ge instruction, turn it into the
// appropriate icmp lt or icmp gt instruction. This allows us to rely on // appropriate icmp lt or icmp gt instruction. This allows us to rely on
// them being folded in the code below. The SimplifyICmpInst code has // them being folded in the code below. The SimplifyICmpInst code has

36
llvm/test/Transforms/InstCombine/icmp.ll
View File

@ -1522,3 +1522,39 @@ define zeroext i1 @icmp_cmpxchg_strong(i32* %sc, i32 %old_val, i32 %new_val) {
%icmp = icmp eq i32 %xtrc, %old_val %icmp = icmp eq i32 %xtrc, %old_val
ret i1 %icmp ret i1 %icmp
} }
; CHECK-LABEL: @f1
; CHECK-NEXT: %[[cmp:.*]] = icmp sge i64 %a, %b
; CHECK-NEXT: ret i1 %[[cmp]]
define i1 @f1(i64 %a, i64 %b) {
%t = sub nsw i64 %a, %b
%v = icmp sge i64 %t, 0
ret i1 %v
}
; CHECK-LABEL: @f2
; CHECK-NEXT: %[[cmp:.*]] = icmp sgt i64 %a, %b
; CHECK-NEXT: ret i1 %[[cmp]]
define i1 @f2(i64 %a, i64 %b) {
%t = sub nsw i64 %a, %b
%v = icmp sgt i64 %t, 0
ret i1 %v
}
; CHECK-LABEL: @f3
; CHECK-NEXT: %[[cmp:.*]] = icmp slt i64 %a, %b
; CHECK-NEXT: ret i1 %[[cmp]]
define i1 @f3(i64 %a, i64 %b) {
%t = sub nsw i64 %a, %b
%v = icmp slt i64 %t, 0
ret i1 %v
}
; CHECK-LABEL: @f4
; CHECK-NEXT: %[[cmp:.*]] = icmp sle i64 %a, %b
; CHECK-NEXT: ret i1 %[[cmp]]
define i1 @f4(i64 %a, i64 %b) {
%t = sub nsw i64 %a, %b
%v = icmp sle i64 %t, 0
ret i1 %v
}