forked from OSchip/llvm-project
Add PowerPC codegen for indirect branches.
llvm-svn: 86050
This commit is contained in:
Bob Wilson
parent
289b8a2bd9
commit
f84f7105f7
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@ -414,6 +414,9 @@ void PPCAsmPrinter::printOp(const MachineOperand &MO) {
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O << MAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber()
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<< '_' << MO.getIndex();
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return;
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case MachineOperand::MO_BlockAddress:
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GetBlockAddressSymbol(MO.getBlockAddress())->print(O, MAI);
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return;
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case MachineOperand::MO_ExternalSymbol: {
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// Computing the address of an external symbol, not calling it.
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std::string Name(MAI->getGlobalPrefix());
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@ -196,10 +196,12 @@ PPCTargetLowering::PPCTargetLowering(PPCTargetMachine &TM)
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// appropriate instructions to materialize the address.
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setOperationAction(ISD::GlobalAddress, MVT::i32, Custom);
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setOperationAction(ISD::GlobalTLSAddress, MVT::i32, Custom);
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setOperationAction(ISD::BlockAddress, MVT::i32, Custom);
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setOperationAction(ISD::ConstantPool, MVT::i32, Custom);
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setOperationAction(ISD::JumpTable, MVT::i32, Custom);
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setOperationAction(ISD::GlobalAddress, MVT::i64, Custom);
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setOperationAction(ISD::GlobalTLSAddress, MVT::i64, Custom);
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setOperationAction(ISD::BlockAddress, MVT::i64, Custom);
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setOperationAction(ISD::ConstantPool, MVT::i64, Custom);
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setOperationAction(ISD::JumpTable, MVT::i64, Custom);
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@ -1167,6 +1169,36 @@ SDValue PPCTargetLowering::LowerGlobalTLSAddress(SDValue Op,
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return SDValue(); // Not reached
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}
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SDValue PPCTargetLowering::LowerBlockAddress(SDValue Op, SelectionDAG &DAG) {
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EVT PtrVT = Op.getValueType();
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DebugLoc DL = Op.getDebugLoc();
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BlockAddress *BA = cast<BlockAddressSDNode>(Op)->getBlockAddress();
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SDValue TgtBA = DAG.getBlockAddress(BA, DL, /*isTarget=*/true);
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SDValue Zero = DAG.getConstant(0, PtrVT);
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SDValue Hi = DAG.getNode(PPCISD::Hi, DL, PtrVT, TgtBA, Zero);
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SDValue Lo = DAG.getNode(PPCISD::Lo, DL, PtrVT, TgtBA, Zero);
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// If this is a non-darwin platform, we don't support non-static relo models
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// yet.
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const TargetMachine &TM = DAG.getTarget();
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if (TM.getRelocationModel() == Reloc::Static ||
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!TM.getSubtarget<PPCSubtarget>().isDarwin()) {
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// Generate non-pic code that has direct accesses to globals.
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// The address of the global is just (hi(&g)+lo(&g)).
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return DAG.getNode(ISD::ADD, DL, PtrVT, Hi, Lo);
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}
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if (TM.getRelocationModel() == Reloc::PIC_) {
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// With PIC, the first instruction is actually "GR+hi(&G)".
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Hi = DAG.getNode(ISD::ADD, DL, PtrVT,
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DAG.getNode(PPCISD::GlobalBaseReg,
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DebugLoc::getUnknownLoc(), PtrVT), Hi);
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}
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return DAG.getNode(ISD::ADD, DL, PtrVT, Hi, Lo);
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}
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SDValue PPCTargetLowering::LowerGlobalAddress(SDValue Op,
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SelectionDAG &DAG) {
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EVT PtrVT = Op.getValueType();
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@ -4181,6 +4213,7 @@ SDValue PPCTargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) {
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switch (Op.getOpcode()) {
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default: llvm_unreachable("Wasn't expecting to be able to lower this!");
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case ISD::ConstantPool: return LowerConstantPool(Op, DAG);
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case ISD::BlockAddress: return LowerBlockAddress(Op, DAG);
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case ISD::GlobalAddress: return LowerGlobalAddress(Op, DAG);
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case ISD::GlobalTLSAddress: return LowerGlobalTLSAddress(Op, DAG);
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case ISD::JumpTable: return LowerJumpTable(Op, DAG);
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@ -361,6 +361,7 @@ namespace llvm {
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SDValue LowerRETURNADDR(SDValue Op, SelectionDAG &DAG);
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SDValue LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG);
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SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG);
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SDValue LowerBlockAddress(SDValue Op, SelectionDAG &DAG);
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SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG);
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SDValue LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG);
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SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG);
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@ -731,9 +731,13 @@ def : Pat<(PPChi tconstpool:$in , 0), (LIS8 tconstpool:$in)>;
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def : Pat<(PPClo tconstpool:$in , 0), (LI8 tconstpool:$in)>;
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def : Pat<(PPChi tjumptable:$in , 0), (LIS8 tjumptable:$in)>;
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def : Pat<(PPClo tjumptable:$in , 0), (LI8 tjumptable:$in)>;
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def : Pat<(PPChi tblockaddress:$in, 0), (LIS8 tblockaddress:$in)>;
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def : Pat<(PPClo tblockaddress:$in, 0), (LI8 tblockaddress:$in)>;
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def : Pat<(add G8RC:$in, (PPChi tglobaladdr:$g, 0)),
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(ADDIS8 G8RC:$in, tglobaladdr:$g)>;
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def : Pat<(add G8RC:$in, (PPChi tconstpool:$g, 0)),
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(ADDIS8 G8RC:$in, tconstpool:$g)>;
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def : Pat<(add G8RC:$in, (PPChi tjumptable:$g, 0)),
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(ADDIS8 G8RC:$in, tjumptable:$g)>;
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def : Pat<(add G8RC:$in, (PPChi tblockaddress:$g, 0)),
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(ADDIS8 G8RC:$in, tblockaddress:$g)>;
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@ -1436,12 +1436,16 @@ def : Pat<(PPChi tconstpool:$in, 0), (LIS tconstpool:$in)>;
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def : Pat<(PPClo tconstpool:$in, 0), (LI tconstpool:$in)>;
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def : Pat<(PPChi tjumptable:$in, 0), (LIS tjumptable:$in)>;
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def : Pat<(PPClo tjumptable:$in, 0), (LI tjumptable:$in)>;
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def : Pat<(PPChi tblockaddress:$in, 0), (LIS tblockaddress:$in)>;
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def : Pat<(PPClo tblockaddress:$in, 0), (LI tblockaddress:$in)>;
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def : Pat<(add GPRC:$in, (PPChi tglobaladdr:$g, 0)),
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(ADDIS GPRC:$in, tglobaladdr:$g)>;
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def : Pat<(add GPRC:$in, (PPChi tconstpool:$g, 0)),
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(ADDIS GPRC:$in, tconstpool:$g)>;
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def : Pat<(add GPRC:$in, (PPChi tjumptable:$g, 0)),
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(ADDIS GPRC:$in, tjumptable:$g)>;
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def : Pat<(add GPRC:$in, (PPChi tblockaddress:$g, 0)),
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(ADDIS GPRC:$in, tblockaddress:$g)>;
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// Fused negative multiply subtract, alternate pattern
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def : Pat<(fsub F8RC:$B, (fmul F8RC:$A, F8RC:$C)),
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@ -0,0 +1,55 @@
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; RUN: llc < %s -relocation-model=pic -march=ppc32 | FileCheck %s -check-prefix=PIC
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; RUN: llc < %s -relocation-model=static -march=ppc32 | FileCheck %s -check-prefix=STATIC
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@nextaddr = global i8* null ; <i8**> [#uses=2]
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@C.0.2070 = private constant [5 x i8*] [i8* blockaddress(@foo, %L1), i8* blockaddress(@foo, %L2), i8* blockaddress(@foo, %L3), i8* blockaddress(@foo, %L4), i8* blockaddress(@foo, %L5)] ; <[5 x i8*]*> [#uses=1]
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define internal i32 @foo(i32 %i) nounwind {
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; PIC: foo:
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; STATIC: foo:
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entry:
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%0 = load i8** @nextaddr, align 4 ; <i8*> [#uses=2]
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%1 = icmp eq i8* %0, null ; <i1> [#uses=1]
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br i1 %1, label %bb3, label %bb2
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bb2: ; preds = %entry, %bb3
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%gotovar.4.0 = phi i8* [ %gotovar.4.0.pre, %bb3 ], [ %0, %entry ] ; <i8*> [#uses=1]
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; PIC: mtctr
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; PIC-NEXT: bctr
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; STATIC: mtctr
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; STATIC-NEXT: bctr
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indirectbr i8* %gotovar.4.0, [label %L5, label %L4, label %L3, label %L2, label %L1]
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bb3: ; preds = %entry
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%2 = getelementptr inbounds [5 x i8*]* @C.0.2070, i32 0, i32 %i ; <i8**> [#uses=1]
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%gotovar.4.0.pre = load i8** %2, align 4 ; <i8*> [#uses=1]
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br label %bb2
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L5: ; preds = %bb2
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br label %L4
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L4: ; preds = %L5, %bb2
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%res.0 = phi i32 [ 385, %L5 ], [ 35, %bb2 ] ; <i32> [#uses=1]
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br label %L3
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L3: ; preds = %L4, %bb2
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%res.1 = phi i32 [ %res.0, %L4 ], [ 5, %bb2 ] ; <i32> [#uses=1]
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br label %L2
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L2: ; preds = %L3, %bb2
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%res.2 = phi i32 [ %res.1, %L3 ], [ 1, %bb2 ] ; <i32> [#uses=1]
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%phitmp = mul i32 %res.2, 6 ; <i32> [#uses=1]
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br label %L1
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L1: ; preds = %L2, %bb2
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%res.3 = phi i32 [ %phitmp, %L2 ], [ 2, %bb2 ] ; <i32> [#uses=1]
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; PIC: addis r4, r2, ha16(L_foo_L5-"L1$pb")
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; PIC: li r5, lo16(L_foo_L5-"L1$pb")
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; PIC: add r4, r4, r5
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; PIC: stw r4
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; STATIC: li r2, lo16(L_foo_L5)
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; STATIC: addis r2, r2, ha16(L_foo_L5)
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; STATIC: stw r2
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store i8* blockaddress(@foo, %L5), i8** @nextaddr, align 4
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ret i32 %res.3
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}
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