forked from OSchip/llvm-project
[CodeGen] Move printing MO_BlockAddress operands to MachineOperand::print
Work towards the unification of MIR and debug output by refactoring the interfaces. llvm-svn: 321113
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cb2683d46a
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f81727d138
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@ -254,6 +254,9 @@ public:
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/// Print the offset with explicit +/- signs.
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/// Print the offset with explicit +/- signs.
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static void printOperandOffset(raw_ostream &OS, int64_t Offset);
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static void printOperandOffset(raw_ostream &OS, int64_t Offset);
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/// Print an IRSlotNumber.
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static void printIRSlotNumber(raw_ostream &OS, int Slot);
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/// Print the MachineOperand to \p os.
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/// Print the MachineOperand to \p os.
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/// Providing a valid \p TRI and \p IntrinsicInfo results in a more
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/// Providing a valid \p TRI and \p IntrinsicInfo results in a more
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/// target-specific printing. If \p TRI and \p IntrinsicInfo are null, the
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/// target-specific printing. If \p TRI and \p IntrinsicInfo are null, the
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@ -157,7 +157,6 @@ public:
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void print(const MachineBasicBlock &MBB);
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void print(const MachineBasicBlock &MBB);
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void print(const MachineInstr &MI);
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void print(const MachineInstr &MI);
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void printIRBlockReference(const BasicBlock &BB);
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void printIRValueReference(const Value &V);
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void printIRValueReference(const Value &V);
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void printStackObjectReference(int FrameIndex);
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void printStackObjectReference(int FrameIndex);
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void print(const MachineInstr &MI, unsigned OpIdx,
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void print(const MachineInstr &MI, unsigned OpIdx,
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@ -704,32 +703,6 @@ void MIPrinter::print(const MachineInstr &MI) {
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}
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}
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}
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}
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static void printIRSlotNumber(raw_ostream &OS, int Slot) {
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if (Slot == -1)
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OS << "<badref>";
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else
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OS << Slot;
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}
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void MIPrinter::printIRBlockReference(const BasicBlock &BB) {
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OS << "%ir-block.";
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if (BB.hasName()) {
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printLLVMNameWithoutPrefix(OS, BB.getName());
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return;
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}
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const Function *F = BB.getParent();
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int Slot;
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if (F == MST.getCurrentFunction()) {
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Slot = MST.getLocalSlot(&BB);
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} else {
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ModuleSlotTracker CustomMST(F->getParent(),
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/*ShouldInitializeAllMetadata=*/false);
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CustomMST.incorporateFunction(*F);
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Slot = CustomMST.getLocalSlot(&BB);
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}
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printIRSlotNumber(OS, Slot);
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}
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void MIPrinter::printIRValueReference(const Value &V) {
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void MIPrinter::printIRValueReference(const Value &V) {
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if (isa<GlobalValue>(V)) {
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if (isa<GlobalValue>(V)) {
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V.printAsOperand(OS, /*PrintType=*/false, MST);
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V.printAsOperand(OS, /*PrintType=*/false, MST);
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@ -747,7 +720,7 @@ void MIPrinter::printIRValueReference(const Value &V) {
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printLLVMNameWithoutPrefix(OS, V.getName());
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printLLVMNameWithoutPrefix(OS, V.getName());
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return;
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return;
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}
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}
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printIRSlotNumber(OS, MST.getLocalSlot(&V));
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MachineOperand::printIRSlotNumber(OS, MST.getLocalSlot(&V));
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}
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}
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void MIPrinter::printStackObjectReference(int FrameIndex) {
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void MIPrinter::printStackObjectReference(int FrameIndex) {
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@ -786,7 +759,8 @@ void MIPrinter::print(const MachineInstr &MI, unsigned OpIdx,
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case MachineOperand::MO_MCSymbol:
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case MachineOperand::MO_MCSymbol:
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case MachineOperand::MO_CFIIndex:
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case MachineOperand::MO_CFIIndex:
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case MachineOperand::MO_IntrinsicID:
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case MachineOperand::MO_IntrinsicID:
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case MachineOperand::MO_Predicate: {
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case MachineOperand::MO_Predicate:
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case MachineOperand::MO_BlockAddress: {
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unsigned TiedOperandIdx = 0;
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unsigned TiedOperandIdx = 0;
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if (ShouldPrintRegisterTies && Op.isReg() && Op.isTied() && !Op.isDef())
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if (ShouldPrintRegisterTies && Op.isReg() && Op.isTied() && !Op.isDef())
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TiedOperandIdx = Op.getParent()->findTiedOperandIdx(OpIdx);
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TiedOperandIdx = Op.getParent()->findTiedOperandIdx(OpIdx);
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@ -798,15 +772,6 @@ void MIPrinter::print(const MachineInstr &MI, unsigned OpIdx,
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case MachineOperand::MO_FrameIndex:
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case MachineOperand::MO_FrameIndex:
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printStackObjectReference(Op.getIndex());
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printStackObjectReference(Op.getIndex());
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break;
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break;
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case MachineOperand::MO_BlockAddress:
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OS << "blockaddress(";
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Op.getBlockAddress()->getFunction()->printAsOperand(OS, /*PrintType=*/false,
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MST);
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OS << ", ";
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printIRBlockReference(*Op.getBlockAddress()->getBasicBlock());
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OS << ')';
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MachineOperand::printOperandOffset(Op.getOffset());
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break;
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case MachineOperand::MO_RegisterMask: {
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case MachineOperand::MO_RegisterMask: {
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auto RegMaskInfo = RegisterMaskIds.find(Op.getRegMask());
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auto RegMaskInfo = RegisterMaskIds.find(Op.getRegMask());
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if (RegMaskInfo != RegisterMaskIds.end())
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if (RegMaskInfo != RegisterMaskIds.end())
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@ -417,6 +417,29 @@ static void printCFIRegister(unsigned DwarfReg, raw_ostream &OS,
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OS << printReg(Reg, TRI);
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OS << printReg(Reg, TRI);
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}
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}
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static void printIRBlockReference(raw_ostream &OS, const BasicBlock &BB,
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ModuleSlotTracker &MST) {
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OS << "%ir-block.";
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if (BB.hasName()) {
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printLLVMNameWithoutPrefix(OS, BB.getName());
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return;
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}
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Optional<int> Slot;
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if (const Function *F = BB.getParent()) {
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if (F == MST.getCurrentFunction()) {
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Slot = MST.getLocalSlot(&BB);
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} else if (const Module *M = F->getParent()) {
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ModuleSlotTracker CustomMST(M, /*ShouldInitializeAllMetadata=*/false);
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CustomMST.incorporateFunction(*F);
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Slot = CustomMST.getLocalSlot(&BB);
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}
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}
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if (Slot)
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MachineOperand::printIRSlotNumber(OS, *Slot);
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else
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OS << "<unknown>";
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}
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void MachineOperand::printSubregIdx(raw_ostream &OS, uint64_t Index,
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void MachineOperand::printSubregIdx(raw_ostream &OS, uint64_t Index,
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const TargetRegisterInfo *TRI) {
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const TargetRegisterInfo *TRI) {
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OS << "%subreg.";
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OS << "%subreg.";
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@ -505,6 +528,13 @@ void MachineOperand::printOperandOffset(raw_ostream &OS, int64_t Offset) {
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OS << " + " << Offset;
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OS << " + " << Offset;
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}
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}
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void MachineOperand::printIRSlotNumber(raw_ostream &OS, int Slot) {
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if (Slot == -1)
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OS << "<badref>";
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else
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OS << Slot;
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}
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static void printCFI(raw_ostream &OS, const MCCFIInstruction &CFI,
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static void printCFI(raw_ostream &OS, const MCCFIInstruction &CFI,
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const TargetRegisterInfo *TRI) {
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const TargetRegisterInfo *TRI) {
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switch (CFI.getOperation()) {
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switch (CFI.getOperation()) {
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@ -731,13 +761,16 @@ void MachineOperand::print(raw_ostream &OS, ModuleSlotTracker &MST,
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printOperandOffset(OS, getOffset());
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printOperandOffset(OS, getOffset());
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break;
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break;
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}
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}
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case MachineOperand::MO_BlockAddress:
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case MachineOperand::MO_BlockAddress: {
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OS << '<';
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OS << "blockaddress(";
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getBlockAddress()->printAsOperand(OS, /*PrintType=*/false, MST);
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getBlockAddress()->getFunction()->printAsOperand(OS, /*PrintType=*/false,
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if (getOffset())
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MST);
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OS << "+" << getOffset();
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OS << ", ";
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OS << '>';
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printIRBlockReference(OS, *getBlockAddress()->getBasicBlock(), MST);
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OS << ')';
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MachineOperand::printOperandOffset(OS, getOffset());
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break;
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break;
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}
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case MachineOperand::MO_RegisterMask: {
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case MachineOperand::MO_RegisterMask: {
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OS << "<regmask";
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OS << "<regmask";
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if (TRI) {
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if (TRI) {
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